diff --git a/uart05/BCM2835.h b/uart05/BCM2835.h
new file mode 100644
index 0000000..12a3f65
--- /dev/null
+++ b/uart05/BCM2835.h
@@ -0,0 +1,14 @@
+
+#define PBASE 0x20000000
+
+//-------------------------------------------------------------------------
+//
+// Copyright (c) 2012 David Welch dwelch@dwelch.com
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+//
+//-------------------------------------------------------------------------
diff --git a/uart05/BCM2836.h b/uart05/BCM2836.h
new file mode 100644
index 0000000..08aeae1
--- /dev/null
+++ b/uart05/BCM2836.h
@@ -0,0 +1,14 @@
+
+#define PBASE 0x3F000000
+
+//-------------------------------------------------------------------------
+//
+// Copyright (c) 2012 David Welch dwelch@dwelch.com
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+//
+//-------------------------------------------------------------------------
diff --git a/uart05/Makefile b/uart05/Makefile
new file mode 100644
index 0000000..b96ba5b
--- /dev/null
+++ b/uart05/Makefile
@@ -0,0 +1,65 @@
+
+#ARMGNU ?= arm-none-eabi
+ARMGNU ?= arm-linux-gnueabi
+
+COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 
+
+gcc : uart05.bin
+
+all : gcc clang
+
+clean :
+	rm -f *.o
+	rm -f *.bin
+	rm -f *.hex
+	rm -f *.elf
+	rm -f *.list
+	rm -f *.img
+	rm -f *.bc
+	rm -f *.clang.s
+
+start.o : start.s
+	$(ARMGNU)-as start.s -o start.o
+
+uart05.o : uart05.c
+	$(ARMGNU)-gcc $(COPS) -c uart05.c -o uart05.o
+
+periph.o : periph.c
+	$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
+
+uart05.bin : memmap start.o periph.o uart05.o 
+	$(ARMGNU)-ld start.o periph.o uart05.o -T memmap -o uart05.elf
+	$(ARMGNU)-objdump -D uart05.elf > uart05.list
+	$(ARMGNU)-objcopy uart05.elf -O ihex uart05.hex
+	$(ARMGNU)-objcopy uart05.elf -O binary uart05.bin
+
+
+
+LOPS = -Wall -m32 -emit-llvm
+LLCOPS0 = -march=arm 
+LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
+LLCOPS = $(LLCOPS1)
+COPS = -Wall  -O2 -nostdlib -nostartfiles -ffreestanding
+OOPS = -std-compile-opts
+
+clang : uart05.clang.bin
+
+uart05.bc : uart05.c
+	clang $(LOPS) -c uart05.c -o uart05.bc
+
+periph.bc : periph.c
+	clang $(LOPS) -c periph.c -o periph.bc
+
+uart05.clang.elf : memmap start.o uart05.bc periph.bc
+	llvm-link periph.bc uart05.bc -o uart05.nopt.bc
+	opt $(OOPS) uart05.nopt.bc -o uart05.opt.bc
+	llc $(LLCOPS) uart05.opt.bc -o uart05.clang.s
+	$(ARMGNU)-as uart05.clang.s -o uart05.clang.o
+	$(ARMGNU)-ld -o uart05.clang.elf -T memmap start.o uart05.clang.o
+	$(ARMGNU)-objdump -D uart05.clang.elf > uart05.clang.list
+
+uart05.clang.bin : uart05.clang.elf
+	$(ARMGNU)-objcopy uart05.clang.elf uart05.clang.hex -O ihex
+	$(ARMGNU)-objcopy uart05.clang.elf uart05.clang.bin -O binary
+
+
diff --git a/uart05/README b/uart05/README
new file mode 100644
index 0000000..89aae33
--- /dev/null
+++ b/uart05/README
@@ -0,0 +1,66 @@
+
+See the top level README file for more information on documentation
+and how to run these programs.
+
+Derived from bootloader07.  This is a skeleton for building generic
+uart based programs.
+
+Starting with the Raspberry Pi 2 the peripheral base is now at
+0x3F000000 instead of 0x20000000 so in periph.c you need to uncomment
+the correct header file before building.
+
+Yes I did some self modifying code in there to make it easier to dump
+some registers of interest.  In particular the MIDR (Main Identification
+Register).  Which helps you figure out which ARM core you are using.
+The RPi 2 uses a Cortex-A7 r0p5 in the BCM2836, the predecessors to the
+RPi2 use an ARM1176JZF-S the one I have on hand which is a model A (not
+A+) has a r0p7 as shown below.
+
+Raspberry Pi 2
+
+00000000 410FC075 MIDR
+00000001 84448003 CTR
+00000002 00000000 TCMTR
+00000003 00000000 TLBTR
+00000004 410FC075 MIDR alias
+00000005 80000F00 MPIDR
+00000006 00000000 REVIDR
+00000007 410FC075 MIDR alias
+00000000 00001131 ID_PFR0
+00000001 00011011 ID_PFR1
+00000002 02010555 ID_DFR0
+00000003 00000000 ID_AFR0
+00000004 10101105 ID_MMFR0
+00000005 40000000 MD_MMFR1
+00000006 01240000 ID_MMFR2
+00000007 02102211 ID_MMFR3
+00000000 02101110 ID_ISAR0 *
+00000001 13112111 ID_ISAR1
+00000002 21232041 ID_ISAR2
+00000003 11112131 ID_ISAR3
+00000004 10011142 ID_ISAR4
+00000005 00000000 ID_ISA45
+
+rpi1     rpi2
+410FB767 410FC075 MRC p15, 0, r0, c0, c0, 0
+1D152152 84448003 MRC p15, 0, r0, c0, c0, 1
+00000000 00000000 MRC p15, 0, r0, c0, c0, 2
+00000800 00000000 MRC p15, 0, r0, c0, c0, 3
+410FB767 410FC075 MRC p15, 0, r0, c0, c0, 4
+410FB767 80000F00 MRC p15, 0, r0, c0, c0, 5
+410FB767 00000000 MRC p15, 0, r0, c0, c0, 6
+410FB767 410FC075 MRC p15, 0, r0, c0, c0, 7
+00000111 00001131 MRC p15, 0, r0, c0, c1, 0
+00000011 00011011 MRC p15, 0, r0, c0, c1, 1
+00000033 02010555 MRC p15, 0, r0, c0, c1, 2
+00000000 00000000 MRC p15, 0, r0, c0, c1, 3
+01130003 10101105 MRC p15, 0, r0, c0, c1, 4
+10030302 40000000 MRC p15, 0, r0, c0, c1, 5
+01222100 01240000 MRC p15, 0, r0, c0, c1, 6
+00000000 02102211 MRC p15, 0, r0, c0, c1, 7
+00140011 02101110 MRC p15, 0, r0, c0, c2, 0
+12002111 13112111 MRC p15, 0, r0, c0, c2, 1
+11231121 21232041 MRC p15, 0, r0, c0, c2, 2
+01102131 11112131 MRC p15, 0, r0, c0, c2, 3
+00001141 10011142 MRC p15, 0, r0, c0, c2, 4
+00000000 00000000 MRC p15, 0, r0, c0, c2, 5
diff --git a/uart05/memmap b/uart05/memmap
new file mode 100644
index 0000000..42d3af4
--- /dev/null
+++ b/uart05/memmap
@@ -0,0 +1,12 @@
+
+MEMORY
+{
+    ram : ORIGIN = 0x8000, LENGTH = 0x1000
+}
+
+SECTIONS
+{
+    .text : { *(.text*) } > ram
+    .bss : { *(.bss*) } > ram
+}
+
diff --git a/uart05/periph.c b/uart05/periph.c
new file mode 100644
index 0000000..7467bad
--- /dev/null
+++ b/uart05/periph.c
@@ -0,0 +1,154 @@
+
+//-------------------------------------------------------------------------
+//-------------------------------------------------------------------------
+
+//Uncomment one of these
+#include "BCM2835.h" /* Original B,A,A+,B+ */
+//#include "BCM2836.h" /* Raspberriy Pi 2 */
+
+extern void PUT32 ( unsigned int, unsigned int );
+extern void PUT16 ( unsigned int, unsigned int );
+extern void PUT8 ( unsigned int, unsigned int );
+extern unsigned int GET32 ( unsigned int );
+extern void dummy ( unsigned int );
+
+#define ARM_TIMER_CTL   (PBASE+0x0000B408)
+#define ARM_TIMER_CNT   (PBASE+0x0000B420)
+
+#define GPFSEL1         (PBASE+0x00200004)
+#define GPSET0          (PBASE+0x0020001C)
+#define GPCLR0          (PBASE+0x00200028)
+#define GPPUD           (PBASE+0x00200094)
+#define GPPUDCLK0       (PBASE+0x00200098)
+
+#define AUX_ENABLES     (PBASE+0x00215004)
+#define AUX_MU_IO_REG   (PBASE+0x00215040)
+#define AUX_MU_IER_REG  (PBASE+0x00215044)
+#define AUX_MU_IIR_REG  (PBASE+0x00215048)
+#define AUX_MU_LCR_REG  (PBASE+0x0021504C)
+#define AUX_MU_MCR_REG  (PBASE+0x00215050)
+#define AUX_MU_LSR_REG  (PBASE+0x00215054)
+#define AUX_MU_MSR_REG  (PBASE+0x00215058)
+#define AUX_MU_SCRATCH  (PBASE+0x0021505C)
+#define AUX_MU_CNTL_REG (PBASE+0x00215060)
+#define AUX_MU_STAT_REG (PBASE+0x00215064)
+#define AUX_MU_BAUD_REG (PBASE+0x00215068)
+
+//GPIO14  TXD0 and TXD1
+//GPIO15  RXD0 and RXD1
+//------------------------------------------------------------------------
+unsigned int uart_lcr ( void )
+{
+    return(GET32(AUX_MU_LSR_REG));
+}
+//------------------------------------------------------------------------
+unsigned int uart_recv ( void )
+{
+    while(1)
+    {
+        if(GET32(AUX_MU_LSR_REG)&0x01) break;
+    }
+    return(GET32(AUX_MU_IO_REG)&0xFF);
+}
+//------------------------------------------------------------------------
+unsigned int uart_check ( void )
+{
+    if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
+    return(0);
+}
+//------------------------------------------------------------------------
+void uart_send ( unsigned int c )
+{
+    while(1)
+    {
+        if(GET32(AUX_MU_LSR_REG)&0x20) break;
+    }
+    PUT32(AUX_MU_IO_REG,c);
+}
+//------------------------------------------------------------------------
+void uart_flush ( void )
+{
+    while(1)
+    {
+        if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
+    }
+}
+//------------------------------------------------------------------------
+void hexstrings ( unsigned int d )
+{
+    //unsigned int ra;
+    unsigned int rb;
+    unsigned int rc;
+
+    rb=32;
+    while(1)
+    {
+        rb-=4;
+        rc=(d>>rb)&0xF;
+        if(rc>9) rc+=0x37; else rc+=0x30;
+        uart_send(rc);
+        if(rb==0) break;
+    }
+    uart_send(0x20);
+}
+//------------------------------------------------------------------------
+void hexstring ( unsigned int d )
+{
+    hexstrings(d);
+    uart_send(0x0D);
+    uart_send(0x0A);
+}
+//------------------------------------------------------------------------
+void uart_init ( void )
+{
+    unsigned int ra;
+
+    PUT32(AUX_ENABLES,1);
+    PUT32(AUX_MU_IER_REG,0);
+    PUT32(AUX_MU_CNTL_REG,0);
+    PUT32(AUX_MU_LCR_REG,3);
+    PUT32(AUX_MU_MCR_REG,0);
+    PUT32(AUX_MU_IER_REG,0);
+    PUT32(AUX_MU_IIR_REG,0xC6);
+    PUT32(AUX_MU_BAUD_REG,270);
+    ra=GET32(GPFSEL1);
+    ra&=~(7<<12); //gpio14
+    ra|=2<<12;    //alt5
+    ra&=~(7<<15); //gpio15
+    ra|=2<<15;    //alt5
+    PUT32(GPFSEL1,ra);
+    PUT32(GPPUD,0);
+    for(ra=0;ra<150;ra++) dummy(ra);
+    PUT32(GPPUDCLK0,(1<<14)|(1<<15));
+    for(ra=0;ra<150;ra++) dummy(ra);
+    PUT32(GPPUDCLK0,0);
+    PUT32(AUX_MU_CNTL_REG,3);
+}
+//------------------------------------------------------------------------
+void  timer_init ( void )
+{
+    //0xF9+1 = 250
+    //250MHz/250 = 1MHz
+    PUT32(ARM_TIMER_CTL,0x00F90000);
+    PUT32(ARM_TIMER_CTL,0x00F90200);
+}
+//-------------------------------------------------------------------------
+unsigned int timer_tick ( void )
+{
+    return(GET32(ARM_TIMER_CNT));
+}
+//-------------------------------------------------------------------------
+//-------------------------------------------------------------------------
+
+
+//-------------------------------------------------------------------------
+//
+// Copyright (c) 2012 David Welch dwelch@dwelch.com
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+//
+//-------------------------------------------------------------------------
diff --git a/uart05/start.s b/uart05/start.s
new file mode 100644
index 0000000..3cd73ae
--- /dev/null
+++ b/uart05/start.s
@@ -0,0 +1,50 @@
+
+;@-------------------------------------------------------------------------
+;@-------------------------------------------------------------------------
+
+.globl _start
+_start:
+    mov sp,#0x8000
+    bl notmain
+hang: b hang
+
+.globl PUT32
+PUT32:
+    str r1,[r0]
+    bx lr
+
+.globl GET32
+GET32:
+    ldr r0,[r0]
+    bx lr
+
+.globl dummy
+dummy:
+    bx lr
+
+.globl GETPC
+GETPC:
+    mov r0,lr
+    bx lr
+
+
+.globl BRANCHTO
+BRANCHTO:
+    bx r0
+
+
+;@-------------------------------------------------------------------------
+;@-------------------------------------------------------------------------
+
+
+;@-------------------------------------------------------------------------
+;@
+;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
+;@
+;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+;@
+;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+;@
+;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+;@
+;@-------------------------------------------------------------------------
diff --git a/uart05/uart05.c b/uart05/uart05.c
new file mode 100644
index 0000000..337db42
--- /dev/null
+++ b/uart05/uart05.c
@@ -0,0 +1,103 @@
+
+//-------------------------------------------------------------------------
+//-------------------------------------------------------------------------
+
+// 2  outer corner
+// 4
+// 6
+// 8  TX out
+// 10 RX in
+
+extern void PUT32 ( unsigned int, unsigned int );
+extern void PUT16 ( unsigned int, unsigned int );
+extern void PUT8 ( unsigned int, unsigned int );
+extern unsigned int GET32 ( unsigned int );
+extern unsigned int GETPC ( void );
+extern void dummy ( unsigned int );
+extern unsigned int BRANCHTO ( unsigned int );
+
+extern void uart_init ( void );
+extern unsigned int uart_lcr ( void );
+extern void uart_flush ( void );
+extern void uart_send ( unsigned int );
+extern unsigned int uart_recv ( void );
+extern unsigned int uart_check ( void );
+extern void hexstring ( unsigned int );
+extern void hexstrings ( unsigned int );
+extern void timer_init ( void );
+extern unsigned int timer_tick ( void );
+
+extern void timer_init ( void );
+extern unsigned int timer_tick ( void );
+
+//------------------------------------------------------------------------
+int notmain ( void )
+{
+    unsigned int ra;
+    uart_init();
+    hexstring(0x12345678);
+    hexstring(GETPC());
+
+    //e12fff1e    bx  lr
+    //ee100f10    mrc 15, 0, r0, cr0, cr0, {0}
+    //ee100f30    mrc 15, 0, r0, cr0, cr0, {1}
+    //ee100f50    mrc 15, 0, r0, cr0, cr0, {2}
+    //ee100f70    mrc 15, 0, r0, cr0, cr0, {3}
+    //ee100f90    mrc 15, 0, r0, cr0, cr0, {4}
+    //ee100fb0    mrc 15, 0, r0, cr0, cr0, {5}
+    //ee100fd0    mrc 15, 0, r0, cr0, cr0, {6}
+    //ee100ff0    mrc 15, 0, r0, cr0, cr0, {7}
+    //ee100f11    mrc 15, 0, r0, cr0, cr1, {0}
+    //ee100f31    mrc 15, 0, r0, cr0, cr1, {1}
+    //ee100f51    mrc 15, 0, r0, cr0, cr1, {2}
+    //ee100f71    mrc 15, 0, r0, cr0, cr1, {3}
+    //ee100f91    mrc 15, 0, r0, cr0, cr1, {4}
+    //ee100fb1    mrc 15, 0, r0, cr0, cr1, {5}
+    //ee100fd1    mrc 15, 0, r0, cr0, cr1, {6}
+    //ee100ff1    mrc 15, 0, r0, cr0, cr1, {7}
+    //ee100f12    mrc 15, 0, r0, cr0, cr2, {0}
+    //ee100f32    mrc 15, 0, r0, cr0, cr2, {1}
+    //ee100f52    mrc 15, 0, r0, cr0, cr2, {2}
+    //ee100f72    mrc 15, 0, r0, cr0, cr2, {3}
+    //ee100f92    mrc 15, 0, r0, cr0, cr2, {4}
+    //ee100fb2    mrc 15, 0, r0, cr0, cr2, {5}
+    //ee100fd2    mrc 15, 0, r0, cr0, cr2, {6}
+    //ee100ff2    mrc 15, 0, r0, cr0, cr2, {7}
+    for(ra=0;ra<8;ra++)
+    {
+        PUT32(0x4000,0xee100f10|(ra<<5));
+        PUT32(0x4004,0xe12fff1e);
+        hexstrings(ra);
+        hexstring(BRANCHTO(0x4000));
+    }
+    for(ra=0;ra<8;ra++)
+    {
+        PUT32(0x4000,0xee100f11|(ra<<5));
+        PUT32(0x4004,0xe12fff1e);
+        hexstrings(ra);
+        hexstring(BRANCHTO(0x4000));
+    }
+    for(ra=0;ra<8;ra++)
+    {
+        PUT32(0x4000,0xee100f12|(ra<<5));
+        PUT32(0x4004,0xe12fff1e);
+        hexstrings(ra);
+        hexstring(BRANCHTO(0x4000));
+    }
+    return(0);
+}
+//-------------------------------------------------------------------------
+//-------------------------------------------------------------------------
+
+
+//-------------------------------------------------------------------------
+//
+// Copyright (c) 2014 David Welch dwelch@dwelch.com
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+//
+//-------------------------------------------------------------------------