From c931c40686286a573efadf075892da0be834fdeb Mon Sep 17 00:00:00 2001 From: dwelch Date: Sat, 2 Jan 2016 17:31:26 -0500 Subject: [PATCH] updated readme --- multi00/README | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/multi00/README b/multi00/README index 007ce71..c274241 100644 --- a/multi00/README +++ b/multi00/README @@ -7,10 +7,17 @@ Derived from uart05 This is specific to the Raspberry Pi 2 as it experiments with the multiple processor cores. -So thanks to JS2 in the raspberry pi bare metal forum for the info +So thanks to JS2, rst, ultibo and others in the raspberry pi bare metal +forum for the info -Not sure where or if this is really documented. But if you write to -address +My current understanding is that the boot code that the GPU places +in ram that is run before branching to our code at 0x8000, causes the +other three cores to sit and wait for an event that comes through a +mailbox. I am still trying to understand the connection between the +mailbox and the ARM (does it create an interrupt? is the code polling +something, if so where exactly is this code, etc) + +So if you write to address 0x4000009C for core 1 0x400000AC for core 2