135 lines
3.4 KiB
ArmAsm
135 lines
3.4 KiB
ArmAsm
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;@-------------------------------------------------------------------------
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;@-------------------------------------------------------------------------
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.globl _start
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_start:
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ldr pc,reset_handler
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ldr pc,undefined_handler
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ldr pc,swi_handler
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ldr pc,prefetch_handler
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ldr pc,data_handler
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ldr pc,unused_handler
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ldr pc,irq_handler
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ldr pc,fiq_handler
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reset_handler: .word reset
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undefined_handler: .word undef
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swi_handler: .word hang
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prefetch_handler: .word hang
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data_handler: .word hang
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unused_handler: .word hang
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irq_handler: .word hang
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fiq_handler: .word hang
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reset:
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mov r0,#0x8000
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mov r1,#0x0000
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ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
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stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
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ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
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stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
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;@ enable fpu
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mrc p15, 0, r0, c1, c0, 2
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orr r0,r0,#0x300000 ;@ single precision
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orr r0,r0,#0xC00000 ;@ double precision
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mcr p15, 0, r0, c1, c0, 2
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mov r0,#0x40000000
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fmxr fpexc,r0
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mov sp,#0x00200000
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bl notmain
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hang: b hang
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.word 0
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.word 0
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undef: b .
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.word 0
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.word 0
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.globl PUT32
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PUT32:
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str r1,[r0]
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bx lr
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.globl GET32
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GET32:
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ldr r0,[r0]
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bx lr
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.globl dummy
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dummy:
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bx lr
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.globl start_l1cache
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start_l1cache:
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mov r0, #0
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mcr p15, 0, r0, c7, c7, 0 ;@ invalidate caches
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mcr p15, 0, r0, c8, c7, 0 ;@ invalidate tlb
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mrc p15, 0, r0, c1, c0, 0
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orr r0,r0,#0x1000 ;@ instruction
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orr r0,r0,#0x0004 ;@ data
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mcr p15, 0, r0, c1, c0, 0
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bx lr
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.globl stop_l1cache
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stop_l1cache:
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mrc p15, 0, r0, c1, c0, 0
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bic r0,r0,#0x1000 ;@ instruction
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bic r0,r0,#0x0004 ;@ data
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mcr p15, 0, r0, c1, c0, 0
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bx lr
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.globl m4add
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m4add:
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vmov s0,r0
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vmov s1,r1
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vadd.f32 s2,s0,s1
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vmov r0,s2
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bx lr
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.globl m4ftoi
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m4ftoi:
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vmov s0,r0
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;@ vcvt.s32.f32 s2,s0
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;@ftosis s2,s0
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vcvtr.s32.f32 s2,s0
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vmov r0,s2
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bx lr
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.globl m4itof
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m4itof:
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vmov s0,r0
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vcvt.f32.u32 s2,s0
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vmov r0,s2
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bx lr
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vcvt.s32.f32 s2,s0
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ftosis s2,s0
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ftosizs s2,s0
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;@-------------------------------------------------------------------------
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;@-------------------------------------------------------------------------
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;@-------------------------------------------------------------------------
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;@
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;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
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;@
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;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
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;@
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;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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;@
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;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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;@
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;@-------------------------------------------------------------------------
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