# Fubarino SD with UART2 console, UART1 enabled and with SRAMC SWAPDISK
# 
core pic32mx7 

# ! pin numbers here are the pin Ns. printed out on Fubarino board (ie. 12, 23)
mapping fubarino

linker bootloader

# 4MB CPLD sram ramdisk, BB, swap and filesystem, ! nmount=3 (rootfs+swap+tmpfs)
#option PARTITION=sramc0:sa@1500,fs@2572
#option PARTITION=sramc0:sa@1024,fs@3000
#device sramc data=16 lda=5 rd=15 wr=14

# 8MB CPLD sram ramdisk, PMP bus, swap and filesystem, ! nmount=3 (rootfs+swap+tmpfs)
# change the sramc-size in rd_sramc.c as well
option PARTITION=sramc0:sa@2048,fs@6140
# no pins defs - using PMP bus
device sramc

option nmount=3

device kernel cpu_khz=120000 bus_khz=120000 led=21

# Console UART2, tty = UART - 1
device console device=tty1
device uart2 baud=115200

# Additional UART1
device uart1 baud=115200

# SDcard
device sd0 port=2 cs=SS mhz=20

# NPROC=25 MAX
option nproc=25
option hz=1000
option nbuf=8

device adc
device spi
device oc
device gpio

# Bootloader section:

device bootloader led=21 button=23 crystal=8 jump=0x9d000000
# clock = crystal / pllidiv * pllmul
# usb == 48MHz = crystal / upllidiv * 12

# Bootloader: for 40MHz clock:
# option crystal=8
# option pllidiv=3
# option pllmul=15
# option upllidiv=2 

# Bootloader: for 80MHz clock:
# option crystal=8
# option pllidiv=2
# option pllmul=20
# option upllidiv=2 

# Bootloader: for 96MHz clock:
# option crystal=8
# option pllidiv=2
# option pllmul=24
# option upllidiv=2 

# Bootloader: for 120MHz clock:
option crystal=8
option pllidiv=1
option pllmul=15
option upllidiv=2
