From 3a4cc2d440b681822e104be8cff02439a7300f21 Mon Sep 17 00:00:00 2001 From: Serge Vakulenko Date: Sun, 20 Sep 2015 22:29:30 -0700 Subject: [PATCH] Update picga, mrams and spirams drivers. --- sys/pic32/picga.c | 74 ++++++++++----------- sys/pic32/rd_mrams.c | 102 ++++++++++++++--------------- sys/pic32/rd_spirams.c | 144 ++++++++++++++++++++--------------------- 3 files changed, 160 insertions(+), 160 deletions(-) diff --git a/sys/pic32/picga.c b/sys/pic32/picga.c index 98f9101..9414afd 100644 --- a/sys/pic32/picga.c +++ b/sys/pic32/picga.c @@ -38,64 +38,65 @@ const struct devspec picgadevs[] = { extern int uwritec(struct uio *); -int fd; +struct spiio picga_io; void blockdelay(unsigned int v) { - for( ; v>0 ; v--) + for(; v>0; v--) asm volatile ("nop"); } void picga_command(unsigned char cmd, unsigned char len, void *data) { + struct spiio *io = &picga_io; + char *p = (char *)data; - spi_select(fd); + spi_select(io); blockdelay(3000); - spi_transfer(fd,cmd); + spi_transfer(io, cmd); blockdelay(3000); - spi_transfer(fd,len); + spi_transfer(io, len); blockdelay(3000); - spi_transfer(fd,0); + spi_transfer(io, 0); blockdelay(3000); - while(len>0) - { - spi_transfer(fd,*p++); + while (len > 0) { + spi_transfer(io, *p++); blockdelay(3000); len--; } blockdelay(3000); - spi_deselect(fd); + spi_deselect(io); blockdelay(3000); } int picga_open(dev_t dev, int flag, int mode) { int channel; + struct spiio *io = &picga_io; struct intval i; struct coord2 j; channel = minor(dev); - if(channel>0) + if (channel > 0) return ENODEV; - fd = spi_open(PICGA_BUS,(unsigned int *)&PICGA_CS_PORT,PICGA_CS_PIN); - if(fd==-1) + if (spi_setup(io, PICGA_BUS,(unsigned int *)&PICGA_CS_PORT, PICGA_CS_PIN) != 0) return ENODEV; - spi_brg(fd,500); + spi_brg(io, 500); i.value = 0x01; - picga_command(SPI_FGCOLOR,sizeof(struct intval),&i); + picga_command(SPI_FGCOLOR, sizeof(struct intval), &i); i.value = 0x00; - picga_command(SPI_BGCOLOR,sizeof(struct intval),&i); + picga_command(SPI_BGCOLOR, sizeof(struct intval), &i); i.value = FONT_TOPAZ; - picga_command(SPI_FONT,sizeof(struct intval),&i); + picga_command(SPI_FONT, sizeof(struct intval), &i); j.x = 0; j.y = 0; - picga_command(SPI_CLUT,sizeof(struct coord2),&j); + picga_command(SPI_CLUT, sizeof(struct coord2), &j); j.x = 1; j.y = 0xFFFF; - picga_command(SPI_CLUT,sizeof(struct coord2),&j); + picga_command(SPI_CLUT, sizeof(struct coord2), &j); return 0; } @@ -105,7 +106,7 @@ int picga_close(dev_t dev, int flag, int mode) int channel; channel = minor(dev); - if (channel>0) + if (channel > 0) return ENODEV; return 0; @@ -126,39 +127,38 @@ int picga_write(dev_t dev, struct uio *uio, int flag) char c; channel = minor(dev); - if(channel>0) + if (channel > 0) return ENODEV; - while(uio->uio_iov->iov_len>0) + while (uio->uio_iov->iov_len > 0) { - p=0; - while((p<90) && (uio->uio_iov->iov_len>0)) + p = 0; + while (p < 90 && uio->uio_iov->iov_len > 0) { c = uwritec(uio); t[p++] = c; t[p] = 0; - if(c == '\n') + if (c == '\n') break; } - picga_command(SPI_PRINT,p,t); + picga_command(SPI_PRINT, p, t); blockdelay(50000); } return 0; } -int picga_ioctl(dev_t dev, register u_int cmd, caddr_t addr, int flag) +int picga_ioctl(dev_t dev, u_int cmd, caddr_t addr, int flag) { - printf("IOCTL %08X\n",cmd); + printf("IOCTL %08X\n", cmd); - switch(cmd) - { - case PICGA_CLS: - printf("CLS command\n"); - picga_command(SPI_CLS,0,NULL); - break; - default: - return EINVAL; + switch (cmd) { + case PICGA_CLS: + printf("CLS command\n"); + picga_command(SPI_CLS, 0, NULL); + break; + + default: + return EINVAL; } - return 0; } diff --git a/sys/pic32/rd_mrams.c b/sys/pic32/rd_mrams.c index 4ec15d8..5dd1740 100644 --- a/sys/pic32/rd_mrams.c +++ b/sys/pic32/rd_mrams.c @@ -20,7 +20,7 @@ #define MRAMS_MHZ 13 #endif -int fd[MRAMS_CHIPS]; +struct spiio mrams_io[MRAMS_CHIPS]; int mrams_size(int unit) { @@ -33,6 +33,7 @@ int mrams_size(int unit) unsigned int mr_read_block(unsigned int chip, unsigned int address, unsigned int length, char *data) { register unsigned int cs = 0; + struct spiio *io = &mrams_io[chip]; switch (chip) { case 0: @@ -61,23 +62,22 @@ unsigned int mr_read_block(unsigned int chip, unsigned int address, unsigned int break; } - spi_select(fd[chip]); - spi_transfer(fd[chip], MRAM_READ); - spi_transfer(fd[chip], address>>16); - spi_transfer(fd[chip], address>>8); - spi_transfer(fd[chip], address); + spi_select(io); + spi_transfer(io, MRAM_READ); + spi_transfer(io, address>>16); + spi_transfer(io, address>>8); + spi_transfer(io, address); // If the length is a multiple of 32 bits, then do a 32 bit transfer #if 0 if ((length & 3) == 0) - spi_bulk_read_32(fd[chip],length,data); + spi_bulk_read_32(io, length, data); else if ((length & 1) == 0) - spi_bulk_read_16(fd[chip],length,data); + spi_bulk_read_16(io, length, data); else #endif - spi_bulk_read(fd[chip],length,(unsigned char *)data); - - spi_deselect(fd[chip]); + spi_bulk_read(io, length, (unsigned char *)data); + spi_deselect(io); switch (chip) { case 0: @@ -135,6 +135,7 @@ int mrams_read(int unit, unsigned int offset, char *data, unsigned int bcount) unsigned int mr_write_block(unsigned int chip, unsigned int address, unsigned int length, char *data) { + struct spiio *io = &mrams_io[chip]; register unsigned int cs = 0; char blank __attribute__((unused)); @@ -165,22 +166,21 @@ unsigned int mr_write_block(unsigned int chip, unsigned int address, unsigned in break; } - spi_select(fd[chip]); - spi_transfer(fd[chip], MRAM_WRITE); - spi_transfer(fd[chip], address>>16); - spi_transfer(fd[chip], address>>8); - spi_transfer(fd[chip], address); + spi_select(io); + spi_transfer(io, MRAM_WRITE); + spi_transfer(io, address>>16); + spi_transfer(io, address>>8); + spi_transfer(io, address); #if 0 if ((length & 3) == 0) - spi_bulk_write_32(fd[chip],length,data); + spi_bulk_write_32(io, length, data); else if ((length & 1) == 0) - spi_bulk_write_16(fd[chip],length,data); + spi_bulk_write_16(io, length, data); else #endif - spi_bulk_write(fd[chip],length,(unsigned char *)data); - - spi_deselect(fd[chip]); + spi_bulk_write(io, length, (unsigned char *)data); + spi_deselect(io); switch (chip) { case 0: @@ -207,7 +207,7 @@ unsigned int mr_write_block(unsigned int chip, unsigned int address, unsigned in return cs; } -int mrams_write (int unit, unsigned int offset, char *data, unsigned bcount) +int mrams_write(int unit, unsigned int offset, char *data, unsigned bcount) { register unsigned int chip; register unsigned int address; @@ -236,8 +236,9 @@ int mrams_write (int unit, unsigned int offset, char *data, unsigned bcount) return 1; } -void mrams_preinit (int unit) +void mrams_preinit(int unit) { + struct spiio *io = &mrams_io[0]; struct buf *bp; if (unit >= 1) @@ -245,50 +246,49 @@ void mrams_preinit (int unit) /* Initialize hardware. */ - fd[0] = spi_open(MRAMS_PORT,(unsigned int *)&MRAMS_CS0_PORT,MRAMS_CS0_PIN); - if (fd[0] == -1) + if (spi_setup(io, MRAMS_PORT, (unsigned int *)&MRAMS_CS0_PORT, MRAMS_CS0_PIN) != 0) return; - spi_brg(fd[0],MRAMS_MHZ * 1000); - spi_set(fd[0],PIC32_SPICON_CKE); - spi_select(fd[0]); - spi_transfer(fd[0],MRAM_WREN); - spi_deselect(fd[0]); + spi_brg(io, MRAMS_MHZ * 1000); + spi_set(io, PIC32_SPICON_CKE); + spi_select(io); + spi_transfer(io, MRAM_WREN); + spi_deselect(io); #ifdef MRAMS_CS1_PORT - fd[1] = spi_open(MRAMS_PORT,(unsigned int *)&MRAMS_CS1_PORT,MRAMS_CS1_PIN); + spi_setup(io+1, MRAMS_PORT, (unsigned int *)&MRAMS_CS1_PORT, MRAMS_CS1_PIN); - spi_brg(fd[1],MRAMS_MHZ * 1000); - spi_set(fd[1],PIC32_SPICON_CKE); - spi_select(fd[1]); - spi_transfer(fd[1],MRAM_WREN); - spi_deselect(fd[1]); + spi_brg(io+1, MRAMS_MHZ * 1000); + spi_set(io+1, PIC32_SPICON_CKE); + spi_select(io+1); + spi_transfer(io+1, MRAM_WREN); + spi_deselect(io+1); #endif #ifdef MRAMS_CS2_PORT - fd[2] = spi_open(MRAMS_PORT,(unsigned int *)&MRAMS_CS2_PORT,MRAMS_CS2_PIN); + spi_setup(io+2, MRAMS_PORT, (unsigned int *)&MRAMS_CS2_PORT, MRAMS_CS2_PIN); - spi_brg(fd[2],MRAMS_MHZ * 1000); - spi_set(fd[2],PIC32_SPICON_CKE); - spi_select(fd[2]); - spi_transfer(fd[2],MRAM_WREN); - spi_deselect(fd[2]); + spi_brg(io+2, MRAMS_MHZ * 1000); + spi_set(io+2, PIC32_SPICON_CKE); + spi_select(io+2); + spi_transfer(io+2, MRAM_WREN); + spi_deselect(io+2); #endif #ifdef MRAMS_CS3_PORT - fd[3] = spi_open(MRAMS_PORT,(unsigned int *)&MRAMS_CS3_PORT,MRAMS_CS3_PIN); + spi_setup(io+3, MRAMS_PORT, (unsigned int *)&MRAMS_CS3_PORT, MRAMS_CS3_PIN); - spi_brg(fd[3],MRAMS_MHZ * 1000); - spi_set(fd[3],PIC32_SPICON_CKE); - spi_select(fd[3]); - spi_transfer(fd[3],MRAM_WREN); - spi_deselect(fd[3]); + spi_brg(io+3, MRAMS_MHZ * 1000); + spi_set(io+3, PIC32_SPICON_CKE); + spi_select(io+3); + spi_transfer(io+3, MRAM_WREN); + spi_deselect(io+3); #endif printf("mrams0: port %s, size %dKB, speed %d Mbit/sec\n", - spi_name(MRAMS_PORT),MRAMS_CHIPS * MRAMS_CHIPSIZE, - spi_get_brg(fd[0]) / 1000); + spi_name(MRAMS_PORT), MRAMS_CHIPS * MRAMS_CHIPSIZE, + spi_get_brg(io) / 1000); bp = prepartition_device("mrams0"); if (bp) { - mrams_write (0, 0, bp->b_addr, 512); + mrams_write(0, 0, bp->b_addr, 512); brelse(bp); } } diff --git a/sys/pic32/rd_spirams.c b/sys/pic32/rd_spirams.c index 8891c98..6e79cc1 100644 --- a/sys/pic32/rd_spirams.c +++ b/sys/pic32/rd_spirams.c @@ -20,7 +20,7 @@ #define SPIRAMS_MHZ 10 #endif -int fd[SPIRAMS_CHIPS]; +struct spiio spirams_io[SPIRAMS_CHIPS]; int spirams_size(int unit) { @@ -32,6 +32,7 @@ int spirams_size(int unit) unsigned int spir_read_block(unsigned int chip, unsigned int address, unsigned int length, char *data) { + struct spiio *io = &spirams_io[chip]; register unsigned int cs = 0; switch (chip) { @@ -133,23 +134,22 @@ unsigned int spir_read_block(unsigned int chip, unsigned int address, unsigned i break; } - spi_select(fd[chip]); - spi_transfer(fd[chip], SPIRAM_READ); - spi_transfer(fd[chip], address>>16); - spi_transfer(fd[chip], address>>8); - spi_transfer(fd[chip], address); + spi_select(io); + spi_transfer(io, SPIRAM_READ); + spi_transfer(io, address >> 16); + spi_transfer(io, address >> 8); + spi_transfer(io, address); // If the length is a multiple of 32 bits, then do a 32 bit transfer #if 0 if ((length & 3) == 0) - spi_bulk_read_32(fd[chip], length, data); + spi_bulk_read_32(io, length, data); else if ((length & 1) == 0) - spi_bulk_read_16(fd[chip], length, data); + spi_bulk_read_16(io, length, data); else #endif - spi_bulk_read(fd[chip], length, (unsigned char *)data); - - spi_deselect(fd[chip]); + spi_bulk_read(io, length, (unsigned char *)data); + spi_deselect(io); switch (chip) { case 0: @@ -207,6 +207,7 @@ int spirams_read(int unit, unsigned int offset, char *data, unsigned int bcount) unsigned int spir_write_block(unsigned int chip, unsigned int address, unsigned int length, char *data) { + struct spiio *io = &spirams_io[chip]; register unsigned int cs = 0; char blank __attribute__((unused)); @@ -237,22 +238,21 @@ unsigned int spir_write_block(unsigned int chip, unsigned int address, unsigned break; } - spi_select(fd[chip]); - spi_transfer(fd[chip], SPIRAM_WRITE); - spi_transfer(fd[chip], address>>16); - spi_transfer(fd[chip], address>>8); - spi_transfer(fd[chip], address); + spi_select(io); + spi_transfer(io, SPIRAM_WRITE); + spi_transfer(io, address >> 16); + spi_transfer(io, address >> 8); + spi_transfer(io, address); #if 0 if ((length & 3) == 0) - spi_bulk_write_32(fd[chip],length,data); + spi_bulk_write_32(io, length, data); else if ((length & 1) == 0) - spi_bulk_write_16(fd[chip],length,data); + spi_bulk_write_16(io, length, data); else #endif - spi_bulk_write(fd[chip], length, (unsigned char *)data); - - spi_deselect(fd[chip]); + spi_bulk_write(io, length, (unsigned char *)data); + spi_deselect(io); switch (chip) { case 0: @@ -310,6 +310,7 @@ int spirams_write (int unit, unsigned int offset, char *data, unsigned bcount) void spirams_preinit (int unit) { + struct spiio *io = &spirams_io[0]; struct buf *bp; if (unit >= 1) @@ -317,107 +318,106 @@ void spirams_preinit (int unit) /* Initialize hardware. */ - fd[0] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS0_PORT,SPIRAMS_CS0_PIN); - if (fd[0] == -1) + if (spi_setup(io, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS0_PORT,SPIRAMS_CS0_PIN) != 0) return; - spi_brg(fd[0],SPIRAMS_MHZ * 1000); - spi_set(fd[0],PIC32_SPICON_CKE); + spi_brg(io, SPIRAMS_MHZ * 1000); + spi_set(io, PIC32_SPICON_CKE); #ifdef SPIRAMS_CS1_PORT - fd[1] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS1_PORT,SPIRAMS_CS1_PIN); + spi_setup(io+1, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS1_PORT,SPIRAMS_CS1_PIN); - spi_brg(fd[1],SPIRAMS_MHZ * 1000); - spi_set(fd[1],PIC32_SPICON_CKE); + spi_brg(io+1, SPIRAMS_MHZ * 1000); + spi_set(io+1, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS2_PORT - fd[2] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS2_PORT,SPIRAMS_CS2_PIN); + spi_setup(io+2, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS2_PORT,SPIRAMS_CS2_PIN); - spi_brg(fd[2],SPIRAMS_MHZ * 1000); - spi_set(fd[2],PIC32_SPICON_CKE); + spi_brg(io+2, SPIRAMS_MHZ * 1000); + spi_set(io+2, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS3_PORT - fd[3] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS3_PORT,SPIRAMS_CS3_PIN); + spi_setup(io+3, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS3_PORT,SPIRAMS_CS3_PIN); - spi_brg(fd[3],SPIRAMS_MHZ * 1000); - spi_set(fd[3],PIC32_SPICON_CKE); + spi_brg(io+3, SPIRAMS_MHZ * 1000); + spi_set(io+3, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS4_PORT - fd[4] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS4_PORT,SPIRAMS_CS4_PIN); + spi_setup(io+4, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS4_PORT,SPIRAMS_CS4_PIN); - spi_brg(fd[4],SPIRAMS_MHZ * 1000); - spi_set(fd[4],PIC32_SPICON_CKE); + spi_brg(io+4, SPIRAMS_MHZ * 1000); + spi_set(io+4, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS5_PORT - fd[5] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS5_PORT,SPIRAMS_CS5_PIN); + spi_setup(io+5, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS5_PORT,SPIRAMS_CS5_PIN); - spi_brg(fd[5],SPIRAMS_MHZ * 1000); - spi_set(fd[5],PIC32_SPICON_CKE); + spi_brg(io+5, SPIRAMS_MHZ * 1000); + spi_set(io+5, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS6_PORT - fd[6] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS6_PORT,SPIRAMS_CS6_PIN); + spi_setup(io+6, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS6_PORT,SPIRAMS_CS6_PIN); - spi_brg(fd[6],SPIRAMS_MHZ * 1000); - spi_set(fd[6],PIC32_SPICON_CKE); + spi_brg(io+6, SPIRAMS_MHZ * 1000); + spi_set(io+6, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS7_PORT - fd[7] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS7_PORT,SPIRAMS_CS7_PIN); + spi_setup(io+7, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS7_PORT,SPIRAMS_CS7_PIN); - spi_brg(fd[7],SPIRAMS_MHZ * 1000); - spi_set(fd[7],PIC32_SPICON_CKE); + spi_brg(io+7, SPIRAMS_MHZ * 1000); + spi_set(io+7, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS8_PORT - fd[8] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS8_PORT,SPIRAMS_CS8_PIN); + spi_setup(io+8, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS8_PORT,SPIRAMS_CS8_PIN); - spi_brg(fd[8],SPIRAMS_MHZ * 1000); - spi_set(fd[8],PIC32_SPICON_CKE); + spi_brg(io+8, SPIRAMS_MHZ * 1000); + spi_set(io+8, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS9_PORT - fd[9] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS9_PORT,SPIRAMS_CS9_PIN); + spi_setup(io+9, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS9_PORT,SPIRAMS_CS9_PIN); - spi_brg(fd[9],SPIRAMS_MHZ * 1000); - spi_set(fd[9],PIC32_SPICON_CKE); + spi_brg(io+9, SPIRAMS_MHZ * 1000); + spi_set(io+9, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS10_PORT - fd[10] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS10_PORT,SPIRAMS_CS10_PIN); + spi_setup(io+10, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS10_PORT,SPIRAMS_CS10_PIN); - spi_brg(fd[10],SPIRAMS_MHZ * 1000); - spi_set(fd[10],PIC32_SPICON_CKE); + spi_brg(io+10, SPIRAMS_MHZ * 1000); + spi_set(io+10, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS11_PORT - fd[11] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS11_PORT,SPIRAMS_CS11_PIN); + spi_setup(io+11, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS11_PORT,SPIRAMS_CS11_PIN); - spi_brg(fd[11],SPIRAMS_MHZ * 1000); - spi_set(fd[11],PIC32_SPICON_CKE); + spi_brg(io+11, SPIRAMS_MHZ * 1000); + spi_set(io+11, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS12_PORT - fd[12] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS12_PORT,SPIRAMS_CS12_PIN); + spi_setup(io+12, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS12_PORT,SPIRAMS_CS12_PIN); - spi_brg(fd[12],SPIRAMS_MHZ * 1000); - spi_set(fd[12],PIC32_SPICON_CKE); + spi_brg(io+12, SPIRAMS_MHZ * 1000); + spi_set(io+12, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS13_PORT - fd[13] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS13_PORT,SPIRAMS_CS13_PIN); + spi_setup(io+13, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS13_PORT,SPIRAMS_CS13_PIN); - spi_brg(fd[13],SPIRAMS_MHZ * 1000); - spi_set(fd[13],PIC32_SPICON_CKE); + spi_brg(io+13, SPIRAMS_MHZ * 1000); + spi_set(io+13, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS14_PORT - fd[14] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS14_PORT,SPIRAMS_CS14_PIN); + spi_setup(io+14, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS14_PORT,SPIRAMS_CS14_PIN); - spi_brg(fd[14],SPIRAMS_MHZ * 1000); - spi_set(fd[14],PIC32_SPICON_CKE); + spi_brg(io+14, SPIRAMS_MHZ * 1000); + spi_set(io+14, PIC32_SPICON_CKE); #endif #ifdef SPIRAMS_CS15_PORT - fd[15] = spi_open(SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS15_PORT,SPIRAMS_CS15_PIN); + spi_setup(io+15, SPIRAMS_PORT,(unsigned int *)&SPIRAMS_CS15_PORT,SPIRAMS_CS15_PIN); - spi_brg(fd[15],SPIRAMS_MHZ * 1000); - spi_set(fd[15],PIC32_SPICON_CKE); + spi_brg(io+15, SPIRAMS_MHZ * 1000); + spi_set(io+15, PIC32_SPICON_CKE); #endif printf("spirams0: port %d %s, size %dKB, speed %d Mbit/sec\n", - SPIRAMS_PORT, spi_name(fd[0]),SPIRAMS_CHIPS * SPIRAMS_CHIPSIZE, - spi_get_brg(fd[0]) / 1000); + SPIRAMS_PORT, spi_name(io), SPIRAMS_CHIPS * SPIRAMS_CHIPSIZE, + spi_get_brg(io) / 1000); bp = prepartition_device("spirams0"); if (bp) { spirams_write (0, 0, bp->b_addr, 512);