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Added comfiguration for Majenko SDXL board.

Browse Source 
DIP and Pinguino-micro boards removed - nobody uses these.
Deleted unused linker scripts.
This commit is contained in:
Sergey
2014-10-04 13:57:03 -07:00
parent d5e30d7b79
commit 64430a0f91
40 changed files with 76 additions and 2766 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
Makefile
View File

@@ -24,12 +24,11 @@ DUINOMITE = sys/pic32/duinomite/DUINOMITE
DUINOMITEUART = sys/pic32/duinomite-uart/DUINOMITE-UART
DUINOMITEE = sys/pic32/duinomite-e/DUINOMITE-E
DUINOMITEEUART = sys/pic32/duinomite-e-uart/DUINOMITE-E-UART
PINGUINO = sys/pic32/pinguino-micro/PINGUINO-MICRO
DIP = sys/pic32/dip/DIP
BAREMETAL = sys/pic32/baremetal/BAREMETAL
RETROONE = sys/pic32/retroone/RETROONE
FUBARINO = sys/pic32/fubarino/FUBARINO
FUBARINOBIG = sys/pic32/fubarino/FUBARINO-UART2CONS-UART1-SRAMC
SDXL = sys/pic32/sdxl/SDXL
MMBMX7 = sys/pic32/mmb-mx7/MMB-MX7
# Select target board

3
README.md
View File

@@ -45,8 +45,6 @@ TARGET = $(DUINOMITE) # for the Duinomite board with USB console
TARGET = $(DUINOMITEUART) # for the Duinomite board with UART console
TARGET = $(DUINOMITEE) # for the Duinomite E board with USB console
TARGET = $(DUINOMITEEUART) # for the Duinomite E board with UART console
TARGET = $(PINGUINO) # for the Pinguino-Micro board
TARGET = $(DIP) # for the DIP board
TARGET = $(BAREMETAL) # Bare PIC32 chip on a breakout board
TARGET = $(FUBARINO) # Fubarino SD board
TARGET = $(FUBARINOBIG) # Fubarino SD board with 8MB SRAM RAMDISK
@@ -163,4 +161,3 @@ For building under Ubuntu you need the following packages installed:
```shell
$ sudo apt-get install byacc libelf-dev
```

134
sys/pic32/32mxsdram-uart/using-bootloader-ker.ld
View File

@@ -1,134 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 0x62C0
u0area (rw!x): ORIGIN = 0x800062C0, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80006EC0, LENGTH = 3K
keram (rwx) : ORIGIN = 0x80007AC0, LENGTH = 0x540
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
_keram_start = ORIGIN(keram);
_keram_end = ORIGIN(keram) + LENGTH(keram);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/*
* RAM functions go at the end of our stack and heap allocation.
* Alignment of 2K required by the boundary register (BMXDKPBA).
*/
.ramfunc : AT (LOADADDR (.data) + SIZEOF (.data))
{
_ramfunc_begin = . ;
*(.ramfunc .ramfunc.*)
. = ALIGN(4) ;
_ramfunc_end = . ;
} >keram
_ramfunc_image_begin = LOADADDR(.ramfunc) ;
_ramfunc_length = SIZEOF(.ramfunc) ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

115
sys/pic32/32mxsdram-uart/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

4
sys/pic32/Makefile
View File

@@ -1,9 +1,9 @@
# Programs that live in subdirectories, and have makefiles of their own.
#
SUBDIR = baremetal dip duinomite duinomite-uart duinomite-e \
SUBDIR = baremetal duinomite duinomite-uart duinomite-e \
duinomite-e-uart explorer16 max32 max32-eth maximite \
meb pinguino-micro starter-kit ubw32 ubw32-uart \
meb starter-kit sdxl ubw32 ubw32-uart \
ubw32-uart-sdram baremetal fubarino mmb-mx7 maximite-color \
32mxsdram-uart picadillo

1
sys/pic32/baremetal/.gitignore vendored
View File

@@ -3,6 +3,7 @@
.oldversion
machine
sys
boot.bin
unix.bin
unix.map
usbboot.map

186
sys/pic32/baremetal/bare-metal.ld
View File

@@ -1,186 +0,0 @@
/*
* Linker script for PIC32 firmware.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
devcfg (r) : ORIGIN = 0x9fc02ff0, LENGTH = 16
/* flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 24K
u0area (rw!x): ORIGIN = 0x80006000, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80006C00, LENGTH = 3K
keram (rwx) : ORIGIN = 0x80007800, LENGTH = 2K*/
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 512K
exception_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x1000
kseg0_boot_mem (rx) : ORIGIN = 0x9FC00000, LENGTH = 12K-16
kseg1_boot_mem (rx) : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = 0x0000;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.gnu.version : { *(.gnu.version) }
.gnu.version_d : { *(.gnu.version_d) }
.gnu.version_r : { *(.gnu.version_r) }
.rel.init : { *(.rel.init) }
.rela.init : { *(.rela.init) }
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) }
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
.rel.fini : { *(.rel.fini) }
.rela.fini : { *(.rela.fini) }
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) }
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) }
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) }
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.sdata : { *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) }
.rela.sdata : { *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) }
.rel.sbss : { *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) }
.rela.sbss : { *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) }
.rel.sdata2 : { *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) }
.rela.sdata2 : { *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) }
.rel.sbss2 : { *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) }
.rela.sbss2 : { *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) }
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) }
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.plt : { *(.plt) }
.boot :
{
/* Execution starts here. */
*(.startup)
} > kseg0_boot_mem
.text :
{
/* Exception handlers. */
*(.exception)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > kseg0_program_mem
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We have only 32k RAM on MC-24, so no need for 0x8000 offset. */
*(.data .data.* .gnu.linkonce.d.*)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.eh_frame)
_edata = .;
} > ram
/* Device configuration. */
.config :
{
*(.config3)
*(.config2)
*(.config1)
*(.config0)
} > devcfg
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/*
* RAM functions go at the end of our stack and heap allocation.
* Alignment of 2K required by the boundary register (BMXDKPBA).
*/
/*
.ramfunc : AT (LOADADDR (.data) + SIZEOF (.data))
{
_ramfunc_begin = . ;
*(.ramfunc .ramfunc.*)
. = ALIGN(4) ;
_ramfunc_end = . ;
} >keram
_ramfunc_image_begin = LOADADDR(.ramfunc) ;
_ramfunc_length = SIZEOF(.ramfunc) ;
*/
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

2
sys/pic32/cfg/boot.ld
View File

@@ -1,7 +1,7 @@
/*
* Linker script for PIC32 bootloader.
*/
OUTPUT_FORMAT("elf32-tradlittlemips")
OUTPUT_FORMAT("elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_start)
MEMORY

4
sys/pic32/diag/Makefile
View File

@@ -18,7 +18,7 @@ DEFS += -DBUS_KHZ=80000
# Ethernet/USB Starter Kit with I/O Expansion board
# =================================================
#
#LDSCRIPT = ../strater-kit/using-bootloader.ld
#LDSCRIPT = ../cfg/bootloader.ld
# Console on USB
# For Windows, use the driver: http://www.schmalzhaus.com/UBW32/FW/UBW32inf.zip
@@ -39,7 +39,7 @@ DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3 -DUSB_MAX_EP_NUMBER=3
# UBW32 board
# ===========
#
LDSCRIPT = ../ubw32/using-bootloader.ld
LDSCRIPT = ../cfg/bootloader-ubw32.ld
# SD/MMC card driver on SPI1
# /CS0 at pin A9 (and optional /CS1 at pin A10)

23
sys/pic32/diag/main.c
View File

@@ -1,3 +1,7 @@
/*
* Standalone test of SD card driver.
* Broken since rdisk implemented.
*/
#include "param.h"
#include "conf.h"
#include "systm.h"
@@ -9,7 +13,7 @@
size_t physmem; /* total amount of physical memory */
u_int swapstart, nswap; /* start and size of swap space */
const struct linesw linesw[] = { { 0 } };
//const struct linesw linesw[] = { { 0 } };
int nldisp = 1;
char data [SECTSIZE * 2];
@@ -17,6 +21,8 @@ char data [SECTSIZE * 2];
extern int card_size (int unit, unsigned *nsectors);
extern int card_read (int unit, unsigned offset, char *data, unsigned bcount);
extern int card_write (int unit, unsigned offset, char *data, unsigned bcount);
extern void sd_preinit(int unit);
extern void usbintr (int chan);
static void
fill_sector (p, byte0, byte1)
@@ -143,9 +149,7 @@ getcmd:
case '\n': case '\r':
break;
case '1':
if (sdopen (0, 0, 0) == 0) {
printf ("Card initialized successfully.\n");
}
sd_preinit(0);
break;
case '2':
if (card_size (0, &nsectors))
@@ -345,10 +349,9 @@ void
exception (frame) /* exception.c */
int *frame;
{
unsigned c, irq, status, cause;
unsigned c, irq, cause;
led_control (LED_KERNEL, 1);
status = frame [FRAME_STATUS];
cause = mips_read_c0_register (C0_CAUSE, 0);
if ((cause & CA_EXC_CODE) != CA_Int) {
@@ -380,11 +383,13 @@ exception (frame) /* exception.c */
} while ((int) (c - mips_read_c0_register (C0_COUNT, 0)) < 0);
IFSCLR(0) = 1 << PIC32_IRQ_CT;
int status = frame [FRAME_STATUS];
hardclock ((caddr_t) frame [FRAME_PC], status);
#endif
#ifdef CONSOLE_USB
/* Poll USB on every timer tick. */
cnintr (0);
usbintr (0);
#endif
break;
#if defined(CONSOLE_UART1) || defined(CONSOLE_UART2) || \
@@ -408,13 +413,13 @@ defined(CONSOLE_UART5) || defined(CONSOLE_UART6)
#if CONSOLE_UART6
case PIC32_VECT_U6: /* UART6 */
#endif
cnintr (0);
uartintr(makedev(UART_MAJOR,0));
break;
#endif
#ifdef CONSOLE_USB
case PIC32_VECT_USB: /* USB */
IFSCLR(1) = 1 << (PIC32_IRQ_USB - 32);
cnintr (0);
usbintr (0);
break;
#endif
default:

22
sys/pic32/dip/DIP
View File

@@ -1,22 +0,0 @@
#
# eflightworks DIP board
# ======================
#
# Console on USB
# For Windows, use the driver: http://www.schmalzhaus.com/UBW32/FW/UBW32inf.zip
core pic32mx7
mapping generic
linker bare
device kernel led=E5
device console device=ttyUSB0 led=E6
device uartusb
device rdisk led=E4 swap=E7
device sd0 port=3 cs=D4
device gpio
device bootloader button=D6 jump=0x9d000000 led=E7 invled2=E6 clear=E4 clear2=E5

91
sys/pic32/dip/Makefile
View File

@@ -1,91 +0,0 @@
BUILDPATH = ../../../tools/configsys/../../sys/pic32
H = ../../../tools/configsys/../../sys/include
M = ../../../tools/configsys/../../sys/pic32
S = ../../../tools/configsys/../../sys/kernel
vpath %.c $(M):$(S)
vpath %.S $(M):$(S)
KERNOBJ += clock.o cons.o devsw.o exception.o exec_aout.o exec_conf.o exec_elf.o exec_script.o exec_subr.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o rd_sd.o rdisk.o signal.o spi_bus.o startup.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o usb_device.o usb_function_cdc.o usb_uart.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
EXTRA_TARGETS = bootloader
DEFS += -DBL_BUTTON_PIN=6
DEFS += -DBL_BUTTON_PORT=TRISD
DEFS += -DBL_CLEAR2_PIN=5
DEFS += -DBL_CLEAR2_PORT=TRISE
DEFS += -DBL_CLEAR_PIN=4
DEFS += -DBL_CLEAR_PORT=TRISE
DEFS += -DBL_LED2_INVERT
DEFS += -DBL_LED2_PIN=6
DEFS += -DBL_LED2_PORT=TRISE
DEFS += -DBL_LED_PIN=7
DEFS += -DBL_LED_PORT=TRISE
DEFS += -DBUS_DIV=1
DEFS += -DBUS_KHZ='CPU_KHZ/BUS_DIV'
DEFS += -DCONSOLE_DEVICE=ttyUSB0
DEFS += -DCPU_IDIV=2
DEFS += -DCPU_KHZ='((CRYSTAL*1000)/CPU_IDIV*CPU_MUL/CPU_ODIV)'
DEFS += -DCPU_MUL=20
DEFS += -DCPU_ODIV=1
DEFS += -DCRYSTAL=8
DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
DEFS += -DDC0_ICE=0
DEFS += -DDC1_CKM=0
DEFS += -DDC1_CKS=0
DEFS += -DDC1_FNOSC=DEVCFG1_FNOSC_PRIPLL
DEFS += -DDC1_IESO=DEVCFG1_IESO
DEFS += -DDC1_OSCIOFNC=0
DEFS += -DDC1_PBDIV=DEVCFG1_FPBDIV_1
DEFS += -DDC1_POSCMOD=DEVCFG1_POSCMOD_HS
DEFS += -DDC1_SOSC=0
DEFS += -DDC1_WDTEN=0
DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_2
DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_20
DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
DEFS += -DDC2_UPLL=0
DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_2
DEFS += -DDC3_CAN=DEVCFG3_FCANIO
DEFS += -DDC3_ETH=DEVCFG3_FETHIO
DEFS += -DDC3_MII=DEVCFG3_FMIIEN
DEFS += -DDC3_SRS=DEVCFG3_FSRSSEL_7
DEFS += -DDC3_USBID=DEVCFG3_FUSBIDIO
DEFS += -DDC3_USERID=0xffff
DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
DEFS += -DEXEC_AOUT
DEFS += -DEXEC_ELF
DEFS += -DEXEC_SCRIPT
DEFS += -DFLASH_JUMP=0x9d000000
DEFS += -DGPIO_ENABLED=YES
DEFS += -DHID_FEATURE_REPORT_BYTES=2
DEFS += -DHID_INPUT_REPORT_BYTES=2
DEFS += -DHID_INT_IN_EP_SIZE=64
DEFS += -DHID_INT_OUT_EP_SIZE=64
DEFS += -DHID_OUTPUT_REPORT_BYTES=2
DEFS += -DHID_RPT01_SIZE=29
DEFS += -DKERNEL
DEFS += -DLED_DISK_PIN=4
DEFS += -DLED_DISK_PORT=TRISE
DEFS += -DLED_KERNEL_PIN=5
DEFS += -DLED_KERNEL_PORT=TRISE
DEFS += -DLED_SWAP_PIN=7
DEFS += -DLED_SWAP_PORT=TRISE
DEFS += -DLED_TTY_PIN=6
DEFS += -DLED_TTY_PORT=TRISE
DEFS += -DPIC32MX7
DEFS += -DSD0_CS_PIN=4
DEFS += -DSD0_CS_PORT=TRISD
DEFS += -DSD0_PORT=3
DEFS += -DUARTUSB_ENABLED=YES
DEFS += -DUCB_METER
DEFS += -DUSB_EP0_BUFF_SIZE=8
DEFS += -DUSB_MAX_EP_NUMBER=3
DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3
LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bare.ld
CONFIG = DIP
CONFIGPATH = ../../../tools/configsys
include ../../../tools/configsys/../../sys/pic32/kernel-post.mk

162
sys/pic32/dip/bare-metal.ld
View File

@@ -1,162 +0,0 @@
/*
* Linker script for PIC32 firmware.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
devcfg (r) : ORIGIN = 0x9fc02ff0, LENGTH = 16
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 512K
exception_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x1000
kseg0_boot_mem (rx) : ORIGIN = 0x9FC00000, LENGTH = 12K-16
kseg1_boot_mem (rx) : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
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}

25
sys/pic32/dip/devcfg.c
View File

@@ -1,25 +0,0 @@
/*
* Chip configuration.
*/
#include "machine/pic32mx.h"
PIC32_DEVCFG (
DEVCFG0_DEBUG_ENABLED | /* ICE debugger disabled */
DEVCFG0_ICESEL, /* Use PGC1/PGD1 */
DEVCFG1_FNOSC_PRIPLL | /* Primary oscillator with PLL */
DEVCFG1_POSCMOD_HS | /* HS oscillator */
DEVCFG1_OSCIOFNC | /* CLKO output active */
DEVCFG1_FPBDIV_1 | /* Peripheral bus clock = SYSCLK/1 */
DEVCFG1_FCKM_DISABLE | /* Fail-safe clock monitor disable */
DEVCFG1_FCKS_DISABLE | /* Clock switching disable */
DEVCFG1_WDTPS_1024, /* Watchdog postscale = 1/1024 */
DEVCFG2_FPLLIDIV_2 | /* PLL divider = 1/2 */
DEVCFG2_FPLLMUL_20 | /* PLL multiplier = 20x */
DEVCFG2_UPLLIDIV_2 | /* USB PLL divider = 1/2 */
DEVCFG2_FPLLODIV_1, /* PLL postscaler = 1/1 */
DEVCFG3_USERID(0xffff) | /* User-defined ID */
DEVCFG3_FSRSSEL_7 | /* Assign irq priority 7 to shadow set */
DEVCFG3_FETHIO); /* Default Ethernet i/o pins */

114
sys/pic32/dip/using-bootloader.ld
View File

@@ -1,114 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00000, LENGTH = 0
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x1000
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
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/* Stabs debugging sections. */
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}

115
sys/pic32/duinomite-uart/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d003000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
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kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
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u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
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115
sys/pic32/duinomite/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d003000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
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SECTIONS
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162
sys/pic32/explorer16/bare-metal.ld
View File

@@ -1,162 +0,0 @@
/*
* Linker script for PIC32 firmware.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
devcfg (r) : ORIGIN = 0x9fc02ff0, LENGTH = 16
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 512K
exception_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x1000
kseg0_boot_mem (rx) : ORIGIN = 0x9FC00000, LENGTH = 12K-16
kseg1_boot_mem (rx) : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
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u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
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114
sys/pic32/fubarino/using-bootloader.ld
View File

@@ -1,114 +0,0 @@
/*
* Linker script for PIC32 firmware using RetroBSD bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
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ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
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kseg0_boot_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
exception_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
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u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
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115
sys/pic32/max32-eth/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
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uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
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kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
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kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
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SECTIONS
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115
sys/pic32/max32/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
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OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
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kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
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.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

115
sys/pic32/maximite/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d003000, LENGTH = 512K-12K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
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.stab.index 0 : { *(.stab.index) }
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/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
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/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
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/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
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.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

114
sys/pic32/meb/using-bootloader.ld
View File

@@ -1,114 +0,0 @@
/*
* Linker script for PIC32 firmware using RetroBSD bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
exception_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
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_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
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.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
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/* DWARF 1.1 and DWARF 2 */
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/* DWARF 2 */
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.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

0
sys/pic32/dip/.gitignore → sys/pic32/picadillo/.gitignore vendored
View File

0
sys/pic32/pinguino-micro/.gitignore → sys/pic32/picadillo_rambo/.gitignore vendored
View File

22
sys/pic32/pinguino-micro/PINGUINO-MICRO
View File

@@ -1,22 +0,0 @@
#
# Pinguino-micro board
# ====================
#
# Console on USB
# For Windows, use the driver: http://www.schmalzhaus.com/UBW32/FW/UBW32inf.zip
core pic32mx7
linker bootloader-ubw32
mapping generic
device kernel invled=D1
device console device=ttyUSB0
device uartusb
device sd0 port=2 cs=B13
device gpio
device adc
device bootloader button=E7 led=E3 user=0x1d005000

115
sys/pic32/pinguino-micro/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

8
sys/pic32/retroone/Makefile
View File

@@ -62,7 +62,7 @@ include ../gcc-config.mk
CC = $(GCCPREFIX)gcc -EL -g -mips32r2
CC += -nostdinc -fno-builtin -Werror -Wall -fno-dwarf2-cfi-asm
LDFLAGS += -nostdlib -T bare-metal.ld -Wl,-Map=unix.map
LDFLAGS += -nostdlib -T ../cfg/bare.ld -Wl,-Map=unix.map
SIZE = $(GCCPREFIX)size
OBJDUMP = $(GCCPREFIX)objdump
OBJCOPY = $(GCCPREFIX)objcopy
@@ -81,7 +81,7 @@ KERNOBJ += init_main.o init_sysent.o kern_clock.o \
kern_subr.o kern_synch.o kern_sysctl.o kern_time.o \
subr_log.o subr_prf.o subr_rmap.o \
sys_generic.o sys_inode.o syscalls.o \
sys_pipe.o sys_process.o tty.o \
sys_pipe.o sys_process.o tty.o exec_conf.o exec_subr.o \
tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o \
ufs_bmap.o ufs_dsort.o ufs_fio.o \
ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o \
@@ -89,7 +89,7 @@ KERNOBJ += init_main.o init_sysent.o kern_clock.o \
vm_sched.o vm_swap.o vm_swp.o kern_glob.o swap.o spi_bus.o
# Drivers.
KERNOBJ += sd.o
KERNOBJ += rd_sd.o rdisk.o
# Configuration-dependent files.
KERNOBJ += vers.o devcfg.o
@@ -119,7 +119,7 @@ sys:
machine:
ln -s .. $@
unix.elf: $(KERNOBJ) bare-metal.ld
unix.elf: $(KERNOBJ) ../cfg/bare.ld
$(CC) $(LDFLAGS) $(KERNOBJ) -o $@
chmod -x $@
$(OBJDUMP) -d -S $@ > unix.dis

162
sys/pic32/retroone/bare-metal.ld
View File

@@ -1,162 +0,0 @@
/*
* Linker script for PIC32 firmware.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
devcfg (r) : ORIGIN = 0x9fc02ff0, LENGTH = 16
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 512K
exception_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x1000
kseg0_boot_mem (rx) : ORIGIN = 0x9FC00000, LENGTH = 12K-16
kseg1_boot_mem (rx) : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = 0x0000;
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.boot :
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/* Execution starts here. */
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*(.text .stub .text.* .gnu.linkonce.t.*)
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*(.gnu.warning)
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*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
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/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We have only 32k RAM on MC-24, so no need for 0x8000 offset. */
*(.data .data.* .gnu.linkonce.d.*)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.eh_frame)
_edata = .;
} > ram
/* Device configuration. */
.config :
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*(.config3)
*(.config2)
*(.config1)
*(.config0)
} > devcfg
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
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__bss_end = . ;
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.stab 0 : { *(.stab) }
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Symbols in the DWARF debugging sections are relative to the beginning
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.debug 0 : { *(.debug) }
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}

9
sys/pic32/sdxl/.gitignore vendored Normal file
View File

@@ -0,0 +1,9 @@
.compileversion
.deps/
.oldversion
machine
sys
unix.bin
unix.map
usbboot.map
vers.c

35
sys/pic32/pinguino-micro/Makefile → sys/pic32/sdxl/Makefile
View File

@@ -6,19 +6,15 @@ S = ../../../tools/configsys/../../sys/kernel
vpath %.c $(M):$(S)
vpath %.S $(M):$(S)
KERNOBJ += adc.o clock.o cons.o devsw.o exception.o exec_aout.o exec_conf.o exec_elf.o exec_script.o exec_subr.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o rd_sd.o rdisk.o signal.o spi_bus.o startup.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o usb_device.o usb_function_cdc.o usb_uart.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
EXTRA_TARGETS = bootloader
KERNOBJ += adc.o clock.o cons.o devcfg.o devsw.o exception.o exec_aout.o exec_conf.o exec_elf.o exec_script.o exec_subr.o glcd.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rdisk.o signal.o spi_bus.o startup.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o usb_device.o usb_function_cdc.o usb_uart.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
EXTRA_TARGETS =
DEFS += -DADC_ENABLED=YES
DEFS += -DBL_BUTTON_PIN=7
DEFS += -DBL_BUTTON_PORT=TRISE
DEFS += -DBL_LED_PIN=3
DEFS += -DBL_LED_PORT=TRISE
DEFS += -DBUS_DIV=1
DEFS += -DBUS_KHZ='CPU_KHZ/BUS_DIV'
DEFS += -DBUS_KHZ=80000
DEFS += -DCONSOLE_DEVICE=ttyUSB0
DEFS += -DCPU_IDIV=2
DEFS += -DCPU_KHZ='((CRYSTAL*1000)/CPU_IDIV*CPU_MUL/CPU_ODIV)'
DEFS += -DCPU_KHZ=80000
DEFS += -DCPU_MUL=20
DEFS += -DCPU_ODIV=1
DEFS += -DCRYSTAL=8
@@ -49,32 +45,25 @@ DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
DEFS += -DEXEC_AOUT
DEFS += -DEXEC_ELF
DEFS += -DEXEC_SCRIPT
DEFS += -DFLASH_USER=0x1d005000
DEFS += -DGLCD_ENABLED=YES
DEFS += -DGPIO_ENABLED=YES
DEFS += -DHID_FEATURE_REPORT_BYTES=2
DEFS += -DHID_INPUT_REPORT_BYTES=2
DEFS += -DHID_INT_IN_EP_SIZE=64
DEFS += -DHID_INT_OUT_EP_SIZE=64
DEFS += -DHID_OUTPUT_REPORT_BYTES=2
DEFS += -DHID_RPT01_SIZE=29
DEFS += -DKERNEL
DEFS += -DLED_KERNEL_INVERT=YES
DEFS += -DLED_KERNEL_PIN=1
DEFS += -DLED_KERNEL_PORT=TRISD
DEFS += -DLED_KERNEL_PIN=7
DEFS += -DLED_KERNEL_PORT=TRISE
DEFS += -DOC_ENABLED=YES
DEFS += -DPIC32MX7
DEFS += -DSD0_CS_PIN=13
DEFS += -DSD0_CS_PORT=TRISB
DEFS += -DSD0_CS_PIN=9
DEFS += -DSD0_CS_PORT=TRISG
DEFS += -DSD0_PORT=2
DEFS += -DUARTUSB_ENABLED=YES
DEFS += -DUCB_METER
DEFS += -DUSB_EP0_BUFF_SIZE=8
DEFS += -DUSB_MAX_EP_NUMBER=3
DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3
LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader-ubw32.ld
LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader-max32.ld
CONFIG = PINGUINO-MICRO
CONFIG = SDXL
CONFIGPATH = ../../../tools/configsys
include ../../../tools/configsys/../../sys/pic32/kernel-post.mk

16
sys/pic32/sdxl/SDXL Normal file
View File

@@ -0,0 +1,16 @@
# Configuration file for Majenko SDXL board.
# Ardiuno-compatible bootloader.
# LED at pin E7 (label 23).
core pic32mx7
mapping fubarino
linker bootloader-max32
device kernel led=23 cpu_khz=80000 bus_khz=80000
device console device=ttyUSB0
device uartusb
device sd0 port=2 cs=SS
device adc
device glcd
device oc
device gpio

7
sys/pic32/spi.c
View File

@@ -122,7 +122,7 @@ int spidev_ioctl (dev_t dev, u_int cmd, caddr_t addr, int flag)
static unsigned volatile *const tris[8] = {
0, &TRISA,&TRISB,&TRISC,&TRISD,&TRISE,&TRISF,&TRISG,
};
int mask, portnum;
int portnum;
//PRINTDBG ("spi%d: ioctl (cmd=%08x, addr=%08x)\n", channel+1, cmd, addr);
if (channel >= NSPI)
@@ -151,11 +151,12 @@ int spidev_ioctl (dev_t dev, u_int cmd, caddr_t addr, int flag)
return 0;
case SPICTL_SETSELPIN: /* set select pin */
mask = 1 << ((unsigned int) addr & 15);
portnum = ((unsigned int) addr >> 8) & 7;
if (! portnum)
return 0;
spi_set_cspin(spi_fd[channel], (unsigned int *)tris[((unsigned int) addr >> 8) & 7], (unsigned int) addr & 15);
spi_set_cspin(spi_fd[channel],
(unsigned int *)tris[portnum],
(unsigned int) addr & 15);
return 0;
case SPICTL_IO8(0): /* transfer n*8 bits */

114
sys/pic32/starter-kit/using-bootloader.ld
View File

@@ -1,114 +0,0 @@
/*
* Linker script for PIC32 firmware using RetroBSD bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
exception_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

134
sys/pic32/ubw32-uart-sdram/using-bootloader-ker.ld
View File

@@ -1,134 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 0x62C0
u0area (rw!x): ORIGIN = 0x800062C0, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80006EC0, LENGTH = 3K
keram (rwx) : ORIGIN = 0x80007AC0, LENGTH = 0x540
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
_keram_start = ORIGIN(keram);
_keram_end = ORIGIN(keram) + LENGTH(keram);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/*
* RAM functions go at the end of our stack and heap allocation.
* Alignment of 2K required by the boundary register (BMXDKPBA).
*/
.ramfunc : AT (LOADADDR (.data) + SIZEOF (.data))
{
_ramfunc_begin = . ;
*(.ramfunc .ramfunc.*)
. = ALIGN(4) ;
_ramfunc_end = . ;
} >keram
_ramfunc_image_begin = LOADADDR(.ramfunc) ;
_ramfunc_length = SIZEOF(.ramfunc) ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

115
sys/pic32/ubw32-uart-sdram/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

115
sys/pic32/ubw32-uart/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

115
sys/pic32/ubw32/using-bootloader.ld
View File

@@ -1,115 +0,0 @@
/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

19
sys/pic32/usb_boot.c
View File

@@ -103,7 +103,7 @@ typedef union __attribute__ ((packed))
unsigned long Length3;
unsigned char Type4; // End of sections list indicator goes here, fill with 0xFF.
unsigned char ExtraPadBytes[33];
};
} query;
} packet_t;
static packet_t send; // 64-byte send buffer (EP1 IN to the PC)
@@ -469,13 +469,13 @@ static int handle_packet()
// Prepare a response packet, which lets the PC software know
// about the memory ranges of this device.
memzero (&send, PACKET_SIZE);
send.Command = QUERY_DEVICE;
send.PacketDataFieldSize = REQUEST_SIZE;
send.DeviceFamily = 3; /* PIC32 */
send.Type1 = 1; /* 'program' memory type */
send.Address1 = FLASH_USER;
send.Length1 = FLASH_BASE + BMXPFMSZ - FLASH_USER;
send.Type2 = 0xFF; /* end of list */
send.query.Command = QUERY_DEVICE;
send.query.PacketDataFieldSize = REQUEST_SIZE;
send.query.DeviceFamily = 3; /* PIC32 */
send.query.Type1 = 1; /* 'program' memory type */
send.query.Address1 = FLASH_USER;
send.query.Length1 = FLASH_BASE + BMXPFMSZ - FLASH_USER;
send.query.Type2 = 0xFF; /* end of list */
return 1;
case UNLOCK_CONFIG:
@@ -509,8 +509,7 @@ static int handle_packet()
// Data field is right justified.
// Need to put it in the buffer left justified.
buf [buf_index++] =
receive.Data [(REQUEST_SIZE - receive.Size) / sizeof(unsigned) + i];
buf [buf_index++] = receive.Data [index];
base_address += sizeof(unsigned);
if (buf_index == REQUEST_SIZE / sizeof(unsigned)) {
write_flash_block();

2
sys/pic32/usb_console.c
View File

@@ -219,7 +219,7 @@ static void cn_rx (int c)
if ((tp->t_state & TS_ISOPEN) == 0)
return;
ttinput (c, tp);
ttyinput (c, tp);
}
/*