Virtualmips: restored broken DI and EI instructions.

This commit is contained in:
Serge Vakulenko
2015-10-29 21:06:56 -07:00
parent d8708af48a
commit 691fdfaa2f
2 changed files with 28 additions and 45 deletions

View File

@@ -162,12 +162,6 @@ print_address (unsigned address, FILE *stream)
fprintf (stream, "0x%x", address);
}
static void
memory_error (int status, unsigned memaddr, FILE *stream)
{
fprintf (stream, "Error reading memory at 0x%08x: %s", memaddr, strerror (status));
}
static const struct mips_cp0sel_name *
lookup_mips_cp0sel_name (const struct
mips_cp0sel_name *names, unsigned int len, unsigned int cp0reg,
@@ -777,42 +771,6 @@ print_insn_mips (unsigned memaddr,
fprintf (stream, "0x%lx", word);
}
static unsigned
getb16 (const unsigned char *buf)
{
return (buf[0] << 8) | buf[1];
}
static unsigned
getl16 (const unsigned char *buf)
{
return (buf[1] << 8) | buf[0];
}
static unsigned
getb32 (const unsigned char *buf)
{
unsigned long v;
v = (unsigned long) buf[0] << 24;
v |= (unsigned long) buf[1] << 16;
v |= (unsigned long) buf[2] << 8;
v |= (unsigned long) buf[3];
return v;
}
static unsigned
getl32 (const unsigned char *buf)
{
unsigned long v;
v = (unsigned long) buf[0];
v |= (unsigned long) buf[1] << 8;
v |= (unsigned long) buf[2] << 16;
v |= (unsigned long) buf[3] << 24;
return v;
}
/*
* Disassemble an operand for a mips16 instruction.
*/
@@ -1239,14 +1197,13 @@ print_mips16_insn_arg (char type,
static void print_insn_mips16 (unsigned memaddr,
unsigned int opcode, int nbytes, FILE *stream)
{
int status;
unsigned char buffer[2];
int insn, use_extend, extend;
const struct mips_opcode *op, *opend;
insn = opcode;
if (nbytes == 2) {
use_extend = 0;
extend = 0;
insn = opcode;
} else {
if ((opcode & 0xf8000000) == 0xf0000000) {

View File

@@ -1454,6 +1454,32 @@ static int teqi_op (cpu_mips_t * cpu, mips_insn_t insn)
return (0);
}
/*
* DI and EI instructions
*/
static int mfmc0_op (cpu_mips_t * cpu, mips_insn_t insn)
{
int rt = bits (insn, 16, 20);
int rd = bits (insn, 11, 15);
int func = bits (insn, 0, 10);
if (rd == 12) {
switch (func) {
case 0x020:
/* ei - enable interrupts */
cpu->reg_set (cpu, rt, cpu->cp0.reg [MIPS_CP0_STATUS]);
cpu->cp0.reg [MIPS_CP0_STATUS] |= MIPS_CP0_STATUS_IE;
return 0;
case 0x000:
/* di - disable interrupts */
cpu->reg_set (cpu, rt, cpu->cp0.reg [MIPS_CP0_STATUS]);
cpu->cp0.reg [MIPS_CP0_STATUS] &= ~MIPS_CP0_STATUS_IE;
return 0;
}
}
return unknown_op (cpu, insn);
}
static int tlb_op (cpu_mips_t * cpu, mips_insn_t insn)
{
uint16_t func = bits (insn, 0, 5);
@@ -1902,7 +1928,7 @@ static const struct mips_op_desc mips_cop0_opcodes[] = {
{"?cop0", undef_cop0, 0x8},
{"?cop0", undef_cop0, 0x9},
{"?cop0", rdpgpr_op, 0xa},
{"?cop0", undef_cop0, 0xb},
{"?cop0", mfmc0_op, 0xb},
{"?cop0", undef_cop0, 0xc},
{"?cop0", undef_cop0, 0xd},
{"wrpgpr", wrpgpr_op, 0xe},