Deleted old Fubarino configs

This commit is contained in:
igor-m
2014-04-10 22:50:24 +02:00
parent 95fc70aa4f
commit c22581a1b0
8 changed files with 0 additions and 594 deletions

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@@ -1,17 +0,0 @@
# Fubarino SD with UART 2 enabled, USB console and SRAMC
core pic32mx7
mapping fubarino
linker bootloader
option PARTITION=sramc0:sa@1500,fs@2572
device kernel cpu_khz=80000 bus_khz=80000 invled=6
device console device=tty1
device uart2 baud=115200
device sd0 port=2 cs=SS
device adc
device glcd
device oc
device gpio
device sramc data=16 lda=5 rd=15 wr=14

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@@ -1,76 +0,0 @@
BUILDPATH = ../../../tools/configsys/../../sys/pic32
H = ../../../tools/configsys/../../sys/include
M = ../../../tools/configsys/../../sys/pic32
S = ../../../tools/configsys/../../sys/kernel
vpath %.c $(M):$(S)
vpath %.S $(M):$(S)
KERNOBJ += _startup.o adc.o clock.o cons.o devcfg.o devsw.o exception.o glcd.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rd_sramc.o rdisk.o signal.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o uart.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
EXTRA_TARGETS =
DEFS += -DADC_ENABLED=YES
DEFS += -DBUS_DIV=1
DEFS += -DBUS_KHZ=80000
DEFS += -DCONSOLE_DEVICE=tty1
DEFS += -DCPU_IDIV=2
DEFS += -DCPU_KHZ=80000
DEFS += -DCPU_MUL=20
DEFS += -DCPU_ODIV=1
DEFS += -DCRYSTAL=8
DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
DEFS += -DDC0_ICE=0
DEFS += -DDC1_CKM=0
DEFS += -DDC1_CKS=0
DEFS += -DDC1_FNOSC=DEVCFG1_FNOSC_PRIPLL
DEFS += -DDC1_IESO=DEVCFG1_IESO
DEFS += -DDC1_OSCIOFNC=0
DEFS += -DDC1_PBDIV=DEVCFG1_FPBDIV_1
DEFS += -DDC1_POSCMOD=DEVCFG1_POSCMOD_HS
DEFS += -DDC1_SOSC=0
DEFS += -DDC1_WDTEN=0
DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_2
DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_20
DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
DEFS += -DDC2_UPLL=0
DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_2
DEFS += -DDC3_CAN=DEVCFG3_FCANIO
DEFS += -DDC3_ETH=DEVCFG3_FETHIO
DEFS += -DDC3_MII=DEVCFG3_FMIIEN
DEFS += -DDC3_SRS=DEVCFG3_FSRSSEL_7
DEFS += -DDC3_USBID=DEVCFG3_FUSBIDIO
DEFS += -DDC3_USERID=0xffff
DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
DEFS += -DGLCD_ENABLED=YES
DEFS += -DGPIO_ENABLED=YES
DEFS += -DKERNEL
DEFS += -DLED_KERNEL_INVERT=YES
DEFS += -DLED_KERNEL_PIN=14
DEFS += -DLED_KERNEL_PORT=TRISC
DEFS += -DOC_ENABLED=YES
DEFS += -DPARTITION="sramc0:sa@1500,fs@2572"
DEFS += -DPIC32MX7
DEFS += -DSD0_CS_PIN=9
DEFS += -DSD0_CS_PORT=TRISG
DEFS += -DSD0_PORT=2
DEFS += -DSRAMC_ENABLED=YES
DEFS += -DSW_DATA_PIN=0
DEFS += -DSW_DATA_PORT=TRISE
DEFS += -DSW_LDA_PIN=13
DEFS += -DSW_LDA_PORT=TRISC
DEFS += -DSW_RD_PIN=1
DEFS += -DSW_RD_PORT=TRISF
DEFS += -DSW_WR_PIN=0
DEFS += -DSW_WR_PORT=TRISF
DEFS += -DUART2_BAUD=115200
DEFS += -DUART2_ENABLED=YES
DEFS += -DUCB_METER
LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader.ld
CONFIG = FUBARINO-UART-SRAMC
CONFIGPATH = ../../../tools/configsys
include ../../../tools/configsys/../../sys/pic32/kernel-post.mk

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@@ -1,50 +0,0 @@
# CPU frequency 80 MHz.
DEFS += -DCPU_KHZ=80000
DEFS += -DBUS_KHZ=80000
DEFS += -DSRAMC_ENABLED
DEFS += -DPARTITION="sramc0:sa@1500,fs@2572"
#DEFS += -DROOT='makedev(0,1)'
#DEFS += -DSWAP='makedev(0,2)'
#
# Fubarino SD board
# =================
#
# Console on UART2
DEFS += -DCONSOLE_UART2 -DCONSOLE_BAUD=115200
# SD/MMC card driver on SPI2
# /CS0 at pin G9
DEFS += -DSD0_PORT=2
DEFS += -DSD0_CS_PORT=TRISG -DSD0_CS_PIN=9
# LED at pin C14
DEFS += -DLED_KERNEL_PORT=TRISC -DLED_KERNEL_PIN=14 -DLED_KERNEL_INVERT
# Swap on external device, 2 Mbytes
# data at E0-E7
# rd at F1
# wr at F0
# ldaddr at C13
DEFS += -DSWAPDEV=0x0100 -DSWAPSZ=2048
DEFS += -DSW_DATA_PORT=TRISE -DSW_DATA_PIN=0
DEFS += -DSW_RD_PORT=TRISF -DSW_RD_PIN=1
DEFS += -DSW_WR_PORT=TRISF -DSW_WR_PIN=0
DEFS += -DSW_LDA_PORT=TRISC -DSW_LDA_PIN=13
# Include or exclude drivers
DRIVER_GPIO = yes
# General Purpose I/O
DRIVER_ADC = yes
# Basic ADC interface
DRIVER_SPI = yes
# Generic SPI interface
DRIVER_OC = yes
# Output Compare driver

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@@ -1,144 +0,0 @@
H = ../../include
M = ..
S = ../../kernel
vpath %.c $(M):$(S)
vpath %.S $(M):$(S)
# Kernel options.
DEFS += -I. -I$(H) -DKERNEL -DUCB_METER -DPIC32MX7
# CPU frequency 80 MHz.
DEFS += -DCPU_KHZ=80000
DEFS += -DBUS_KHZ=80000
DEFS += -DSRAMC_ENABLED
DEFS += -DPARTITION="sramc0:sa@1500,fs@2572"
#DEFS += -DROOT='makedev(0,1)'
#DEFS += -DSWAP='makedev(0,2)'
#
# Fubarino SD board
# =================
#
# Console on UART2
DEFS += -DCONSOLE_UART2 -DCONSOLE_BAUD=115200
# SD/MMC card driver on SPI2
# /CS0 at pin G9
DEFS += -DSD0_PORT=2
DEFS += -DSD0_CS_PORT=TRISG -DSD0_CS_PIN=9
# LED at pin E5
DEFS += -DLED_KERNEL_PORT=TRISC -DLED_KERNEL_PIN=14 -DLED_KERNEL_INVERT
# Swap on external device, 2 Mbytes
# data at E0-E7
# rd at F0
# wr at F1
# ldaddr at G9
DEFS += -DSWAPDEV=0x0100 -DSWAPSZ=2048
DEFS += -DSW_DATA_PORT=TRISE -DSW_DATA_PIN=0
DEFS += -DSW_RD_PORT=TRISF -DSW_RD_PIN=1
DEFS += -DSW_WR_PORT=TRISF -DSW_WR_PIN=0
DEFS += -DSW_LDA_PORT=TRISC -DSW_LDA_PIN=13
# Include or exclude drivers
DRIVER_GPIO = yes
# General Purpose I/O
DRIVER_ADC = yes
# Basic ADC interface
DRIVER_SPI = yes
# Generic SPI interface
DRIVER_OC = yes
# Output Compare driver
DEPFLAGS = -MT $@ -MD -MP -MF .deps/$*.dep
CFLAGS = -O $(DEFS) $(DEPFLAGS)
ASFLAGS = $(DEFS) $(DEPFLAGS)
include ../gcc-config.mk
CC = $(GCCPREFIX)gcc -EL -g -mips32r2
CC += -nostdinc -fno-builtin -Werror -Wall -fno-dwarf2-cfi-asm
LDFLAGS += -nostdlib -T using-bootloader.ld -Wl,-Map=unix.map
SIZE = $(GCCPREFIX)size
OBJDUMP = $(GCCPREFIX)objdump
OBJCOPY = $(GCCPREFIX)objcopy
PROGTOOL = $(AVRDUDE) -c stk500v2 -p pic32 -b 115200
# Machine-dependent files:
# startup.o MUST be loaded first.
KERNOBJ = startup.o clock.o devsw.o sysctl.o \
signal.o machdep.o mem.o exception.o
KERNOBJ += cons.o rd_sramc.o
# Kernel.
KERNOBJ += init_main.o init_sysent.o kern_clock.o \
kern_descrip.o kern_exec.o kern_exit.o kern_fork.o \
kern_mman.o kern_proc.o kern_prot.o \
kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o \
kern_subr.o kern_synch.o kern_sysctl.o kern_time.o \
subr_log.o subr_prf.o subr_rmap.o \
sys_generic.o sys_inode.o syscalls.o \
sys_pipe.o sys_process.o tty.o tty_conf.o \
tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o \
ufs_bmap.o ufs_dsort.o ufs_fio.o \
ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o \
ufs_syscalls.o ufs_syscalls2.o vfs_vnops.o \
vm_sched.o vm_swap.o vm_swp.o kern_glob.o swap.o spi_bus.o
# Drivers.
KERNOBJ += rdisk.o rd_sd.o
# Configuration-dependent files.
KERNOBJ += vers.o
# Include any local specific configuration overrides
-include Makefile.local
# This makefile does the work including the right files and options for the drivers
include ../drivers.mk
all: .deps sys machine unix.elf
$(SIZE) unix.elf
clean:
rm -rf .deps *.o *.elf *.bin *.dis *.map *.srec core \
mklog assym.h vers.c genassym sys machine
.deps:
mkdir .deps
sys:
ln -s ../../include $@
machine:
ln -s .. $@
unix.elf: $(KERNOBJ) using-bootloader.ld
$(CC) $(LDFLAGS) $(KERNOBJ) -o $@
chmod -x $@
$(OBJDUMP) -d -S $@ > unix.dis
$(OBJCOPY) -O binary $@ unix.bin
$(OBJCOPY) -O ihex --change-addresses=0x80000000 $@ unix.hex
chmod -x $@ unix.bin
load: unix.hex
pic32prog unix.hex
vers.o: ../newvers.sh $(H)/*.h $(M)/*.[ch] $(S)/*.c
sh ../newvers.sh > vers.c
$(CC) -c vers.c
.SUFFIXES: .i .srec .hex .dis .cpp .cxx .bin .elf
.o.dis:
$(OBJDUMP) -d -z -S $< > $@
ifeq (.deps, $(wildcard .deps))
-include .deps/*.dep
endif

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@@ -1,114 +0,0 @@
/*
* Linker script for PIC32 firmware using RetroBSD bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
exception_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

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@@ -1,14 +0,0 @@
# Fubarino configuration file
core pic32mx7
mapping fubarino
linker bootloader
device kernel led=21 cpu_khz=80000 bus_khz=80000
device console device=tty1
device uart2 baud=115200
device sd0 port=2 cs=SS
device adc
device glcd
device oc
device gpio

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@@ -1,65 +0,0 @@
BUILDPATH = ../../../tools/configsys/../../sys/pic32
H = ../../../tools/configsys/../../sys/include
M = ../../../tools/configsys/../../sys/pic32
S = ../../../tools/configsys/../../sys/kernel
vpath %.c $(M):$(S)
vpath %.S $(M):$(S)
KERNOBJ += _startup.o adc.o clock.o cons.o devcfg.o devsw.o exception.o glcd.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rdisk.o signal.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o uart.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
EXTRA_TARGETS =
DEFS += -DADC_ENABLED=YES
DEFS += -DBUS_DIV=1
DEFS += -DBUS_KHZ=80000
DEFS += -DCONSOLE_DEVICE=tty1
DEFS += -DCPU_IDIV=2
DEFS += -DCPU_KHZ=80000
DEFS += -DCPU_MUL=20
DEFS += -DCPU_ODIV=1
DEFS += -DCRYSTAL=8
DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
DEFS += -DDC0_ICE=0
DEFS += -DDC1_CKM=0
DEFS += -DDC1_CKS=0
DEFS += -DDC1_FNOSC=DEVCFG1_FNOSC_PRIPLL
DEFS += -DDC1_IESO=DEVCFG1_IESO
DEFS += -DDC1_OSCIOFNC=0
DEFS += -DDC1_PBDIV=DEVCFG1_FPBDIV_1
DEFS += -DDC1_POSCMOD=DEVCFG1_POSCMOD_HS
DEFS += -DDC1_SOSC=0
DEFS += -DDC1_WDTEN=0
DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_2
DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_20
DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
DEFS += -DDC2_UPLL=0
DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_2
DEFS += -DDC3_CAN=DEVCFG3_FCANIO
DEFS += -DDC3_ETH=DEVCFG3_FETHIO
DEFS += -DDC3_MII=DEVCFG3_FMIIEN
DEFS += -DDC3_SRS=DEVCFG3_FSRSSEL_7
DEFS += -DDC3_USBID=DEVCFG3_FUSBIDIO
DEFS += -DDC3_USERID=0xffff
DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
DEFS += -DGLCD_ENABLED=YES
DEFS += -DGPIO_ENABLED=YES
DEFS += -DKERNEL
DEFS += -DLED_KERNEL_PIN=5
DEFS += -DLED_KERNEL_PORT=TRISE
DEFS += -DOC_ENABLED=YES
DEFS += -DPIC32MX7
DEFS += -DSD0_CS_PIN=9
DEFS += -DSD0_CS_PORT=TRISG
DEFS += -DSD0_PORT=2
DEFS += -DUART2_BAUD=115200
DEFS += -DUART2_ENABLED=YES
DEFS += -DUCB_METER
LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader.ld
CONFIG = FUBARINO-UART
CONFIGPATH = ../../../tools/configsys
include ../../../tools/configsys/../../sys/pic32/kernel-post.mk

View File

@@ -1,114 +0,0 @@
/*
* Linker script for PIC32 firmware using RetroBSD bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
exception_mem : ORIGIN = 0x9FC00000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}