dual sramc

This driver allows you to run two SRAMC devices side-by-side as two
separate rdisk devices.

Makefile

@@ -12,6 +12,7 @@
 # Supported boards
 #
 MAX32           = sys/pic32/max32/MAX32
+MAX32-ETH       = sys/pic32/max32-eth/MAX32-ETH
 UBW32           = sys/pic32/ubw32/UBW32
 UBW32UART       = sys/pic32/ubw32-uart/UBW32-UART
 UBW32UARTSDRAM  = sys/pic32/ubw32-uart-sdram/UBW32-UART-SDRAM

README.md

@@ -40,6 +40,7 @@ TARGET = $(MAXCOLOR)       # for the Colour Maximite board
 TARGET = $(EXPLORER16)     # for the Explorer 16 board
 TARGET = $(STARTERKIT)     # for the PIC32 USB or Ethernet Starter Kit
 TARGET = $(MAX32)          # default
+TARGET = $(MAX32-ETH)      # for the chipKIT MAX32 board with Arduino Ethernet shield
 TARGET = $(DUINOMITE)      # for the Duinomite board with USB console
 TARGET = $(DUINOMITEUART)  # for the Duinomite board with UART console
 TARGET = $(DUINOMITEE)     # for the Duinomite E board with USB console
@@ -89,7 +90,7 @@ on a board used.
 #### Max32 board:
 ```shell
 $ cd sys/pic32/ubw32
-$ AVRTOOLS=/Applications/Mpide.app/Contents/Resources/Java/hardware/tools
+$ AVRTOOLS=/Applications/Mpide.app/Contents/Resources/Java/hardware/tools/avr
     $AVRTOOLS/bin/avrdude -C$AVRTOOLS/etc/avrdude.conf -c stk500v2 -p pic32 \
     -P /dev/tty.usbserial-* -b 115200 -v -U flash:w:unix.hex:i
 ```

src/cmd/as/as.c

@@ -522,7 +522,7 @@ void startup ()
 
     int fd = mkstemp (tfilename);
     if (fd == -1) {
-        uerror ("cannot create temporary file %2", tfilename);
+        uerror ("cannot create temporary file %s", tfilename);
     } else {
         close(fd);
     }
@@ -1592,13 +1592,15 @@ foff16: expr_flags = 0;
             opcode |= offset & 0xffff;
             break;
         case FHIGH16:                   /* high 16-bit byte address */
-            if (relinfo.flags != RABS) {
+            if (expr_flags & EXPR_HI) {
                 /* %hi function - assume signed offset */
-                relinfo.flags |= (expr_flags & EXPR_HI) ? RHIGH16S : RHIGH16;
+                relinfo.flags |= RHIGH16S;
                 relinfo.offset = offset & 0xffff;
                 offset += 0x8000;
+                opcode |= offset >> 16;
+            } else {
+                opcode |= offset & 0xffff;
             }
-            opcode |= offset >> 16;
             break;
         case FOFF18:                    /* 18-bit PC-relative word address */
         case FAOFF18:

src/cmd/lccom/Makefile

@@ -61,7 +61,7 @@ $Binits.o:	inits.c;	$(CC) $(CFLAGS) -c -I. -o $@ $<
 $Binput.o:	input.c;	$(CC) $(CFLAGS) -c -I. -o $@ $<
 $Blex.o:	lex.c;		$(CC) $(CFLAGS) -c -I. -o $@ $<
 $Blist.o:	list.c;		$(CC) $(CFLAGS) -c -I. -o $@ $<
-$Bmain.o:	main.c;		$(CC) $(CFLAGS) -DVERSION=\"`svnversion`\" -c -I. -o $@ $<
+$Bmain.o:	main.c;		$(CC) $(CFLAGS) -DVERSION=\"$(VERSION)\" -c -I. -o $@ $<
 $Bnull.o:	null.c;		$(CC) $(CFLAGS) -c -I. -o $@ $<
 $Boutput.o:	output.c;	$(CC) $(CFLAGS) -c -I. -o $@ $<
 $Bprof.o:	prof.c;		$(CC) $(CFLAGS) -c -I. -o $@ $<

sys/pic32/cfg/sramc.dev

@@ -2,6 +2,7 @@ always
     file rd_sramc.o
     require rdisk
     define SRAMC_ENABLED YES
+    define SRAMC%0_ENABLED YES
 end always
 
 option data

sys/pic32/fubarino/Makefile

@@ -6,7 +6,7 @@ S         = ../../../tools/configsys/../../sys/kernel
 vpath %.c $(M):$(S)
 vpath %.S $(M):$(S)
 
-KERNOBJ += _startup.o adc.o clock.o cons.o devsw.o exception.o glcd.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rdisk.o signal.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o usb_device.o usb_function_cdc.o usb_uart.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o 
+KERNOBJ += _startup.o adc.o clock.o cons.o devsw.o exception.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rd_sramc.o rdisk.o signal.o spi.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o uart.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o 
 EXTRA_TARGETS = bootloader 
 
 DEFS += -DADC_ENABLED=YES
@@ -16,11 +16,11 @@ DEFS += -DBL_CRYSTAL=8
 DEFS += -DBL_LED_PIN=5
 DEFS += -DBL_LED_PORT=TRISE
 DEFS += -DBUS_DIV=1
-DEFS += -DBUS_KHZ=80000
+DEFS += -DBUS_KHZ=120000
-DEFS += -DCONSOLE_DEVICE=ttyUSB0
+DEFS += -DCONSOLE_DEVICE=tty1
-DEFS += -DCPU_IDIV=2
+DEFS += -DCPU_IDIV=1
-DEFS += -DCPU_KHZ=80000
+DEFS += -DCPU_KHZ=120000
-DEFS += -DCPU_MUL=20
+DEFS += -DCPU_MUL=15
 DEFS += -DCPU_ODIV=1
 DEFS += -DCRYSTAL=8
 DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
@@ -35,8 +35,8 @@ DEFS += -DDC1_POSCMOD=DEVCFG1_POSCMOD_HS
 DEFS += -DDC1_SOSC=0
 DEFS += -DDC1_WDTEN=0
 DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
-DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_2
+DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_1
-DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_20
+DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_15
 DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
 DEFS += -DDC2_UPLL=0
 DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_2
@@ -48,7 +48,6 @@ DEFS += -DDC3_USBID=DEVCFG3_FUSBIDIO
 DEFS += -DDC3_USERID=0xffff
 DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
 DEFS += -DFLASH_JUMP=0x9d000000
-DEFS += -DGLCD_ENABLED=YES
 DEFS += -DGPIO_ENABLED=YES
 DEFS += -DHID_FEATURE_REPORT_BYTES=2
 DEFS += -DHID_INPUT_REPORT_BYTES=2
@@ -56,24 +55,36 @@ DEFS += -DHID_INT_IN_EP_SIZE=64
 DEFS += -DHID_INT_OUT_EP_SIZE=64
 DEFS += -DHID_OUTPUT_REPORT_BYTES=2
 DEFS += -DHID_RPT01_SIZE=29
+DEFS += -DHZ=1000
 DEFS += -DKERNEL
 DEFS += -DLED_KERNEL_PIN=5
 DEFS += -DLED_KERNEL_PORT=TRISE
+DEFS += -DNBUF=8
+DEFS += -DNMOUNT=3
+DEFS += -DNPROC=25
 DEFS += -DOC_ENABLED=YES
+DEFS += -DPARTITION="sramc0:sa@2048,fs@6140"
 DEFS += -DPIC32MX7
 DEFS += -DSD0_CS_PIN=9
 DEFS += -DSD0_CS_PORT=TRISG
+DEFS += -DSD0_MHZ=20
 DEFS += -DSD0_PORT=2
-DEFS += -DUARTUSB_ENABLED=YES
+DEFS += -DSPI_ENABLED=YES
+DEFS += -DSRAMC0_ENABLED=YES
+DEFS += -DSRAMC_ENABLED=YES
+DEFS += -DUART1_BAUD=115200
+DEFS += -DUART1_ENABLED=YES
+DEFS += -DUART2_BAUD=115200
+DEFS += -DUART2_ENABLED=YES
 DEFS += -DUCB_METER
 DEFS += -DUSB_EP0_BUFF_SIZE=8
-DEFS += -DUSB_MAX_EP_NUMBER=3
+DEFS += -DUSB_MAX_EP_NUMBER=1
 DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3
 
 
 LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader.ld
 
-CONFIG = FUBARINO
+CONFIG = FUBARINO-UART2CONS-UART1-SRAMC
 CONFIGPATH = ../../../tools/configsys
 
 include ../../../tools/configsys/../../sys/pic32/kernel-post.mk

sys/pic32/gcc-config.mk

@@ -1,7 +1,7 @@
 # chipKIT PIC32 compiler from UECIDE
 ifdef UECIDE
 ifndef GCCPREFIX
-    GCCPREFIX   = ${HOME}/.uecide/compilers/pic32-tools/bin/pic32-
+    GCCPREFIX   = ${UECIDE}/compilers/pic32-tools/bin/pic32-
     LDFLAGS     = -Wl,--oformat=elf32-tradlittlemips
 endif
 endif

sys/pic32/rd_sramc.c

@@ -3,6 +3,7 @@
  *
  * This version is for 8MB RAMDISK v.1.1 and compatible
  * Pito 7.4.2014 - PIC32MX PMP bus version
+ * Pito 28.4.2014 - Mod for 2 Units
  * Under by retrobsd.org used Licence
  * No warranties of any kind
  *
@@ -29,23 +30,29 @@
 
 int sw_dkn = -1;                /* Statistics slot number */
 
-// Ramdisk v.1.1. wiring
+// 8MB Ramdisk v.1.1. wiring
 // PMP         RAMDISK
 // ===================
 // PMD<D0-D7>  D0-D7
 // PMRD        /RD
 // PMWR        /WR
 // PMA<0>      /DATA
+// PMA<1>      0-Unit0
+// PMA<10>     0-Unit1
+
+//#define NDATA (1<<0)
+//#define UNIT0 (1<<1)
+//#define UNIT1 (1<<10)
 
 // RD and WR pulses duration settings
 // Minimal recommended settings, increase them when unstable
 // No warranties of any kind
-// for 120MHz clock, 70ns PSRAM, Ramdisk v.1.1.
+// for 120MHz clock, 70ns PSRAM, 8MB Ramdisk v.1.1.
 #define ADR_PULSE  1
 #define WR_PULSE   5
 #define RD_PULSE   11
 
-// for 80MHz clock, 70ns PSRAM, Ramdisk v.1.1.
+// for 80MHz clock, 70ns PSRAM, 8MB Ramdisk v.1.1.
 //#define ADR_PULSE 1
 //#define WR_PULSE 3
 //#define RD_PULSE 8
@@ -61,35 +68,31 @@ int sw_dkn = -1;                /* Statistics slot number */
 //#define RD_PULSE 4
 
 typedef union {
-	unsigned value;
+	unsigned int value;
 	struct {
-unsigned nib1: 4;  // lowest nibble
+        unsigned nib1: 4;  // lowest nibble
-unsigned nib2: 4;
+        unsigned nib2: 4;
-unsigned nib3: 4;
+        unsigned nib3: 4;
-unsigned nib4: 4;
+        unsigned nib4: 4;
-unsigned nib5: 4;
+        unsigned nib5: 4;
-unsigned nib6: 4;
+        unsigned nib6: 4;
-unsigned nib7: 4;
+        unsigned nib7: 4;
-unsigned nib8: 4;  // highest nibble
+        unsigned nib8: 4;  // highest nibble
 	};
-} nybbles ;
+} nybbles;
 
 
 /*
  * Load the 24 bit address to Ramdisk.
  * 
  */
-inline static void
+inline static void dev_load_address (unsigned int addr)
-dev_load_address (addr)
-        unsigned addr;
 {
 	    nybbles temp;
 	    temp.value = addr;
 
         while(PMMODE & 0x8000);  // Poll - if busy, wait
 
-        PMADDR = 1;  // set ADR mode (1) to write the Address
-
         PMMODE = 0b10<<8 | (ADR_PULSE<<2);  // full ADR speed
 
         PMDIN = temp.nib6;           /* write 4 bits */
@@ -108,7 +111,6 @@ dev_load_address (addr)
 
         while(PMMODE & 0x8000);  // Poll - if busy, wait
         PMDIN = temp.nib1;           /* write 4 bits */
-
 }
 
 /*
@@ -117,64 +119,82 @@ dev_load_address (addr)
  */
 int sramc_size ( int unit )
 {
-	return 8192;  // 4096 for 4MB ramdisk
+    int srsize;
+
+    switch (unit) {
+        case 0: srsize = 8192; break;
+        case 1: srsize = 8192; break;
+        }
+	return srsize;
 }
 
 /*
  * Read a block of data.
  */
-inline int sramc_read (int unit, unsigned int blockno, char *data, unsigned int nbytes)
+inline int sramc_read (int unit, unsigned int blockno, register char *data, register unsigned int nbytes)
 {
-	int i;
 
-	//DEBUG9("sramc%d: read block %u, length %u bytes, addr %p\n",
+//printf("sramc%d: rd blockno %u, nbytes %u, addr %p\n", unit, blockno, nbytes, data);
-	//	major(dev), blockno, nbytes, data);
-
-	dev_load_address (blockno * DEV_BSIZE);
-
-    /* Read data. */
 
     while(PMMODE & 0x8000); // Poll - if busy, wait
 
-    PMADDR = 0; // set DATA mode (0)    
+    switch (unit) {
+        // set Unit address and ADDRESS mode (1)
+        case 0: PMADDR = 0b10000000001;  break;
+        case 1: PMADDR = 0b00000000011;  break;
+        } 
+
+	dev_load_address (blockno * DEV_BSIZE);
+
+    while(PMMODE & 0x8000); // Poll - if busy, wait
 
     PMMODE = 0b10<<8 | (RD_PULSE<<2);  // read slowly
+
+    PMADDR = PMADDR & 0b10000000010; // set DATA mode
     
     PMDIN; // Read the PMDIN to clear previous data and latch new data
         
-        for (i=0; i<nbytes; i++) {
+    while (nbytes--) {
-                while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+                    while(PMMODE & 0x8000); // Poll - if busy, wait before reading
-                *data++ = PMDIN;   /* read a byte of data */
+                    *data++ = PMDIN;   /* read a byte of data */
-        }
+                    }   
-
+    
+    while(PMMODE & 0x8000); // Poll - if busy, wait    
+    PMADDR = 0b10000000011; // deselect             
 	return 1;
 }
 
 /*
  * Write a block of data.
  */
-inline int sramc_write (int unit, unsigned int blockno, char *data, unsigned int nbytes)
+inline int sramc_write (int unit, unsigned int blockno, register char *data, register unsigned int nbytes)
 {
-	unsigned i;
 
-	//DEBUG9("sramc%d: write block %u, length %u bytes, addr %p\n",
+//printf("sramc%d: wr blockno %u, nbytes %u , addr %p\n", unit, blockno, nbytes, data);
-	//	major(dev), blockno, nbytes, data);
+
+    while(PMMODE & 0x8000); // Poll - if busy, wait
+
+    switch (unit) {
+        // set Unit address and ADDRESS mode (1)
+        case 0: PMADDR = 0b10000000001;  break;
+        case 1: PMADDR = 0b00000000011;  break;
+        }
 
     dev_load_address (blockno * DEV_BSIZE);
 
-    /* Write data. */
-
     while (PMMODE & 0x8000); // Poll - if busy, wait
-    
-    PMADDR = 0; // set DATA mode (0)
 
     PMMODE = 0b10<<8 | (WR_PULSE<<2);  // faster with write
 
-        for (i=0; i<nbytes; i++) {
+    PMADDR = PMADDR & 0b10000000010; // set DATA mode
-                while(PMMODE & 0x8000);  // Poll - if busy, wait
-                PMDIN = (*data++);       /* write a byte of data */
-        }
 
+        while(nbytes--) {
+                    while(PMMODE & 0x8000);  // Poll - if busy, wait
+                    PMDIN = (*data++);   /* write a byte of data*/ 
+                    }
+
+    while(PMMODE & 0x8000); // Poll - if busy, wait
+    PMADDR = 0b10000000011; // deselect
 	return 1;
 }
 
@@ -184,6 +204,8 @@ inline int sramc_write (int unit, unsigned int blockno, char *data, unsigned int
  */
 void sramc_init (int unit)
 {
+
+ //   printf("ramdisk%d: init\n",unit);
 	struct buf *bp;
 	
     // Initialize PMP hardware
@@ -196,31 +218,50 @@ void sramc_init (int unit)
     //         MODE      WAITB     WAITM    WAITE
     PMMODE =  0b10<<8  |    0   | (14<<2) | 0    ; // Mode2 Master 8bit
 
-    PMAEN = 1;  // PMA<0>, use A0 only
+    PMAEN = 0b10000000011;  // PMA<>, use A10,A1,A0
 
-    PMADDR = 0;  // start with DATA mode
+    PMADDR = 0b10000000010;  // start with DATA mode
 
     PMCONSET = 1<<15;   // PMP enabled       
     asm volatile ("nop"); 
 
     // make a couple of dummy reads - it refreshes the cpld internals a little bit :)
-    while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+    switch (unit) {
-    PMDIN;   /* read a byte of data */
+    
-    while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+    case 0: PMADDR = 0b10000000000;  // start with DATA mode
-    PMDIN;   /* read a byte of data */
+            while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+            PMDIN;   /* read a byte of data */
+            while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+            PMDIN;   /* read a byte of data */
+        
+            bp = prepartition_device("sramc0");
 
-    PMADDR = 1;  // go with with ADDRESS mode now
+            if(bp) {
-
-
-	DEBUG3("sramc%d: init done\n",unit);
-        bp = prepartition_device("sramc0");
-        if(bp)
-        {
                 sramc_write(0, 0, bp->b_addr, 512);
                 brelse(bp);
-        }
+            }
+           // printf("sramc%d: init done\n",unit);
+            break;
 
-	return;
+
+    case 1: PMADDR = 0b00000000010;  // start with DATA mode
+            while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+            PMDIN;   /* read a byte of data */
+            while(PMMODE & 0x8000); // Poll - if busy, wait before reading
+            PMDIN;   /* read a byte of data */
+        
+            bp = prepartition_device("sramc1");
+
+            if(bp) {
+                sramc_write(1, 0, bp->b_addr, 512);
+                brelse(bp);
+            }
+           // printf("sramc%d: init done\n",unit);
+            break;
+    }
+
+    while(PMMODE & 0x8000); // Poll - if busy, wait
+    PMADDR = 0b10000000011;  // go with with ADDRESS mode
 }
 
 /*
@@ -228,6 +269,6 @@ void sramc_init (int unit)
  */
 int sramc_open (int unit)
 {
-	DEBUG3("sramc%d: open\n",unit);
+    // printf("sramc%d: open done\n",unit);
 	return 0;
 }

sys/pic32/spi_bus.c

@@ -44,12 +44,16 @@ int spi_open(unsigned int bus, unsigned int *tris, unsigned int pin)
         case 2:
             spi_devices[dno].bus = (struct spireg *)&SPI2CON;
             break;
+#ifdef SPI3CON
         case 3:
             spi_devices[dno].bus = (struct spireg *)&SPI3CON;
             break;
+#endif
+#ifdef SPI4CON
         case 4:
             spi_devices[dno].bus = (struct spireg *)&SPI4CON;
             break;
+#endif
         default:
             return -1;
     }
@@ -624,11 +628,14 @@ char *spi_name(int dno)
     if(spi_devices[dno].bus == (struct spireg *)&SPI2CON)
         return "SPI2";
 
+#ifdef SPI3CON
     if(spi_devices[dno].bus == (struct spireg *)&SPI3CON)
         return "SPI3";
-
+#endif
+#ifdef SPI4CON
     if(spi_devices[dno].bus == (struct spireg *)&SPI4CON)
         return "SPI4";
+#endif
 
     return "SPI?";
 }

target.mk

@@ -1,12 +1,15 @@
 MACHINE		= mips
 DESTDIR		?= $(TOPSRC)
+RELEASE     = 0.0
+BUILD       = $(shell git rev-list HEAD --count)
+VERSION     = $(RELEASE)-$(BUILD)
 
 # chipKIT PIC32 compiler from UECIDE
 ifdef UECIDE
 ifndef GCCPREFIX
-    GCCPREFIX   = ${HOME}/.uecide/compilers/pic32-tools/bin/pic32-
+    GCCPREFIX   = ${UECIDE}/compilers/pic32-tools/bin/pic32-
     LDFLAGS     = -Wl,--oformat=elf32-tradlittlemips
-    INCLUDES    = -I${HOME}/.uecide/compilers/pic32-tools/lib/gcc/pic32mx/4.5.1/include
+    INCLUDES    = -I${UECIDE}/compilers/pic32-tools/lib/gcc/pic32mx/4.5.1/include
 endif
 endif
 

tools/configsys/config.cpp

@@ -160,11 +160,19 @@ bool config::load(const char *filename)
             pos = temp.find("=");
             if(pos>0)
             {
+                stringstream data;
                 string l,r;
                 l = temp.substr(0,pos);
                 uc(l);
                 r = temp.substr(pos+1,temp.size());
-                this->instances["GLOBAL"].settings[l] = r;
+                data << r;
+                while (in >> temp) {
+                    if (temp[0] == '#') {
+                        break;
+                    }
+                    data << " " << temp;
+                }
+                this->instances["GLOBAL"].settings[l] = data.str();
                 this->instances["GLOBAL"].device="GLOBAL";
                 this->instances["GLOBAL"].unit=0;
             }