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dual_sramc
| Author | SHA1 | Date | |
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ecdf678dac | ||
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d859d3b71d | ||
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3409198544 | ||
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d6a6d80d6e |
1388
sys/kernel/rdisk.c
1388
sys/kernel/rdisk.c
File diff suppressed because it is too large
Load Diff
@@ -2,6 +2,7 @@ always
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file rd_sramc.o
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file rd_sramc.o
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require rdisk
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require rdisk
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define SRAMC_ENABLED YES
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define SRAMC_ENABLED YES
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define SRAMC%0_ENABLED YES
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end always
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end always
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option data
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option data
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@@ -6,7 +6,7 @@ S = ../../../tools/configsys/../../sys/kernel
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vpath %.c $(M):$(S)
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vpath %.c $(M):$(S)
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vpath %.S $(M):$(S)
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vpath %.S $(M):$(S)
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KERNOBJ += _startup.o adc.o clock.o cons.o devsw.o exception.o glcd.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rdisk.o signal.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o usb_device.o usb_function_cdc.o usb_uart.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
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KERNOBJ += _startup.o adc.o clock.o cons.o devsw.o exception.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rd_sramc.o rdisk.o signal.o spi.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o uart.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
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EXTRA_TARGETS = bootloader
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EXTRA_TARGETS = bootloader
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DEFS += -DADC_ENABLED=YES
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DEFS += -DADC_ENABLED=YES
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@@ -16,11 +16,11 @@ DEFS += -DBL_CRYSTAL=8
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DEFS += -DBL_LED_PIN=5
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DEFS += -DBL_LED_PIN=5
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DEFS += -DBL_LED_PORT=TRISE
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DEFS += -DBL_LED_PORT=TRISE
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DEFS += -DBUS_DIV=1
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DEFS += -DBUS_DIV=1
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DEFS += -DBUS_KHZ=80000
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DEFS += -DBUS_KHZ=120000
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DEFS += -DCONSOLE_DEVICE=ttyUSB0
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DEFS += -DCONSOLE_DEVICE=tty1
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DEFS += -DCPU_IDIV=2
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DEFS += -DCPU_IDIV=1
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DEFS += -DCPU_KHZ=80000
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DEFS += -DCPU_KHZ=120000
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DEFS += -DCPU_MUL=20
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DEFS += -DCPU_MUL=15
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DEFS += -DCPU_ODIV=1
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DEFS += -DCPU_ODIV=1
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DEFS += -DCRYSTAL=8
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DEFS += -DCRYSTAL=8
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DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
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DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
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@@ -35,8 +35,8 @@ DEFS += -DDC1_POSCMOD=DEVCFG1_POSCMOD_HS
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DEFS += -DDC1_SOSC=0
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DEFS += -DDC1_SOSC=0
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DEFS += -DDC1_WDTEN=0
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DEFS += -DDC1_WDTEN=0
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DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
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DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
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DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_2
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DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_1
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DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_20
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DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_15
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DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
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DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
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DEFS += -DDC2_UPLL=0
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DEFS += -DDC2_UPLL=0
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DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_2
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DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_2
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@@ -48,7 +48,6 @@ DEFS += -DDC3_USBID=DEVCFG3_FUSBIDIO
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DEFS += -DDC3_USERID=0xffff
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DEFS += -DDC3_USERID=0xffff
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DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
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DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
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DEFS += -DFLASH_JUMP=0x9d000000
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DEFS += -DFLASH_JUMP=0x9d000000
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DEFS += -DGLCD_ENABLED=YES
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DEFS += -DGPIO_ENABLED=YES
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DEFS += -DGPIO_ENABLED=YES
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DEFS += -DHID_FEATURE_REPORT_BYTES=2
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DEFS += -DHID_FEATURE_REPORT_BYTES=2
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DEFS += -DHID_INPUT_REPORT_BYTES=2
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DEFS += -DHID_INPUT_REPORT_BYTES=2
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@@ -56,24 +55,36 @@ DEFS += -DHID_INT_IN_EP_SIZE=64
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DEFS += -DHID_INT_OUT_EP_SIZE=64
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DEFS += -DHID_INT_OUT_EP_SIZE=64
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DEFS += -DHID_OUTPUT_REPORT_BYTES=2
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DEFS += -DHID_OUTPUT_REPORT_BYTES=2
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DEFS += -DHID_RPT01_SIZE=29
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DEFS += -DHID_RPT01_SIZE=29
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DEFS += -DHZ=1000
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DEFS += -DKERNEL
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DEFS += -DKERNEL
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DEFS += -DLED_KERNEL_PIN=5
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DEFS += -DLED_KERNEL_PIN=5
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DEFS += -DLED_KERNEL_PORT=TRISE
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DEFS += -DLED_KERNEL_PORT=TRISE
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DEFS += -DNBUF=8
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DEFS += -DNMOUNT=3
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DEFS += -DNPROC=25
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DEFS += -DOC_ENABLED=YES
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DEFS += -DOC_ENABLED=YES
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DEFS += -DPARTITION="sramc0:sa@2048,fs@6140"
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DEFS += -DPIC32MX7
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DEFS += -DPIC32MX7
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DEFS += -DSD0_CS_PIN=9
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DEFS += -DSD0_CS_PIN=9
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DEFS += -DSD0_CS_PORT=TRISG
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DEFS += -DSD0_CS_PORT=TRISG
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DEFS += -DSD0_MHZ=20
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DEFS += -DSD0_PORT=2
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DEFS += -DSD0_PORT=2
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DEFS += -DUARTUSB_ENABLED=YES
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DEFS += -DSPI_ENABLED=YES
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DEFS += -DSRAMC0_ENABLED=YES
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DEFS += -DSRAMC_ENABLED=YES
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DEFS += -DUART1_BAUD=115200
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DEFS += -DUART1_ENABLED=YES
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DEFS += -DUART2_BAUD=115200
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DEFS += -DUART2_ENABLED=YES
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DEFS += -DUCB_METER
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DEFS += -DUCB_METER
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DEFS += -DUSB_EP0_BUFF_SIZE=8
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DEFS += -DUSB_EP0_BUFF_SIZE=8
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DEFS += -DUSB_MAX_EP_NUMBER=3
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DEFS += -DUSB_MAX_EP_NUMBER=1
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DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3
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DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3
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LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader.ld
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LDSCRIPT = ../../../tools/configsys/../../sys/pic32/cfg/bootloader.ld
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CONFIG = FUBARINO
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CONFIG = FUBARINO-UART2CONS-UART1-SRAMC
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CONFIGPATH = ../../../tools/configsys
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CONFIGPATH = ../../../tools/configsys
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include ../../../tools/configsys/../../sys/pic32/kernel-post.mk
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include ../../../tools/configsys/../../sys/pic32/kernel-post.mk
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@@ -3,6 +3,7 @@
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*
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*
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* This version is for 8MB RAMDISK v.1.1 and compatible
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* This version is for 8MB RAMDISK v.1.1 and compatible
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* Pito 7.4.2014 - PIC32MX PMP bus version
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* Pito 7.4.2014 - PIC32MX PMP bus version
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* Pito 28.4.2014 - Mod for 2 Units
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* Under by retrobsd.org used Licence
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* Under by retrobsd.org used Licence
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* No warranties of any kind
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* No warranties of any kind
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*
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*
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@@ -29,23 +30,29 @@
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int sw_dkn = -1; /* Statistics slot number */
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int sw_dkn = -1; /* Statistics slot number */
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// Ramdisk v.1.1. wiring
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// 8MB Ramdisk v.1.1. wiring
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// PMP RAMDISK
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// PMP RAMDISK
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// ===================
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// ===================
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// PMD<D0-D7> D0-D7
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// PMD<D0-D7> D0-D7
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// PMRD /RD
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// PMRD /RD
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// PMWR /WR
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// PMWR /WR
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// PMA<0> /DATA
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// PMA<0> /DATA
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// PMA<1> 0-Unit0
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// PMA<10> 0-Unit1
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//#define NDATA (1<<0)
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//#define UNIT0 (1<<1)
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//#define UNIT1 (1<<10)
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// RD and WR pulses duration settings
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// RD and WR pulses duration settings
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// Minimal recommended settings, increase them when unstable
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// Minimal recommended settings, increase them when unstable
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// No warranties of any kind
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// No warranties of any kind
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// for 120MHz clock, 70ns PSRAM, Ramdisk v.1.1.
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// for 120MHz clock, 70ns PSRAM, 8MB Ramdisk v.1.1.
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#define ADR_PULSE 1
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#define ADR_PULSE 1
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#define WR_PULSE 5
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#define WR_PULSE 5
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#define RD_PULSE 11
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#define RD_PULSE 11
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// for 80MHz clock, 70ns PSRAM, Ramdisk v.1.1.
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// for 80MHz clock, 70ns PSRAM, 8MB Ramdisk v.1.1.
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//#define ADR_PULSE 1
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//#define ADR_PULSE 1
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//#define WR_PULSE 3
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//#define WR_PULSE 3
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//#define RD_PULSE 8
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//#define RD_PULSE 8
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@@ -61,35 +68,31 @@ int sw_dkn = -1; /* Statistics slot number */
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//#define RD_PULSE 4
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//#define RD_PULSE 4
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typedef union {
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typedef union {
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unsigned value;
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unsigned int value;
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struct {
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struct {
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unsigned nib1: 4; // lowest nibble
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unsigned nib1: 4; // lowest nibble
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unsigned nib2: 4;
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unsigned nib2: 4;
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unsigned nib3: 4;
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unsigned nib3: 4;
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unsigned nib4: 4;
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unsigned nib4: 4;
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unsigned nib5: 4;
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unsigned nib5: 4;
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unsigned nib6: 4;
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unsigned nib6: 4;
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unsigned nib7: 4;
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unsigned nib7: 4;
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unsigned nib8: 4; // highest nibble
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unsigned nib8: 4; // highest nibble
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};
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};
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} nybbles ;
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} nybbles;
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/*
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/*
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* Load the 24 bit address to Ramdisk.
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* Load the 24 bit address to Ramdisk.
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*
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*
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*/
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*/
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inline static void
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inline static void dev_load_address (unsigned int addr)
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dev_load_address (addr)
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unsigned addr;
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{
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{
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nybbles temp;
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nybbles temp;
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temp.value = addr;
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temp.value = addr;
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while(PMMODE & 0x8000); // Poll - if busy, wait
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while(PMMODE & 0x8000); // Poll - if busy, wait
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PMADDR = 1; // set ADR mode (1) to write the Address
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PMMODE = 0b10<<8 | (ADR_PULSE<<2); // full ADR speed
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PMMODE = 0b10<<8 | (ADR_PULSE<<2); // full ADR speed
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PMDIN = temp.nib6; /* write 4 bits */
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PMDIN = temp.nib6; /* write 4 bits */
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@@ -108,7 +111,6 @@ dev_load_address (addr)
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while(PMMODE & 0x8000); // Poll - if busy, wait
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while(PMMODE & 0x8000); // Poll - if busy, wait
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PMDIN = temp.nib1; /* write 4 bits */
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PMDIN = temp.nib1; /* write 4 bits */
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}
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}
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/*
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/*
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@@ -117,64 +119,82 @@ dev_load_address (addr)
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*/
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*/
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int sramc_size ( int unit )
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int sramc_size ( int unit )
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{
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{
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return 8192; // 4096 for 4MB ramdisk
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int srsize;
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switch (unit) {
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case 0: srsize = 8192; break;
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case 1: srsize = 8192; break;
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}
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return srsize;
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}
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}
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/*
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/*
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* Read a block of data.
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* Read a block of data.
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*/
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*/
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inline int sramc_read (int unit, unsigned int blockno, char *data, unsigned int nbytes)
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inline int sramc_read (int unit, unsigned int blockno, register char *data, register unsigned int nbytes)
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{
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{
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int i;
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//DEBUG9("sramc%d: read block %u, length %u bytes, addr %p\n",
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//printf("sramc%d: rd blockno %u, nbytes %u, addr %p\n", unit, blockno, nbytes, data);
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// major(dev), blockno, nbytes, data);
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dev_load_address (blockno * DEV_BSIZE);
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/* Read data. */
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while(PMMODE & 0x8000); // Poll - if busy, wait
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while(PMMODE & 0x8000); // Poll - if busy, wait
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PMADDR = 0; // set DATA mode (0)
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switch (unit) {
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// set Unit address and ADDRESS mode (1)
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case 0: PMADDR = 0b10000000001; break;
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case 1: PMADDR = 0b00000000011; break;
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}
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dev_load_address (blockno * DEV_BSIZE);
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while(PMMODE & 0x8000); // Poll - if busy, wait
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|
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PMMODE = 0b10<<8 | (RD_PULSE<<2); // read slowly
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PMMODE = 0b10<<8 | (RD_PULSE<<2); // read slowly
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PMADDR = PMADDR & 0b10000000010; // set DATA mode
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|
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PMDIN; // Read the PMDIN to clear previous data and latch new data
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PMDIN; // Read the PMDIN to clear previous data and latch new data
|
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for (i=0; i<nbytes; i++) {
|
while (nbytes--) {
|
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while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
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*data++ = PMDIN; /* read a byte of data */
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*data++ = PMDIN; /* read a byte of data */
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}
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}
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while(PMMODE & 0x8000); // Poll - if busy, wait
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PMADDR = 0b10000000011; // deselect
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return 1;
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return 1;
|
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}
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}
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|
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/*
|
/*
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* Write a block of data.
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* Write a block of data.
|
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*/
|
*/
|
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inline int sramc_write (int unit, unsigned int blockno, char *data, unsigned int nbytes)
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inline int sramc_write (int unit, unsigned int blockno, register char *data, register unsigned int nbytes)
|
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{
|
{
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unsigned i;
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|
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|
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//DEBUG9("sramc%d: write block %u, length %u bytes, addr %p\n",
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//printf("sramc%d: wr blockno %u, nbytes %u , addr %p\n", unit, blockno, nbytes, data);
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// major(dev), blockno, nbytes, data);
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while(PMMODE & 0x8000); // Poll - if busy, wait
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|
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|
switch (unit) {
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// set Unit address and ADDRESS mode (1)
|
||||||
|
case 0: PMADDR = 0b10000000001; break;
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|
case 1: PMADDR = 0b00000000011; break;
|
||||||
|
}
|
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|
|
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dev_load_address (blockno * DEV_BSIZE);
|
dev_load_address (blockno * DEV_BSIZE);
|
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|
|
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/* Write data. */
|
|
||||||
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|
||||||
while (PMMODE & 0x8000); // Poll - if busy, wait
|
while (PMMODE & 0x8000); // Poll - if busy, wait
|
||||||
|
|
||||||
PMADDR = 0; // set DATA mode (0)
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|
||||||
|
|
||||||
PMMODE = 0b10<<8 | (WR_PULSE<<2); // faster with write
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PMMODE = 0b10<<8 | (WR_PULSE<<2); // faster with write
|
||||||
|
|
||||||
for (i=0; i<nbytes; i++) {
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PMADDR = PMADDR & 0b10000000010; // set DATA mode
|
||||||
while(PMMODE & 0x8000); // Poll - if busy, wait
|
|
||||||
PMDIN = (*data++); /* write a byte of data */
|
|
||||||
}
|
|
||||||
|
|
||||||
|
while(nbytes--) {
|
||||||
|
while(PMMODE & 0x8000); // Poll - if busy, wait
|
||||||
|
PMDIN = (*data++); /* write a byte of data*/
|
||||||
|
}
|
||||||
|
|
||||||
|
while(PMMODE & 0x8000); // Poll - if busy, wait
|
||||||
|
PMADDR = 0b10000000011; // deselect
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -184,6 +204,8 @@ inline int sramc_write (int unit, unsigned int blockno, char *data, unsigned int
|
|||||||
*/
|
*/
|
||||||
void sramc_init (int unit)
|
void sramc_init (int unit)
|
||||||
{
|
{
|
||||||
|
|
||||||
|
// printf("ramdisk%d: init\n",unit);
|
||||||
struct buf *bp;
|
struct buf *bp;
|
||||||
|
|
||||||
// Initialize PMP hardware
|
// Initialize PMP hardware
|
||||||
@@ -196,31 +218,50 @@ void sramc_init (int unit)
|
|||||||
// MODE WAITB WAITM WAITE
|
// MODE WAITB WAITM WAITE
|
||||||
PMMODE = 0b10<<8 | 0 | (14<<2) | 0 ; // Mode2 Master 8bit
|
PMMODE = 0b10<<8 | 0 | (14<<2) | 0 ; // Mode2 Master 8bit
|
||||||
|
|
||||||
PMAEN = 1; // PMA<0>, use A0 only
|
PMAEN = 0b10000000011; // PMA<>, use A10,A1,A0
|
||||||
|
|
||||||
PMADDR = 0; // start with DATA mode
|
PMADDR = 0b10000000010; // start with DATA mode
|
||||||
|
|
||||||
PMCONSET = 1<<15; // PMP enabled
|
PMCONSET = 1<<15; // PMP enabled
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
|
|
||||||
// make a couple of dummy reads - it refreshes the cpld internals a little bit :)
|
// make a couple of dummy reads - it refreshes the cpld internals a little bit :)
|
||||||
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
switch (unit) {
|
||||||
PMDIN; /* read a byte of data */
|
|
||||||
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
case 0: PMADDR = 0b10000000000; // start with DATA mode
|
||||||
PMDIN; /* read a byte of data */
|
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
||||||
|
PMDIN; /* read a byte of data */
|
||||||
|
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
||||||
|
PMDIN; /* read a byte of data */
|
||||||
|
|
||||||
|
bp = prepartition_device("sramc0");
|
||||||
|
|
||||||
PMADDR = 1; // go with with ADDRESS mode now
|
if(bp) {
|
||||||
|
|
||||||
|
|
||||||
DEBUG3("sramc%d: init done\n",unit);
|
|
||||||
bp = prepartition_device("sramc0");
|
|
||||||
if(bp)
|
|
||||||
{
|
|
||||||
sramc_write(0, 0, bp->b_addr, 512);
|
sramc_write(0, 0, bp->b_addr, 512);
|
||||||
brelse(bp);
|
brelse(bp);
|
||||||
}
|
}
|
||||||
|
// printf("sramc%d: init done\n",unit);
|
||||||
|
break;
|
||||||
|
|
||||||
return;
|
|
||||||
|
case 1: PMADDR = 0b00000000010; // start with DATA mode
|
||||||
|
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
||||||
|
PMDIN; /* read a byte of data */
|
||||||
|
while(PMMODE & 0x8000); // Poll - if busy, wait before reading
|
||||||
|
PMDIN; /* read a byte of data */
|
||||||
|
|
||||||
|
bp = prepartition_device("sramc1");
|
||||||
|
|
||||||
|
if(bp) {
|
||||||
|
sramc_write(1, 0, bp->b_addr, 512);
|
||||||
|
brelse(bp);
|
||||||
|
}
|
||||||
|
// printf("sramc%d: init done\n",unit);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
while(PMMODE & 0x8000); // Poll - if busy, wait
|
||||||
|
PMADDR = 0b10000000011; // go with with ADDRESS mode
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -228,6 +269,6 @@ void sramc_init (int unit)
|
|||||||
*/
|
*/
|
||||||
int sramc_open (int unit)
|
int sramc_open (int unit)
|
||||||
{
|
{
|
||||||
DEBUG3("sramc%d: open\n",unit);
|
// printf("sramc%d: open done\n",unit);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -44,12 +44,16 @@ int spi_open(unsigned int bus, unsigned int *tris, unsigned int pin)
|
|||||||
case 2:
|
case 2:
|
||||||
spi_devices[dno].bus = (struct spireg *)&SPI2CON;
|
spi_devices[dno].bus = (struct spireg *)&SPI2CON;
|
||||||
break;
|
break;
|
||||||
|
#ifdef SPI3CON
|
||||||
case 3:
|
case 3:
|
||||||
spi_devices[dno].bus = (struct spireg *)&SPI3CON;
|
spi_devices[dno].bus = (struct spireg *)&SPI3CON;
|
||||||
break;
|
break;
|
||||||
|
#endif
|
||||||
|
#ifdef SPI4CON
|
||||||
case 4:
|
case 4:
|
||||||
spi_devices[dno].bus = (struct spireg *)&SPI4CON;
|
spi_devices[dno].bus = (struct spireg *)&SPI4CON;
|
||||||
break;
|
break;
|
||||||
|
#endif
|
||||||
default:
|
default:
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
@@ -624,11 +628,14 @@ char *spi_name(int dno)
|
|||||||
if(spi_devices[dno].bus == (struct spireg *)&SPI2CON)
|
if(spi_devices[dno].bus == (struct spireg *)&SPI2CON)
|
||||||
return "SPI2";
|
return "SPI2";
|
||||||
|
|
||||||
|
#ifdef SPI3CON
|
||||||
if(spi_devices[dno].bus == (struct spireg *)&SPI3CON)
|
if(spi_devices[dno].bus == (struct spireg *)&SPI3CON)
|
||||||
return "SPI3";
|
return "SPI3";
|
||||||
|
#endif
|
||||||
|
#ifdef SPI4CON
|
||||||
if(spi_devices[dno].bus == (struct spireg *)&SPI4CON)
|
if(spi_devices[dno].bus == (struct spireg *)&SPI4CON)
|
||||||
return "SPI4";
|
return "SPI4";
|
||||||
|
#endif
|
||||||
|
|
||||||
return "SPI?";
|
return "SPI?";
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user