144 lines
3.6 KiB
C
144 lines
3.6 KiB
C
/*
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* Interrupt controller for PIC32.
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*
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* Copyright (C) 2011 Serge Vakulenko <serge@vak.ru>
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*
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* This file is part of the virtualmips distribution.
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* See LICENSE file for terms of the license.
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*/
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#define _GNU_SOURCE
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#include <stdlib.h>
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#include <stdio.h>
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#include <assert.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <string.h>
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#include "device.h"
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#include "mips_memory.h"
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#include "cpu.h"
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#include "pic32.h"
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#define RTCC_REG_SIZE 0x80
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extern cpu_mips_t *current_cpu;
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/*
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* Perform an assign/clear/set/invert operation.
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*/
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static inline unsigned write_op (int a, int b, int op)
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{
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switch (op & 0xc) {
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case 0x0: /* Assign */
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a = b;
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break;
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case 0x4: /* Clear */
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a &= ~b;
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break;
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case 0x8: /* Set */
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a |= b;
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break;
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case 0xc: /* Invert */
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a ^= b;
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break;
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}
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return a;
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}
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void *dev_pic32_rtcc_access (cpu_mips_t *cpu, struct vdevice *dev,
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m_uint32_t offset, u_int op_size, u_int op_type, m_reg_t *data,
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m_uint8_t *has_set_value)
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{
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pic32_t *pic32 = dev->priv_data;
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if (offset >= RTCC_REG_SIZE) {
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*data = 0;
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return NULL;
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}
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if (op_type == MTS_READ)
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*data = 0;
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switch (offset & 0x1f0) {
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case PIC32_RTCCON & 0x1f0: /* RTC Control */
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if (op_type == MTS_READ) {
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*data = pic32->rtccon;
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if (cpu->vm->debug_level > 2)
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printf (" read RTCCON -> %08x\n", *data);
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} else {
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pic32->rtccon = write_op (pic32->rtccon, *data, offset);
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if (cpu->vm->debug_level > 2)
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printf (" RTCCON := %08x\n", pic32->rtccon);
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}
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break;
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case PIC32_RTCALRM & 0x1f0: /* RTC alarm control */
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if (op_type == MTS_READ) {
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*data = 0;
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} else {
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//pic32->rtcalrm = write_op (pic32->rtcalrm, *data, offset);
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}
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break;
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case PIC32_RTCTIME & 0x1f0: /* RTC time value */
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if (op_type == MTS_READ) {
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*data = 0;
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} else {
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//pic32->rtctime = write_op (pic32->rtctime, *data, offset);
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}
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break;
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case PIC32_RTCDATE & 0x1f0: /* RTC date value */
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if (op_type == MTS_READ) {
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*data = 0;
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} else {
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//pic32->rtcdate = write_op (pic32->rtcdate, *data, offset);
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}
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break;
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case PIC32_ALRMTIME & 0x1f0: /* Alarm time value */
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if (op_type == MTS_READ) {
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*data = 0;
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} else {
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//pic32->alrmtime = write_op (pic32->alrmtime, *data, offset);
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}
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break;
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case PIC32_ALRMDATE & 0x1f0: /* Alarm date value */
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if (op_type == MTS_READ) {
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*data = 0;
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} else {
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//pic32->alrmdate = write_op (pic32->alrmdate, *data, offset);
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}
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break;
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default:
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ASSERT (0, "unknown rtcc offset %x\n", offset);
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}
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*has_set_value = TRUE;
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return NULL;
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}
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void dev_pic32_rtcc_reset (cpu_mips_t *cpu, struct vdevice *dev)
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{
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pic32_t *pic32 = dev->priv_data;
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pic32->rtccon = 0;
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}
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int dev_pic32_rtcc_init (vm_instance_t *vm, char *name, unsigned paddr)
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{
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pic32_t *pic32 = (pic32_t *) vm->hw_data;
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pic32->rtcdev = dev_create (name);
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if (! pic32->rtcdev)
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return (-1);
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pic32->rtcdev->priv_data = pic32;
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pic32->rtcdev->phys_addr = paddr;
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pic32->rtcdev->phys_len = RTCC_REG_SIZE;
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pic32->rtcdev->handler = dev_pic32_rtcc_access;
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pic32->rtcdev->reset_handler = dev_pic32_rtcc_reset;
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pic32->rtcdev->flags = VDEVICE_FLAG_NO_MTS_MMAP;
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vm_bind_device (vm, pic32->rtcdev);
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return (0);
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}
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