76 lines
1.9 KiB
C
76 lines
1.9 KiB
C
/*
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* Cisco router simulation platform.
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* Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
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*/
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/*
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* Copyright (C) yajin 2008 <yajinzhou@gmail.com >
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*
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* This file is part of the virtualmips distribution.
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* See LICENSE file for terms of the license.
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*
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*/
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#ifndef __MIPS64_X86_TRANS_H__
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#define __MIPS64_X86_TRANS_H__
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#include "system.h"
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#include "x86-codegen.h"
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#ifdef _USE_JIT_
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/* Manipulate bitmasks atomically */
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static forced_inline void x86_atomic_or (m_uint32_t * v, m_uint32_t m)
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{
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__asm__ __volatile__ ("lock; orl %1,%0":"=m" (*v):"ir" (m), "m" (*v));
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}
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static forced_inline void x86_atomic_and (m_uint32_t * v, m_uint32_t m)
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{
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__asm__ __volatile__ ("lock; andl %1,%0":"=m" (*v):"ir" (m), "m" (*v));
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}
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/* Wrappers to x86-codegen functions */
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#define mips_jit_tcb_set_patch x86_patch
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#define mips_jit_tcb_set_jump x86_jump_code
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/* Push epilog for an x86 instruction block */
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static forced_inline void mips_jit_tcb_push_epilog (mips_jit_tcb_t *
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block)
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{
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x86_ret (block->jit_ptr);
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}
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/* Translated block function pointer */
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typedef void (*insn_tblock_fptr) (void);
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void fastcall mips_exec_single_step (cpu_mips_t * cpu,
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mips_insn_t instruction);
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/* Execute JIT code */
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static forced_inline
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void mips_jit_tcb_exec (cpu_mips_t * cpu, mips_jit_tcb_t * block)
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{
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insn_tblock_fptr jit_code;
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m_uint32_t offset;
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offset = (cpu->pc & MIPS_MIN_PAGE_IMASK) >> 2;
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jit_code = (insn_tblock_fptr) block->jit_insn_ptr[offset];
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if (unlikely (!jit_code)) {
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mips_exec_single_step (cpu, vmtoh32 (block->mips_code[offset]));
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return;
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}
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asm volatile ("movl %0,%%edi"::"r" (cpu): "esi", "edi", "ecx", "edx");
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jit_code ();
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}
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void mips_set_pc (mips_jit_tcb_t * b, m_va_t new_pc);
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void mips_emit_single_step (mips_jit_tcb_t * b, mips_insn_t insn);
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void mips_check_cpu_pausing (mips_jit_tcb_t * b);
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void mips_check_pending_irq (mips_jit_tcb_t * b);
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#endif
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#endif
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