[MAJOR] The I2C driver become driver for RPI

The driver is compatible with the Raspberry Pi.
There are only the one I2C driver for each platforms.
NOTE! It have not debuged yet. Don't use it!
This commit is contained in:
Korobov Nikita
2017-07-13 17:40:41 +03:00
parent 8e0800e994
commit 25de27fbcb
10 changed files with 326 additions and 652 deletions

View File

@@ -9,6 +9,7 @@
./etc/rc.capes/BB-BONE-WTHR-01 minix-base
./etc/system.conf.d/bmp085 minix-base
./etc/system.conf.d/gpio minix-base
./etc/system.conf.d/i2c minix-base
./etc/system.conf.d/lan8710a minix-base
./etc/system.conf.d/sht21 minix-base
./etc/system.conf.d/tsl2550 minix-base
@@ -17,12 +18,11 @@
./service/cat24c256 minix-base
./service/fb minix-base
./service/gpio minix-base
./service/i2c minix-base
./service/lan8710a minix-base
./service/mailbox minix-base
./service/omap_emmc minix-base
./service/i2c_omap minix-base
./service/omap_mmc minix-base
./service/i2c_rpi minix-base
./service/rpi_mmc minix-base
./service/random minix-base
./service/sht21 minix-base

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@@ -1,16 +1,18 @@
# Makefile for I2C support
PROG= i2c
SRCS+= i2c.c
FILESNAME=i2c
FILES=i2c.conf
.if ${MACHINE_ARCH} == "earm"
.for pl in rpi omap
.PATH: ${.CURDIR}/arch/earm/${pl}
PROGS+= i2c_${pl}
SRCS.i2c_${pl}+= i2c.c ${pl}_i2c.c ${pl}_i2c.h ${pl}_i2c_registers.h
FILES.i2c_${pl}=i2c_${pl}.conf
FILESNAME=i2c_${pl}
SRCS+= ${pl}_i2c.c ${pl}_i2c.h ${pl}_i2c_registers.h
.endfor
.else
.PATH: ${.CURDIR}/arch/${MACHINE_ARCH}
SRCS.i2c += pci_i2c.c pci_i2c.h pci_i2c_register.h
SRCS+= pci_i2c.c pci_i2c.h pci_i2c_register.h
.endif
FILESDIR= /etc/system.conf.d

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@@ -1,20 +0,0 @@
service i2c
{
system
PRIVCTL # 4
IRQCTL # 19
PADCONF # 57
;
irq
# DM37XX (BeagleBoard-xM)
56 # I2C module 1
57 # I2C module 2
61 # I2C module 3
# AM335X (BeagleBone)
70 # I2C module 1
71 # I2C module 2
30 # I2C module 3
;
ipc SYSTEM RS DS;
};

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@@ -1,12 +0,0 @@
service rpi_i2c
{
system
PRIVCTL # 4
IRQCTL # 19
PADCONF # 57
;
irq
;
ipc SYSTEM RS DS;
};

File diff suppressed because it is too large Load Diff

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@@ -5,6 +5,6 @@
#include <minix/i2c.h>
#include "rpi_i2c_registers.h"
int omap_interface_setup(int (**process)(minix_i2c_ioctl_exec_t *ioctl_exec), int i2c_bus_id);
int rpi_interface_setup(int (**process)(minix_i2c_ioctl_exec_t *ioctl_exec), int i2c_bus_id);
#endif /* _RPI_I2C_H */

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@@ -1,152 +1,84 @@
#ifndef _RPI_I2C_REGISTERS_H
#define _RPI_I2C_REGISTERS_H
/* I2C Addresses for am335x (BeagleBone White / BeagleBone Black) */
/* I2C Addresses for bcm2835 */
/* IRQ Numbers */
#define AM335X_I2C0_IRQ 70
#define AM335X_I2C1_IRQ 71
#define AM335X_I2C2_IRQ 30
#define BCM283X_I2C0_IRQ 47
/* Base Addresses */
#define AM335X_I2C0_BASE 0x44e0b000
#define AM335X_I2C1_BASE 0x4802a000
#define AM335X_I2C2_BASE 0x4819c000
#define BCM283X_I2C0_BASE 0x3f205000
#define BCM283X_I2C1_BASE 0x3f804000
/* Size of I2C Register Address Range */
#define AM335X_I2C0_SIZE 0x1000
#define AM335X_I2C1_SIZE 0x1000
#define AM335X_I2C2_SIZE 0x1000
#define BCM283X_I2C0_SIZE 0x1000
#define BCM283X_I2C1_SIZE 0x1000
/* Register Offsets */
#define AM335X_I2C_REVNB_LO 0x00
#define AM335X_I2C_REVNB_HI 0x04
#define AM335X_I2C_SYSC 0x10
#define AM335X_I2C_IRQSTATUS_RAW 0x24
#define AM335X_I2C_IRQSTATUS 0x28
#define AM335X_I2C_IRQENABLE_SET 0x2c
#define AM335X_I2C_IRQENABLE_CLR 0x30
#define AM335X_I2C_WE 0x34
#define AM335X_I2C_DMARXENABLE_SET 0x38
#define AM335X_I2C_DMATXENABLE_SET 0x3c
#define AM335X_I2C_DMARXENABLE_CLR 0x40
#define AM335X_I2C_DMATXENABLE_CLR 0x44
#define AM335X_I2C_DMARXWAKE_EN 0x48
#define AM335X_I2C_DMATXWAKE_EN 0x4c
#define AM335X_I2C_SYSS 0x90
#define AM335X_I2C_BUF 0x94
#define AM335X_I2C_CNT 0x98
#define AM335X_I2C_DATA 0x9c
#define AM335X_I2C_CON 0xa4
#define AM335X_I2C_OA 0xa8
#define AM335X_I2C_SA 0xac
#define AM335X_I2C_PSC 0xb0
#define AM335X_I2C_SCLL 0xb4
#define AM335X_I2C_SCLH 0xb8
#define AM335X_I2C_SYSTEST 0xbc
#define AM335X_I2C_BUFSTAT 0xc0
#define AM335X_I2C_OA1 0xc4
#define AM335X_I2C_OA2 0xc8
#define AM335X_I2C_OA3 0xcc
#define AM335X_I2C_ACTOA 0xd0
#define AM335X_I2C_SBLOCK 0xd4
#define BCM283X_CTRL 0x00
#define BCM283X_STATUS 0x04
#define BCM283X_DLEN 0x08
#define BCM283X_SL_ADDR 0x0C
#define BCM283X_FIFO 0x10
#define BCM283X_DIV 0x14
#define BCM283X_DEL 0x18
#define BCM283X_CLKT 0x1c
/* Constants */
#define AM335X_FUNCTIONAL_CLOCK 96000000 /* 96 MHz */
#define AM335X_MODULE_CLOCK 12000000 /* 12 MHz */
#define BCM283X_FUNCTIONAL_CLOCK 96000000 /* 96 MHz */
#define BCM283X_MODULE_CLOCK 12000000 /* 12 MHz */
/* I2C_REV value found on the BeagleBone / BeagleBone Black */
#define AM335X_REV_MAJOR 0x00
#define AM335X_REV_MINOR 0x0b
/* I2C Addresses for dm37xx (BeagleBoard-xM) */
/* IRQ Numbers */
#define DM37XX_I2C0_IRQ 56
#define DM37XX_I2C1_IRQ 57
#define DM37XX_I2C2_IRQ 61
/* Base Addresses */
#define DM37XX_I2C0_BASE 0x48070000
#define DM37XX_I2C1_BASE 0x48072000
#define DM37XX_I2C2_BASE 0x48060000
/* Size of I2C Register Address Range */
#define DM37XX_I2C0_SIZE 0x1000
#define DM37XX_I2C1_SIZE 0x1000
#define DM37XX_I2C2_SIZE 0x1000
/* Register Offsets */
#define DM37XX_I2C_REV 0x00
#define DM37XX_I2C_IE 0x04
#define DM37XX_I2C_STAT 0x08
#define DM37XX_I2C_WE 0x0C
#define DM37XX_I2C_SYSS 0x10
#define DM37XX_I2C_BUF 0x14
#define DM37XX_I2C_CNT 0x18
#define DM37XX_I2C_DATA 0x1c
#define DM37XX_I2C_SYSC 0x20
#define DM37XX_I2C_CON 0x24
#define DM37XX_I2C_OA0 0x28
#define DM37XX_I2C_SA 0x2c
#define DM37XX_I2C_PSC 0x30
#define DM37XX_I2C_SCLL 0x34
#define DM37XX_I2C_SCLH 0x38
#define DM37XX_I2C_SYSTEST 0x3c
#define DM37XX_I2C_BUFSTAT 0x40
#define DM37XX_I2C_OA1 0x44
#define DM37XX_I2C_OA2 0x48
#define DM37XX_I2C_OA3 0x4c
#define DM37XX_I2C_ACTOA 0x50
#define DM37XX_I2C_SBLOCK 0x54
/* Constants */
#define DM37XX_FUNCTIONAL_CLOCK 96000000 /* 96 MHz */
#define DM37XX_MODULE_CLOCK 19200000 /* 19.2 MHz */
#define DM37XX_REV_MAJOR 0x04
#define DM37XX_REV_MINOR 0x00
#define BCM283X_I2C_CDIV_MIN 0x0002
#define BCM283X_I2C_CDIV_MAX 0xFFFE
/* Shared Values */
#define BUS_SPEED_100KHz 100000 /* 100 KHz */
#define BUS_SPEED_400KHz 400000 /* 400 KHz */
#define I2C_OWN_ADDRESS 0x01
#define BUS_SPEED_100KHz 100000 /* 100 KHz */
#define BUS_SPEED_400KHz 400000 /* 400 KHz */
#define I2C_OWN_ADDRESS 0x01
/* Masks */
#define MAX_I2C_SA_MASK (0x3ff) /* Highest 10 bit address -- 9..0 */
#define SL_ADDR_MASK (0x78) /* Mask for slave address (the last two bits
are the most significant of the addr)*/
/* Bit Offsets within Registers (only those used are listed) */
/* Same offsets for both dm37xx and am335x */
#define I2C_EN 15
#define MST 10
#define TRX 9
#define XSA 8
#define STP 1
#define STT 0
#define I2C_EN 15 /* I2C_CON */
#define MST 10 /* I2C_CON */
#define TRX 9 /* I2C_CON */
#define XSA 8 /* I2C_CON */
#define STP 1 /* I2C_CON */
#define STT 0 /* I2C_CON */
#define CLKACTIVITY_S 9
#define CLKACTIVITY_I 8
#define SMART_WAKE_UP 4
#define NO_IDLE_MODE 3
#define SRST 1
#define AUTOIDLE 0
#define CLKACTIVITY_S 9 /* I2C_SYSC */
#define CLKACTIVITY_I 8 /* I2C_SYSC */
#define SMART_WAKE_UP 4 /* I2C_SYSC */
#define NO_IDLE_MODE 3 /* I2C_SYSC */
#define SRST 1 /* I2C_SYSC */
#define AUTOIDLE 0 /* I2C_SYSC */
#define RDONE 0
#define RDONE 0 /* I2C_SYSS */
#define RXFIFO_CLR 14
#define TXFIFO_CLR 6
#define RXFIFO_CLR 14 /* I2C_BUF */
#define TXFIFO_CLR 6 /* I2C_BUF */
#define BCM283X_STATUS_TA 0x00
#define BCM283X_STATUS_DONE 0x01
#define BCM283X_STATUS_TXD 0x10
#define BCM283X_STATUS_RXD 0x20
#define BCM283X_STATUS_TXE 0x40
#define BCM283X_STATUS_RXF 0x80
#define BCM283X_STATUS_ERR 0x100
#define BCM283X_STATUS_CLKT 0x200
#define BB 12 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define ROVR 11 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define AERR 7 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define XRDY 4 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define RRDY 3 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define ARDY 2 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define NACK 1 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define AL 0 /* I2C_IRQSTATUS / I2C_STAT / I2C_IRQENABLE_SET / I2C_IE */
#define BCM283X_CTRL_READ 0x00
#define BCM283X_CTRL_ST 0x20
#define BCM283X_CTRL_CFIFO 0x30
#define BCM283X_CTRL_INTD 0x100
#define BCM283X_CTRL_INTT 0x200
#define BCM283X_CTRL_INTR 0x400
#define BCM283X_CTRL_I2C_EN 0x8000
#endif /* _RPI_I2C_REGISTERS_H */

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@@ -438,6 +438,12 @@ sef_cb_init(int type, sef_init_info_t * UNUSED(info))
if (r != OK) {
return r;
}
} else if (BOARD_IS_RPI_2_B(machine.board_id) || BOARD_IS_RPI_3_B(machine.board_id)){
/* Set callback and initialize the bus */
r = rpi_interface_setup(&process, i2c_bus_id);
if (r != OK) {
return r;
}
} else {
return ENODEV;
}

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@@ -0,0 +1,21 @@
service i2c
{
system
PRIVCTL # 4
IRQCTL # 19
PADCONF # 57
;
irq
# DM37XX (BeagleBoard-xM)
56 # I2C module 1
57 # I2C module 2
61 # I2C module 3
# AM335X (BeagleBone)
70 # I2C module 1
71 # I2C module 2
30 # I2C module 3
# BCM283X (RaspberryPi 2,3)
47
;
ipc SYSTEM RS DS;
};

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@@ -121,6 +121,8 @@ device_tree=bcm2709-rpi-2-b.dtb
[all]
device_tree_address=0x100
kernel=minix_rpi.bin
dtparam=i2c_arm=on
EOF
${CROSS_TOOLS}/nbmakefs -t msdos -s $FAT_SIZE -O $FAT_START -o "F=32,c=1" ${IMG} ${ROOT_DIR} >/dev/null