[MINOR] Fixed the RPI3 tty

Some small things in the tty driver are improved.
Added the RPI3 compatibility.
This commit is contained in:
Korobov Nikita
2017-05-30 04:36:43 +03:00
parent add751549f
commit 6192a53b2d
4 changed files with 33 additions and 41 deletions

View File

@@ -146,6 +146,11 @@ serial_out(rs232_t *rs, int offset, int val)
static void
rs_reset(rs232_t *rs)
{
unsigned int fr;
fr = PL011_RXFE | PL011_TXFE | PL011_CTS;
serial_out(rs, PL011_FR, fr);
}
static int
@@ -267,13 +272,16 @@ rs_ioctl(tty_t *tp, int UNUSED(dummy))
static void rs_config(rs232_t *rs)
{
unsigned int lcr;
tty_t *tp = rs->tty;
rs->ostate = ODEVREADY | ORAW | OSWREADY; /* reads MSR */
/*
* XXX: Disable FIFO otherwise only half of every received character
* will trigger an interrupt.
*/
serial_out(rs, PL011_LCR_H, serial_in(rs, PL011_LCR_H) & ~PL011_FEN);
serial_out(rs, PL011_LCR_H, serial_in(rs, PL011_LCR_H) & (~PL011_LCR_FEN));
/* Set interrupt levels */
serial_out(rs, PL011_IFLS, 0x0);

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@@ -23,48 +23,29 @@
#define PL011_RXRIS 0x10
#define PL011_TXRIS 0x20
/* Flag Register bits */
#define PL011_RXFE 0x10
#define PL011_TXFF 0x20
#define PL011_TXFE 0x80
#define PL011_CTS 0x00
#define PL011_FEN 0x10
/* Line Control Register bits */
// #define PL011_LCR_PEN 0x01 /* Enable parity */
// #define PL011_LCR_WLEN5 0x00 /* Wordlength 5 bits */ //TODO How to know the offset? 0x05
// #define PL011_LCR_WLEN6 0x01 /* Wordlength 6 bits */
// #define PL011_LCR_WLEN7 0x02 /* Wordlength 7 bits */
// #define PL011_LCR_WLEN8 0x03 /* Wordlength 8 bits */
// Send break. If this bit is set to 1, a low-level is continually output on the UARTTXD output, after
// completing transmission of the current character. For the proper execution of the break command, the
// software must set this bit for at least two complete frames.
// For normal use, this bit must be cleared to 0
// #define PL011_LCR_BRK 0x00
/* Line Control Register bits */
// #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
// #define UART_LCR_SBC 0x40 /* Set break control */
// #define UART_LCR_EPAR 0x10 /* Even parity select */
// #define UART_LCR_PARITY 0x08 /* Enable parity */
// #define UART_LCR_STOP 0x04 /* Stop bits; 0=1 bit, 1=2 bits */
// #define UART_LCR_WLEN5 0x00 /* Wordlength 5 bits */
// #define UART_LCR_WLEN6 0x01 /* Wordlength 6 bits */
// #define UART_LCR_WLEN7 0x02 /* Wordlength 7 bits */
// #define UART_LCR_WLEN8 0x03 /* Wordlength 8 bits */
// #define UART_LCR_CONF_MODE_A UART_LCR_DLAB /* Configuration Mode A */
// #define UART_LCR_CONF_MODE_B 0xBF /* Configuration Mode B */
#define PL011_LCR_BRK 0x00 /* Send break */
#define PL011_LCR_EPS 0x04 /* Even parity select */
#define PL011_LCR_SPS 0x80 /* Stick parity select */
#define PL011_LCR_FEN 0x10 /* Enable FIFO */
#define PL011_LCR_PARITY 0x02 /* Enable parity */
#define PL011_LCR_STP2 0x08 /* Stop bits; 0=1 bit, 1=2 bits */
#define PL011_LCR_WLEN5 0x00 /* Wordlength 5 bits */
#define PL011_LCR_WLEN6 0x20 /* Wordlength 6 bits */
#define PL011_LCR_WLEN7 0x40 /* Wordlength 7 bits */
#define PL011_LCR_WLEN8 0x60 /* Wordlength 8 bits */
//// PL011_IMSC /* Interrupt mask set/clear register */
//// UARTIMSC

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@@ -448,10 +448,11 @@ kinfo_t *pre_init(int argc, char **argv)
POORMANS_FAILURE_NOTIFICATION;
}
if (fdt_step_node(dev_tree, fdt_set_machine_type, &machine)) {
bootargs = argv[1];
set_machine_id(bootargs);
}
if (fdt_step_node(dev_tree, fdt_set_machine_type, &machine))
POORMANS_FAILURE_NOTIFICATION;
bootargs = argv[1];
set_machine_id(bootargs);
set_bsp_table();

View File

@@ -134,10 +134,7 @@ void kmain(kinfo_t *local_cbi)
/* We have done this exercise in pre_init so we expect this code
to simply work! */
machine.board_id = get_board_id_by_name(env_get(BOARDVARNAME));
#ifdef __arm__
/* We want to initialize serial before we do any output */
arch_ser_init();
#endif
/* We can talk now */
DEBUGBASIC(("MINIX booting\n"));
@@ -149,6 +146,11 @@ void kmain(kinfo_t *local_cbi)
cstart();
#ifdef __arm__
/* We want to initialize serial before we do any output */
arch_ser_init();
#endif
BKL_LOCK();
DEBUGEXTRA(("main()\n"));