mirror of
https://github.com/kelvinlawson/atomthreads.git
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Got one thread working.
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Anup Patel
123
ports/arm7a/arm_asm_macro.h
Normal file
123
ports/arm7a/arm_asm_macro.h
Normal file
@@ -0,0 +1,123 @@
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/*
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* Copyright (c) 2011, Anup Patel. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
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* are met:
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*
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||||
* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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||||
* 3. No personal names or organizations' names associated with the
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* Atomthreads project may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE
|
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARM_ASM_MACRO_H__
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#define __ARM_ASM_MACRO_H__
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#include <arm_defines.h>
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#ifdef __ASSEMBLY__
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.macro SET_CURRENT_FLAGS flags, treg
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mrs \treg, cpsr
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orr \treg, \treg, #(\flags)
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msr cpsr, \treg
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.endm
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.macro SET_CURRENT_MODE mode
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cps #(\mode)
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.endm
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.macro SET_CURRENT_STACK new_stack
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ldr sp, \new_stack
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.endm
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.macro START_EXCEPTION_HANDLER irqname, lroffset
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.align 5
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\irqname:
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sub lr, lr, #\lroffset
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.endm
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/* Save User Registers */
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.macro PUSH_USER_REGS
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str lr, [sp, #-4]!; /* Push the return address */
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sub sp, sp, #(4*15); /* Adjust the stack pointer */
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stmia sp, {r0-r12}; /* Push user mode registers */
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add r0, sp, #(4*13); /* Adjust the stack pointer */
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stmia r0, {r13-r14}^; /* Push user mode registers */
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mov r0, r0; /* NOP for previous inst */
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mrs r0, spsr_all; /* Put the SPSR on the stack */
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str r0, [sp, #-4]!
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.endm
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/* If came from priviledged mode then push banked registers */
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.macro PUSH_BANKED_REGS skip_lable
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mov r4, r0
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and r0, r0, #CPSR_MODE_MASK
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cmp r0, #CPSR_MODE_USER
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beq \skip_lable
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add r1, sp, #(4*14)
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mrs r5, cpsr
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orr r4, r4, #(CPSR_IRQ_DISABLED | CPSR_FIQ_DISABLED)
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msr cpsr, r4
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str sp, [r1, #0]
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str lr, [r1, #4]
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msr cpsr, r5
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\skip_lable:
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.endm
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/* Call C function to handle exception */
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.macro CALL_EXCEPTION_CFUNC cfunc
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mov r0, sp
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bl \cfunc
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.endm
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/* If going back to priviledged mode then pull banked registers */
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.macro PULL_BANKED_REGS skip_lable
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ldr r0, [sp, #0]
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mov r4, r0
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and r0, r0, #CPSR_MODE_MASK
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cmp r0, #CPSR_MODE_USER
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beq \skip_lable
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add r1, sp, #(4*14)
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mrs r5, cpsr
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orr r4, r4, #(CPSR_IRQ_DISABLED | CPSR_FIQ_DISABLED)
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msr cpsr, r4
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ldr sp, [r1, #0]
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ldr lr, [r1, #4]
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msr cpsr, r5
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\skip_lable:
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.endm
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/* Restore User Registers */
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.macro PULL_USER_REGS
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ldr r0, [sp], #0x0004; /* Get SPSR from stack */
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msr spsr_all, r0;
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ldmia sp, {r0-r14}^; /* Restore registers (user) */
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mov r0, r0; /* NOP for previous isnt */
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add sp, sp, #(4*15); /* Adjust the stack pointer */
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ldr lr, [sp], #0x0004 /* Pull return address */
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.endm
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.macro END_EXCEPTION_HANDLER
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movs pc, lr
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.endm
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#endif
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#endif
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@@ -27,27 +27,42 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ATOMPORT_PRIVATE_H_
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#define __ATOMPORT_PRIVATE_H_
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#ifndef __ARM_DEFINES_H_
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#define __ARM_DEFINES_H_
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#define CPSR_MODE_MASK 0x0000001f
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#define CPSR_MODE_USER 0x00000010
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#define CPSR_MODE_FIQ 0x00000011
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#define CPSR_MODE_IRQ 0x00000012
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#define CPSR_MODE_SUPERVISOR 0x00000013
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#define CPSR_MODE_ABORT 0x00000017
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#define CPSR_MODE_UNDEFINED 0x0000001b
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#define CPSR_MODE_SYSTEM 0x0000001f
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#define CPSR_VALIDBITS_MASK 0xFF0FFFFF
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#define CPSR_USERBITS_MASK 0xFFFFFC00
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#define CPSR_USERBITS_SHIFT 10
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#define CPSR_PRIVBITS_MASK 0x000003FF
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#define CPSR_PRIVBITS_SHIFT 0
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#define CPSR_MODE_MASK 0x0000001f
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#define CPSR_MODE_USER 0x00000010
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#define CPSR_MODE_FIQ 0x00000011
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#define CPSR_MODE_IRQ 0x00000012
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#define CPSR_MODE_SUPERVISOR 0x00000013
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#define CPSR_MODE_MONITOR 0x00000016
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#define CPSR_MODE_ABORT 0x00000017
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#define CPSR_MODE_UNDEFINED 0x0000001b
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#define CPSR_MODE_SYSTEM 0x0000001f
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#define CPSR_THUMB_ENABLED (1 << 5)
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#define CPSR_FIQ_DISABLED (1 << 6)
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#define CPSR_IRQ_DISABLED (1 << 7)
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#define CPSR_ASYNC_ABORT_DISABLED (1 << 8)
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#define CPSR_BE_ENABLED (1 << 9)
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#define CPSR_IT2_MASK 0x0000FC00
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#define CPSR_IT2_SHIFT 10
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#define CPSR_GE_MASK 0x000F0000
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#define CPSR_GE_SHIFT 16
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#define CPSR_JAZZLE_ENABLED (1 << 24)
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#define CPSR_IT1_MASK 0x06000000
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#define CPSR_IT1_SHIFT 25
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#define CPSR_COND_OVERFLOW_MASK (1 << 28)
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#define CPSR_COND_OVERFLOW_SHIFT 28
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#define CPSR_COND_CARRY_MASK (1 << 29)
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#define CPSR_COND_CARRY_SHIFT 29
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#define CPSR_COND_ZERO_MASK (1 << 30)
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#define CPSR_COND_ZERO_SHIFT 30
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#define CPSR_COND_NEGATIVE_MASK (1 << 31)
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#define CPSR_COND_NEGATIVE_SHIFT 31
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#define CPSR_THUMB_ENABLED (1 << 5)
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#define CPSR_FIQ_DISABLED (1 << 6)
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#define CPSR_IRQ_DISABLED (1 << 7)
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#define CPSR_ASYNC_ABORT_DISABLED (1 << 8)
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#define CPSR_BE_ENABLED (1 << 9)
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#define CPSR_COND_OVERFLOW (1 << 28)
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#define CPSR_COND_CARRY (1 << 29)
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#define CPSR_COND_ZERO (1 << 30)
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#define CPSR_COND_NEGATIVE (1 << 31)
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#endif /* __ATOMPORT_PRIVATE_H_ */
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#endif /* __ARM_DEFINES_H_ */
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@@ -27,71 +27,7 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <atomport-private.h>
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.macro SET_CURRENT_FLAGS flags, treg
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mrs \treg, cpsr
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orr \treg, \treg, #(\flags)
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msr cpsr, \treg
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.endm
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.macro SET_CURRENT_MODE mode
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cps #(\mode)
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.endm
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.macro SET_CURRENT_STACK new_stack
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ldr sp, \new_stack
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.endm
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.macro START_EXCEPTION_HANDLER irqname, lroffset
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.align 5
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\irqname:
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sub lr, lr, #\lroffset
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.endm
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/* Save User Registers */
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.macro PUSH_USER_REGS
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str lr, [sp, #-4]!; /* Push the return address */
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sub sp, sp, #(4*15); /* Adjust the stack pointer */
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stmia sp, {r0-r12}; /* Push user mode registers */
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add r0, sp, #(4*13); /* Adjust the stack pointer */
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stmia r0, {r13-r14}^; /* Push user mode registers */
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mov r0, r0; /* NOP for previous inst */
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mrs r0, spsr_all; /* Put the SPSR on the stack */
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str r0, [sp, #-4]!
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.endm
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/* Save User Registers in FIQ */
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.macro PUSH_FIQUSER_REGS
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str lr, [sp, #-4]!; /* Push the return address */
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sub sp, sp, #(4*15); /* Adjust the stack pointer */
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stmia sp, {r0-r7}; /* Push user mode registers */
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add r0, sp, #(4*8); /* Adjust the stack pointer */
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stmia r0, {r8-r14}^; /* Push user mode registers */
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mov r0, r0; /* NOP for previous inst */
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mrs r0, spsr_all; /* Put the SPSR on the stack */
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str r0, [sp, #-4]!
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.endm
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/* Call C function to handle exception */
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.macro CALL_EXCEPTION_CFUNC cfunc
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mov r0, sp
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bl \cfunc
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.endm
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/* Restore User Registers */
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.macro PULL_USER_REGS
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ldr r0, [sp], #0x0004; /* Get SPSR from stack */
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msr spsr_all, r0;
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ldmia sp, {r0-r14}^; /* Restore registers (user) */
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mov r0, r0; /* NOP for previous isnt */
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add sp, sp, #(4*15); /* Adjust the stack pointer */
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ldr lr, [sp], #0x0004 /* Pull return address */
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.endm
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.macro END_EXCEPTION_HANDLER
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movs pc, lr
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.endm
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#include <arm_asm_macro.h>
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.section .expvect, "ax", %progbits
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.globl _start_vect
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@@ -123,18 +59,8 @@ __fiq:
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.global _end_vect
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_end_vect:
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__svc_stack_end:
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.word _svc_stack_end
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__und_stack_end:
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.word _und_stack_end
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__abt_stack_end:
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.word _abt_stack_end
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__irq_stack_end:
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.word _irq_stack_end
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__fiq_stack_end:
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.word _fiq_stack_end
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__usr_stack_end:
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.word _usr_stack_end
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__initial_stack_end:
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.word _initial_stack_end
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.globl _reset
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_reset:
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@@ -144,69 +70,82 @@ _reset:
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cpsid if
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/* Set Supervisor Mode Stack */
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SET_CURRENT_MODE CPSR_MODE_SUPERVISOR
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SET_CURRENT_STACK __svc_stack_end
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SET_CURRENT_STACK __initial_stack_end
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/* Set Undefined Mode Stack */
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SET_CURRENT_MODE CPSR_MODE_UNDEFINED
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SET_CURRENT_STACK __und_stack_end
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SET_CURRENT_STACK __initial_stack_end
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/* Set Abort Mode Stack */
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SET_CURRENT_MODE CPSR_MODE_ABORT
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SET_CURRENT_STACK __abt_stack_end
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SET_CURRENT_STACK __initial_stack_end
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/* Set IRQ Mode Stack */
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SET_CURRENT_MODE CPSR_MODE_IRQ
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SET_CURRENT_STACK __irq_stack_end
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SET_CURRENT_STACK __initial_stack_end
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/* Set FIQ Mode Stack */
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SET_CURRENT_MODE CPSR_MODE_FIQ
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SET_CURRENT_STACK __fiq_stack_end
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SET_CURRENT_STACK __initial_stack_end
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/* Set System Mode Stack */
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SET_CURRENT_MODE CPSR_MODE_SYSTEM
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SET_CURRENT_STACK __usr_stack_end
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SET_CURRENT_STACK __initial_stack_end
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/* Set to Supervisor Mode */
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SET_CURRENT_MODE CPSR_MODE_SUPERVISOR
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/* Call main function */
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bl main
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/* We should never reach here */
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b .
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START_EXCEPTION_HANDLER _undefined_instruction, 4
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PUSH_USER_REGS
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PUSH_BANKED_REGS _undefined_instruction_bankpush_skip
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CALL_EXCEPTION_CFUNC do_undefined_instruction
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PULL_BANKED_REGS _undefined_instruction_bankpull_skip
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PULL_USER_REGS
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END_EXCEPTION_HANDLER
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START_EXCEPTION_HANDLER _software_interrupt, 4
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PUSH_USER_REGS
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PUSH_BANKED_REGS _software_interrupt_bankpush_skip
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CALL_EXCEPTION_CFUNC do_software_interrupt
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PULL_BANKED_REGS _software_interrupt_bankpull_skip
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PULL_USER_REGS
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END_EXCEPTION_HANDLER
|
||||
|
||||
START_EXCEPTION_HANDLER _prefetch_abort, 4
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PUSH_USER_REGS
|
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PUSH_BANKED_REGS _prefetch_abort_bankpush_skip
|
||||
CALL_EXCEPTION_CFUNC do_prefetch_abort
|
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PULL_BANKED_REGS _prefetch_abort_bankpull_skip
|
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PULL_USER_REGS
|
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END_EXCEPTION_HANDLER
|
||||
|
||||
START_EXCEPTION_HANDLER _data_abort, 8
|
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PUSH_USER_REGS
|
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PUSH_BANKED_REGS _data_abort_bankpush_skip
|
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CALL_EXCEPTION_CFUNC do_data_abort
|
||||
PULL_BANKED_REGS _data_abort_bankpull_skip
|
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PULL_USER_REGS
|
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END_EXCEPTION_HANDLER
|
||||
|
||||
START_EXCEPTION_HANDLER _not_used, 4
|
||||
PUSH_USER_REGS
|
||||
PUSH_BANKED_REGS _not_used_bankpush_skip
|
||||
CALL_EXCEPTION_CFUNC do_not_used
|
||||
PULL_BANKED_REGS _not_used_bankpull_skip
|
||||
PULL_USER_REGS
|
||||
END_EXCEPTION_HANDLER
|
||||
|
||||
START_EXCEPTION_HANDLER _irq, 4
|
||||
PUSH_USER_REGS
|
||||
PUSH_BANKED_REGS _irq_bankpush_skip
|
||||
CALL_EXCEPTION_CFUNC do_irq
|
||||
PULL_BANKED_REGS _irq_bankpull_skip
|
||||
PULL_USER_REGS
|
||||
END_EXCEPTION_HANDLER
|
||||
|
||||
START_EXCEPTION_HANDLER _fiq, 4
|
||||
PUSH_FIQUSER_REGS
|
||||
PUSH_USER_REGS
|
||||
PUSH_BANKED_REGS _fiq_bankpush_skip
|
||||
CALL_EXCEPTION_CFUNC do_fiq
|
||||
PULL_BANKED_REGS _fiq_bankpull_skip
|
||||
PULL_USER_REGS
|
||||
END_EXCEPTION_HANDLER
|
||||
|
||||
|
||||
@@ -31,7 +31,7 @@
|
||||
#define __ARM_IRQ_H
|
||||
|
||||
#include <atomport.h>
|
||||
#include <atomport-private.h>
|
||||
#include <arm_defines.h>
|
||||
|
||||
typedef int (*arm_irq_handler_t) (uint32_t irq_no, pt_regs_t * regs);
|
||||
|
||||
|
||||
@@ -28,7 +28,6 @@
|
||||
*/
|
||||
|
||||
#include <atom.h>
|
||||
#include <atomport-private.h>
|
||||
#include <atomport.h>
|
||||
#include <atomtests.h>
|
||||
#include <atomtimer.h>
|
||||
|
||||
@@ -27,6 +27,8 @@
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <arm_asm_macro.h>
|
||||
|
||||
.section .text
|
||||
|
||||
/**
|
||||
@@ -54,5 +56,22 @@ archContextSwitch:
|
||||
*/
|
||||
.globl archFirstThreadRestore
|
||||
archFirstThreadRestore:
|
||||
bx lr
|
||||
ldr r0, [r0]
|
||||
mov sp, r0
|
||||
mrs r1, cpsr
|
||||
SET_CURRENT_MODE CPSR_MODE_UNDEFINED
|
||||
mov sp, r0
|
||||
SET_CURRENT_MODE CPSR_MODE_ABORT
|
||||
mov sp, r0
|
||||
SET_CURRENT_MODE CPSR_MODE_IRQ
|
||||
mov sp, r0
|
||||
SET_CURRENT_MODE CPSR_MODE_FIQ
|
||||
mov sp, r0
|
||||
msr cpsr, r1
|
||||
sub sp, sp, #(4 * 17)
|
||||
ldr r0, [sp], #0x0004; /* Get CPSR from stack */
|
||||
msr spsr_all, r0;
|
||||
ldmia sp, {r0-r14}; /* Restore registers */
|
||||
mov r0, r0; /* NOP for previous isnt */
|
||||
movs pc, lr
|
||||
|
||||
|
||||
@@ -29,9 +29,9 @@
|
||||
*/
|
||||
|
||||
#include <atom.h>
|
||||
#include <atomport-private.h>
|
||||
#include <atomport.h>
|
||||
#include <string.h>
|
||||
#include <arm_defines.h>
|
||||
|
||||
/**
|
||||
* This function initialises each thread's stack during creation, before the
|
||||
@@ -53,6 +53,18 @@ void archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top,
|
||||
void (*entry_point)(UINT32),
|
||||
UINT32 entry_param)
|
||||
{
|
||||
int i;
|
||||
pt_regs_t *regs = (pt_regs_t *)((uint32_t)stack_top - sizeof(pt_regs_t));
|
||||
|
||||
tcb_ptr->sp_save_ptr = stack_top;
|
||||
regs->cpsr = CPSR_COND_ZERO_MASK |
|
||||
CPSR_ASYNC_ABORT_DISABLED | CPSR_MODE_SUPERVISOR;
|
||||
regs->gpr[0] = entry_param;
|
||||
for (i = 1; i < 13; i++) {
|
||||
regs->gpr[i] = 0x0;
|
||||
}
|
||||
regs->sp = (uint32_t)stack_top - sizeof(pt_regs_t) - 2048;
|
||||
regs->lr = (uint32_t)entry_point;
|
||||
regs->pc = (uint32_t)entry_point;
|
||||
}
|
||||
|
||||
|
||||
@@ -64,75 +64,11 @@ SECTIONS
|
||||
_erodata = .;
|
||||
}
|
||||
|
||||
.cmdbtl :
|
||||
{
|
||||
PROVIDE(_cmdtbl_start = .);
|
||||
*(.cmdtbl)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_cmdtbl_end = .);
|
||||
}
|
||||
|
||||
.modtbl :
|
||||
{
|
||||
PROVIDE(_modtbl_start = .);
|
||||
*(.modtbl)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_modtbl_end = .);
|
||||
}
|
||||
|
||||
.svc_stack :
|
||||
.initial_stack :
|
||||
{
|
||||
PROVIDE(_svc_stack_start = .);
|
||||
PROVIDE(_initial_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_svc_stack_end = .);
|
||||
}
|
||||
|
||||
.mon_stack :
|
||||
{
|
||||
PROVIDE(_mon_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_mon_stack_end = .);
|
||||
}
|
||||
|
||||
.abt_stack :
|
||||
{
|
||||
PROVIDE(_abt_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_abt_stack_end = .);
|
||||
}
|
||||
|
||||
.und_stack :
|
||||
{
|
||||
PROVIDE(_und_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_und_stack_end = .);
|
||||
}
|
||||
|
||||
.irq_stack :
|
||||
{
|
||||
PROVIDE(_irq_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_irq_stack_end = .);
|
||||
}
|
||||
|
||||
.fiq_stack :
|
||||
{
|
||||
PROVIDE(_fiq_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_fiq_stack_end = .);
|
||||
}
|
||||
|
||||
.usr_stack :
|
||||
{
|
||||
PROVIDE(_usr_stack_start = .);
|
||||
. = . + 4096;
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_usr_stack_end = .);
|
||||
PROVIDE(_initial_stack_end = .);
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user