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STM8: Add not regarding interrupt nesting.
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@@ -420,6 +420,10 @@ during the ISR causes a context switch to a new thread, then the ISR's
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data will remain on the thread's stack until the thread is scheduled back
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in.
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Interrupt priorities (via the ITC_SPRx registers) are left in their
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default power-on state, which disables interrupt nesting. Kernel changes
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may be required to support interrupt nesting.
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Note that the STM8 programming manual currently describes the following
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feature:
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