ARM: Don't need C wrappers for context switch routines.

kernel/atom.h

@@ -44,8 +44,10 @@ struct atom_tcb;
 
 typedef struct atom_tcb
 {
-    /* Thread's current stack pointer. When a thread is scheduled
-     * out the architecture port can save*/
+    /*
+     * Thread's current stack pointer. When a thread is scheduled
+     * out the architecture port can save its stack pointer here.
+     */
     POINTER sp_save_ptr;
 
     /* Thread priority (0-255) */

ports/arm/atomport-asm.s

@@ -37,8 +37,8 @@
 .global    contextEnterCritical
 .global    contextExitCritical
 .global    contextEnableInterrupts
-.global    contextStart
-.global    contextSwitch
+.global    archContextSwitch
+.global    archFirstThreadRestore
 
 
 .extern __interrupt_dispatcher 
@@ -60,42 +60,67 @@
 .code 32
 
 
-/**
- *  \b contextSwitch
+/*
+ * \b archContextSwitch
  *
- *  Architecture-specific context switch routine.
+ * Architecture-specific context switch routine.
  *
- *  Note that interrupts are always locked out when this routine is
- *  called. For cooperative switches, the scheduler will have entered
- *  a critical region. For preemptions (called from an ISR), interrupts
- *  will have been disabled in the IRQ wrapper.
+ * Note that interrupts are always locked out when this routine is
+ * called. For cooperative switches, the scheduler will have entered
+ * a critical region. For preemptions (called from an ISR), the
+ * ISR will have disabled interrupts on entry.
  *
- *  @param[in] [r0] -> Address to save old stack pointer
- *  @param[in] [r1] -> Address where new stack pointer is stored
+ * @param[in] old_tcb_ptr Pointer to the thread being scheduled out
+ * @param[in] new_tcb_ptr Pointer to the thread being scheduled in
  *
- *  @return None
+ * @return None
+ *
+ * void archContextSwitch (ATOM_TCB *old_tcb_ptr, ATOM_TCB *new_tcb_ptr)
  */
-contextSwitch:
+archContextSwitch:
     STMFD       sp!, {r4 - r11, lr}             /* Save registers */
 
-    STR         sp, [r0]                        /* Save old stack pointer */
-    LDR         r1, [r1]                        /* Load new stack pointer */
+    STR         sp, [r0]                        /* Save old SP in old_tcb_ptr->sp_save_ptr (first TCB element) */
+    LDR         r1, [r1]                        /* Load new SP from new_tcb_ptr->sp_save_ptr (first TCB element) */
     MOV         sp, r1                           
 
     LDMFD       sp!, {r4 - r11, pc}             /* Load new registers */
 
 
 /**
- *  \b contextStart
+ * \b archFirstThreadRestore
  *
- *  Architecture-specific context start routine.
+ * Architecture-specific function to restore and start the first thread.
+ * This is called by atomOSStart() when the OS is starting.
  *
- *  @param[in] [r0] -> Address where new stack pointer is stored
+ * This function will be largely similar to the latter half of
+ * archContextSwitch(). Its job is to restore the context for the
+ * first thread, and finally enable interrupts (although we actually
+ * enable interrupts in thread_shell() for new threads in this port
+ * rather than doing it explicitly here).
  *
- *  @return Does not return
+ * It expects to see the context saved in the same way as if the
+ * thread has been previously scheduled out, and had its context
+ * saved. That is, archThreadContextInit() will have been called
+ * first (via atomThreadCreate()) to create a "fake" context save
+ * area, containing the relevant register-save values for a thread
+ * restore.
+ *
+ * Note that you can create more than one thread before starting
+ * the OS - only one thread is restored using this function, so
+ * all other threads are actually restored by archContextSwitch().
+ * This is another reminder that the initial context set up by
+ * archThreadContextInit() must look the same whether restored by
+ * archFirstThreadRestore() or archContextSwitch().
+ *
+ * @param[in] new_tcb_ptr Pointer to the thread being scheduled in
+ *
+ * @return None
+ *
+ * void archFirstThreadRestore (ATOM_TCB *new_tcb_ptr)
  */
-contextStart:
-    LDR         r0, [r0]
+archFirstThreadRestore:
+    LDR         r0, [r0]                        /* Get SP (sp_save_ptr is conveniently first element of TCB) */
     MOV         sp, r0                          /* Load new stack pointer */
     LDMFD       sp!, {r4 - r11, pc}             /* Load new registers */
 

ports/arm/atomport.c

@@ -32,9 +32,6 @@
 
 
 /** Functions defined in atomport_s.s */
-typedef void * SYSCONTEXT;
-extern void contextSwitch (SYSCONTEXT* save_context, SYSCONTEXT* new_context);
-extern void contextStart (SYSCONTEXT* context);
 extern void contextEnableInterrupts (void);
 
 
@@ -158,29 +155,3 @@ void archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top, void (*entry_poi
 
 }
 
-
-/**
- * \b archFirstThreadRestore
- *
- * Documented in Atomthreads.
- *
- */
-void
-archFirstThreadRestore(ATOM_TCB * p_sp_new)
-{
-    contextStart (&p_sp_new->sp_save_ptr) ;
-}
-
-
-/**
- * \b archContextSwitch
- *
- * Documented in Atomthreads.
- *
- */
-void
-archContextSwitch (ATOM_TCB * p_sp_old, ATOM_TCB * p_sp_new)
-{
-    contextSwitch (&p_sp_old->sp_save_ptr, &p_sp_new->sp_save_ptr) ;
-}
-