Reimplemented atomic destructive read. Revised irq control capabilities.

conts/libl4/include/l4lib/arch-arm/irq.h

@@ -1,26 +1,11 @@
 #ifndef __L4LIB_ARCH_IRQ_H__
 #define __L4LIB_ARCH_IRQ_H__
 
-
 /*
  * Destructive atomic-read.
  *
  * Write 0 to byte at @location as its contents are read back.
  */
-static inline char l4_atomic_dest_readb(void *location)
-{
-	unsigned char zero = 0; /* Input */
-	unsigned char val;	/* Output */
-	char *loc = location;	/* Both input and output */
-
-	__asm__ __volatile__ (
-		"swpb	%1, %3, [%0] \n"
-		: "=r" (*loc), "=r" (val)
-		: "r" (*loc), "r" (zero)
-	);
-
-	return val;
-}
-
+char l4_atomic_dest_readb(void *location);
 
 #endif

conts/libl4/src/arm/mutex.S

@@ -63,4 +63,10 @@ BEGIN_PROC(__l4_mutex_unlock)
 	mov	pc, lr
 END_PROC(__l4_mutex_unlock)
 
+BEGIN_PROC(l4_atomic_dest_readb)
+	mov	r1, r0		@ Move byte address to r1
+	mov	r2, #0		@ Move 0 to r2
+	swpb	r0, r2, [r1]	@ Write 0 to byte location, while reading its value to r0
+	mov	pc, lr		@ Return byte location value
+END_PROC(l4_atomic_dest_readb)
 

src/generic/capability.c

@@ -726,6 +726,10 @@ struct capability *cap_match_irqctrl(struct capability *cap,
 		if (!(cap->access & CAP_IRQCTRL_REGISTER))
 			return 0;
 		break;
+	case IRQ_CONTROL_WAIT:
+		if (!(cap->access & CAP_IRQCTRL_WAIT))
+			return 0;
+		break;
 	default:
 		/* We refuse to accept anything else */
 		return 0;
@@ -892,13 +896,13 @@ int cap_irq_check(struct ktcb *registrant, unsigned int req,
 		return -ENOCAP;
 
 	/*
-	 * Find the device capability and
-	 * check that it allows irq registration
+	 * If it is an irq registration, find the device
+	 * capability and check that it allows irq registration.
 	 */
-	if (!cap_find(current, cap_match_devmem,
-		      &args, CAP_TYPE_MAP_PHYSMEM))
-		return -ENOCAP;
-
+	if (req == IRQ_CONTROL_REGISTER)
+		if (!cap_find(current, cap_match_devmem,
+			      &args, CAP_TYPE_MAP_PHYSMEM))
+			return -ENOCAP;
 	return 0;
 }