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Merge branch 'rebase' of git://www.b-labs.co.uk/~amit/codezero into amit-devel

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This commit is contained in:
Bahadir Balban
2009-11-29 12:37:08 +02:00
parent 307b52f6d2 41c87d9c8c
commit 2d4e64f795
62 changed files with 1446 additions and 1046 deletions
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46
config/caps.py
View File

@@ -139,9 +139,36 @@ cap_strings = { 'ipc' : \
\t\t\t\t.size = ${size},
\t\t\t},
'''
, 'uart' : \
'''
\t\t\t[${idx}] = {
\t\t\t\t/* For device selection */
\t\t\t\t.target = ${cid},
\t\t\t\t.attr = CAP_DEVTYPE_UART | (${devnum} << 16),
\t\t\t\t.type = CAP_TYPE_MAP_PHYSMEM | CAP_RTYPE_CONTAINER,
\t\t\t\t.access = CAP_MAP_READ | CAP_MAP_WRITE | CAP_MAP_EXEC |
\t\t\t\t\tCAP_MAP_CACHED | CAP_MAP_UNCACHED | CAP_MAP_UNMAP | CAP_MAP_UTCB,
\t\t\t\t.start = __pfn(PLATFORM_CONSOLE${devnum}_PHY_BASE),
\t\t\t\t.end = __pfn(PLATFORM_CONSOLE${devnum}_PHY_BASE) + 1,
\t\t\t\t.size = 1,
\t\t\t},
'''
, 'timer' : \
'''
\t\t\t[${idx}] = {
\t\t\t\t/* For device selection */
\t\t\t\t.target = ${cid},
\t\t\t\t.attr = CAP_DEVTYPE_TIMER | (${devnum} << 16),
\t\t\t\t.type = CAP_TYPE_MAP_PHYSMEM | CAP_RTYPE_CONTAINER,
\t\t\t\t.access = CAP_MAP_READ | CAP_MAP_WRITE | CAP_MAP_EXEC |
\t\t\t\t\tCAP_MAP_CACHED | CAP_MAP_UNCACHED | CAP_MAP_UNMAP | CAP_MAP_UTCB,
\t\t\t\t.start = __pfn(PLATFORM_TIMER${devnum}_PHY_BASE),
\t\t\t\t.end = __pfn(PLATFORM_TIMER${devnum}_PHY_BASE) + 1,
\t\t\t\t.size = 1,
\t\t\t},
'''
}
#
# These are carefully crafted functions, touch with care.
#
@@ -187,7 +214,17 @@ def prepare_typed_capability(cont, param, val):
# USE makes us assign the initial cap string with blank fields
if 'USE' in params:
cont.caps[captype] = cap_strings[captype]
# Special case for device
if 'DEVICE' in params:
# Extract device name and number
devid = captype[-1:]
devname = captype[: -1]
cont.caps[captype] = cap_strings[devname]
else:
cont.caps[captype] = cap_strings[captype]
# Prepare string template from capability type
templ = Template(cont.caps[captype])
@@ -196,6 +233,11 @@ def prepare_typed_capability(cont, param, val):
if captype[-len('pool'):] == 'pool':
cont.caps[captype] = templ.safe_substitute(cid = cont.id)
# If device, amend current container id and devnum as default
if 'DEVICE' in params:
cont.caps[captype] = \
templ.safe_substitute(cid = cont.id, devnum = devid)
# Fill in the blank size field
elif 'SIZE' in params:
# Get reference to capability string template

10
config/cml/arm.ruleset
View File

@@ -20,10 +20,8 @@ SUBARCH_V7 'ARM v7 Architecture, To be added'
arm_platform_type 'ARM Platform Type'
PLATFORM_EB 'Realview EB Platform, Unsupported yet'
PLATFORM_AB926 'Versatile AB926 Platform, Unsupported yet'
PLATFORM_PB926 'Versatile PB926 Platform'
PLATFORM_PB11MPCORE 'Realview PB11MPCore Platform'
PLATFORM_PBA8 'Realview PB-A8 Platform'
main_menu 'Codezero Microkernel Configurator'
arm_menu 'ARM Architecture Configuration'
@@ -56,10 +54,8 @@ choices arm_subarch_type
choices arm_platform_type
PLATFORM_EB
PLATFORM_AB926
PLATFORM_PB926
PLATFORM_PB11MPCORE
PLATFORM_PBA8
default PLATFORM_PB926
choices arm_cpu_type
@@ -104,9 +100,7 @@ default CONTAINERS from 1
#Platform rules:
unless SUBARCH_V5 suppress PLATFORM_PB926
unless SUBARCH_V5 suppress PLATFORM_AB926
unless SUBARCH_V6 suppress PLATFORM_PB11MPCORE
unless SUBARCH_V7 suppress PLATFORM_PBA8
#CPU rules:
unless SUBARCH_V5 suppress CPU_ARM926
@@ -124,8 +118,8 @@ unless ARCH_ARM suppress arm_menu
unless PLATFORM_EB suppress CPU_ARM1136
derive DRIVER_UART_PL011 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
derive DRIVER_TIMER_SP804 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
derive DRIVER_IRQ_PL190 from PLATFORM_PB926 or PLATFORM_AB926
derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_PBA8 or PLATFORM_EB
derive DRIVER_IRQ_PL190 from PLATFORM_PB926
derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_EB
# Toolchains:

170
config/cml/container_ruleset.template
View File

@@ -40,7 +40,7 @@ CONT%(cn)d_PAGER_TASK_START 'Container %(cn)d Task Address Space Region Start'
CONT%(cn)d_PAGER_TASK_END 'Container %(cn)d Task Address Space Region End'
CONT%(cn)d_PAGER_UTCB_START 'Container %(cn)d UTCB Mappings Region Start'
CONT%(cn)d_PAGER_UTCB_END 'Container %(cn)d UTCB Mappings Region End'
CONT%(cn)d_LINUX_ZRELADDR 'Container %(cn)d Linux ZRELADDR parameter'
CONT%(cn)d_LINUX_ZRELADDR 'Container %(cn)d Linux ZRELADDR Parameter'
CONT%(cn)d_LINUX_PAGE_OFFSET 'Container %(cn)d Linux PAGE_OFFSET Parameter'
CONT%(cn)d_LINUX_PHYS_OFFSET 'Container %(cn)d Linux PHYS_OFFSET Parameter'
CONT%(cn)d_LINUX_ROOTFS_ADDRESS 'Container %(cn)d Linux ROOTFS Address'
@@ -106,33 +106,33 @@ require CONT%(cn)d_PHYS3_START >= 0x40000
require CONT%(cn)d_LINUX_ZRELADDR > CONT%(cn)d_LINUX_PHYS_OFFSET + 0x8000
# TODO: Do we want to check if PAGER_LMA/VMA lies in allocated memory regions
default CONT%(cn)d_PHYS0_START from 0x40000
default CONT%(cn)d_PHYS0_END from 0x1000000
default CONT%(cn)d_PHYS1_START from 0x1000000
default CONT%(cn)d_PHYS1_END from 0x1100000
default CONT%(cn)d_PHYS2_START from 0x1100000
default CONT%(cn)d_PHYS2_END from 0x1200000
default CONT%(cn)d_PHYS3_START from 0x1200000
default CONT%(cn)d_PHYS3_END from 0x1300000
default CONT%(cn)d_PHYS0_START from (%(cn)d == 0 ? 0x100000 : (0x100000 + %(cn)d * 0x1000000))
default CONT%(cn)d_PHYS0_END from (CONT%(cn)d_PHYS0_START + 0xD00000)
default CONT%(cn)d_PHYS1_START from CONT%(cn)d_PHYS0_END
default CONT%(cn)d_PHYS1_END from (CONT%(cn)d_PHYS1_START + 0x100000)
default CONT%(cn)d_PHYS2_START from CONT%(cn)d_PHYS1_END
default CONT%(cn)d_PHYS2_END from (CONT%(cn)d_PHYS2_START + 0x100000)
default CONT%(cn)d_PHYS3_START from CONT%(cn)d_PHYS2_END
default CONT%(cn)d_PHYS3_END from (CONT%(cn)d_PHYS3_START + 0x100000)
default CONT%(cn)d_VIRT0_START from 0x90000000
default CONT%(cn)d_VIRT0_END from 0xa0000000
default CONT%(cn)d_VIRT1_START from 0x40000000
default CONT%(cn)d_VIRT1_END from 0x50000000
default CONT%(cn)d_VIRT2_START from 0x30000000
default CONT%(cn)d_VIRT2_END from 0x40000000
default CONT%(cn)d_VIRT3_START from 0xf8100000
default CONT%(cn)d_VIRT3_END from 0xf8200000
default CONT%(cn)d_VIRT4_START from 0xd0000000
default CONT%(cn)d_VIRT4_END from 0xe0000000
default CONT%(cn)d_VIRT0_START from (%(cn)d == 0 ? 0xa0000000 : (0xa0000000 + %(cn)d * 0x10000000))
default CONT%(cn)d_VIRT0_END from (CONT%(cn)d_VIRT0_START + 0x10000000)
default CONT%(cn)d_VIRT1_START from (%(cn)d == 0 ? 0x80000000 : (0x80000000 + %(cn)d * 0x8000000))
default CONT%(cn)d_VIRT1_END from (CONT%(cn)d_VIRT1_START + 0x8000000)
default CONT%(cn)d_VIRT2_START from (%(cn)d == 0 ? 0x40000000 : (0x40000000 + %(cn)d * 0x10000000))
default CONT%(cn)d_VIRT2_END from (CONT%(cn)d_VIRT2_START + 0x10000000)
default CONT%(cn)d_VIRT3_START from (%(cn)d == 0 ? 0xf8100000 : (0xf8100000 + %(cn)d * 0x100000))
default CONT%(cn)d_VIRT3_END from (CONT%(cn)d_VIRT3_START + 0x100000)
default CONT%(cn)d_VIRT4_START from (%(cn)d == 0 ? 0x10000000 : (0x10000000 + %(cn)d * 0x10000000))
default CONT%(cn)d_VIRT4_END from (CONT%(cn)d_VIRT4_START + 0x10000000)
default CONT%(cn)d_VIRT5_START from 0xe0000000
default CONT%(cn)d_VIRT5_END from 0xf0000000
default CONT%(cn)d_OPT_NAME from (CONT%(cn)d_TYPE_LINUX==y) ? "linux%(cn)d" : ((CONT%(cn)d_TYPE_BAREMETAL==y) ? "baremetal%(cn)d" : "posix%(cn)d")
when CONT%(cn)d_TYPE_LINUX==y suppress cont%(cn)d_default_pager_params cont%(cn)d_posix_pager_params
when CONT%(cn)d_TYPE_BAREMETAL==y suppress cont%(cn)d_linux_pager_params cont%(cn)d_posix_pager_params
when CONT%(cn)d_TYPE_POSIX==y suppress cont%(cn)d_linux_pager_params
when CONT%(cn)d_TYPE_LINUX==y suppress cont%(cn)d_default_pager_params
unless CONT%(cn)d_TYPE_POSIX==y suppress cont%(cn)d_posix_pager_params
unless CONT%(cn)d_TYPE_LINUX==y suppress cont%(cn)d_linux_pager_params
unless CONT%(cn)d_TYPE_BAREMETAL==y suppress cont%(cn)d_baremetal_params
# derive symbols, for cinfo.c, depending on the type of container selected
@@ -144,6 +144,7 @@ symbols
cont%(cn)d_menu 'Container %(cn)d Parameters'
cont%(cn)d_physmem_list 'Container %(cn)d Physical Memory Regions (Capabilities)'
cont%(cn)d_virtmem_list 'Container %(cn)d Virtual Memory Regions (Capabilities)'
cont%(cn)d_device_list 'Container %(cn)d Devices (Capabilities)'
container%(cn)d_type 'Container %(cn)d Type'
container%(cn)d_options 'Container %(cn)d Options'
@@ -156,12 +157,16 @@ CONT%(cn)d_BAREMETAL_PROJ0 'Empty Project'
CONT%(cn)d_BAREMETAL_PROJ1 'Hello World'
CONT%(cn)d_BAREMETAL_PROJ2 'Thread Library Demo'
CONT%(cn)d_BAREMETAL_PROJ3 'Test Project'
CONT%(cn)d_BAREMETAL_PROJ4 'UART Service'
CONT%(cn)d_BAREMETAL_PROJ5 'Timer Service'
choices cont%(cn)d_baremetal_params
CONT%(cn)d_BAREMETAL_PROJ0
CONT%(cn)d_BAREMETAL_PROJ1
CONT%(cn)d_BAREMETAL_PROJ2
CONT%(cn)d_BAREMETAL_PROJ3
CONT%(cn)d_BAREMETAL_PROJ4
CONT%(cn)d_BAREMETAL_PROJ5
default CONT%(cn)d_BAREMETAL_PROJ0
menu cont%(cn)d_default_pager_params
@@ -208,6 +213,126 @@ menu cont%(cn)d_physmem_list
CONT%(cn)d_PHYS3_START@
CONT%(cn)d_PHYS3_END@
#
# Device menu and options per container
#
symbols
cont%(cn)d_device_uart1 'Container %(cn)d UART1 Menu'
cont%(cn)d_device_uart2 'Container %(cn)d UART2 Menu'
cont%(cn)d_device_uart3 'Container %(cn)d UART3 Menu'
cont%(cn)d_device_timer1 'Container %(cn)d TIMER23 Menu'
CONT%(cn)d_CAP_UART1_DEVICE_USE 'Container %(cn)d UART1 Enable'
CONT%(cn)d_CAP_UART2_DEVICE_USE 'Container %(cn)d UART2 Enable'
CONT%(cn)d_CAP_UART3_DEVICE_USE 'Container %(cn)d UART3 Enable'
CONT%(cn)d_CAP_TIMER1_DEVICE_USE 'Container %(cn)d TIMER23 Enable'
default CONT%(cn)d_CAP_UART1_DEVICE_USE from n
default CONT%(cn)d_CAP_UART2_DEVICE_USE from n
default CONT%(cn)d_CAP_UART3_DEVICE_USE from n
default CONT%(cn)d_CAP_TIMER1_DEVICE_USE from n
# Note: We are suppressing the menu not symbol here, as in future
# we will add new parameters to menu, so suprpressing each symbol
# will be cumbersome
when CONT0_CAP_UART1_DEVICE_USE == y suppress
cont1_device_uart1
cont2_device_uart1
cont3_device_uart1
when CONT1_CAP_UART1_DEVICE_USE == y suppress
cont0_device_uart1
cont2_device_uart1
cont3_device_uart1
when CONT2_CAP_UART1_DEVICE_USE == y suppress
cont0_device_uart1
cont1_device_uart1
cont3_device_uart1
when CONT3_CAP_UART1_DEVICE_USE == y suppress
cont0_device_uart1
cont1_device_uart1
cont2_device_uart1
when CONT0_CAP_UART2_DEVICE_USE == y suppress
cont1_device_uart2
cont2_device_uart2
cont3_device_uart2
when CONT1_CAP_UART2_DEVICE_USE == y suppress
cont0_device_uart2
cont2_device_uart2
cont3_device_uart2
when CONT2_CAP_UART2_DEVICE_USE == y suppress
cont0_device_uart2
cont1_device_uart2
cont2_device_uart2
when CONT3_CAP_UART2_DEVICE_USE == y suppress
cont0_device_uart2
cont1_device_uart2
cont2_device_uart2
when CONT0_CAP_UART3_DEVICE_USE == y suppress
cont1_device_uart3
cont2_device_uart3
cont3_device_uart3
when CONT1_CAP_UART3_DEVICE_USE == y suppress
cont0_device_uart3
cont2_device_uart3
cont3_device_uart3
when CONT2_CAP_UART3_DEVICE_USE == y suppress
cont0_device_uart3
cont1_device_uart3
cont3_device_uart3
when CONT3_CAP_UART3_DEVICE_USE == y suppress
cont0_device_uart3
cont1_device_uart3
cont2_device_uart3
when CONT0_CAP_TIMER1_DEVICE_USE == y suppress
cont1_device_timer1
cont2_device_timer1
cont3_device_timer1
when CONT1_CAP_TIMER1_DEVICE_USE == y suppress
cont0_device_timer1
cont2_device_timer1
cont3_device_timer1
when CONT2_CAP_TIMER1_DEVICE_USE == y suppress
cont0_device_timer1
cont1_device_timer1
cont3_device_timer1
when CONT3_CAP_TIMER1_DEVICE_USE == y suppress
cont0_device_timer1
cont1_device_timer1
cont2_device_timer1
menu cont%(cn)d_device_uart1
CONT%(cn)d_CAP_UART1_DEVICE_USE
menu cont%(cn)d_device_uart2
CONT%(cn)d_CAP_UART2_DEVICE_USE
menu cont%(cn)d_device_uart3
CONT%(cn)d_CAP_UART3_DEVICE_USE
menu cont%(cn)d_device_timer1
CONT%(cn)d_CAP_TIMER1_DEVICE_USE
menu cont%(cn)d_device_list
cont%(cn)d_device_uart1
cont%(cn)d_device_uart2
cont%(cn)d_device_uart3
cont%(cn)d_device_timer1
#
# Settings for Custom Capabilities
#
@@ -639,6 +764,7 @@ menu container%(cn)d_options
cont%(cn)d_physmem_list
cont%(cn)d_virtmem_list
cont%(cn)d_capability_list
cont%(cn)d_device_list
choices container%(cn)d_type
CONT%(cn)d_TYPE_BAREMETAL

1
config/configuration.py
View File

@@ -12,7 +12,6 @@ class Container:
self.name = None
self.type = None
self.id = id
self.src_path = None
self.baremetal_id = 0
self.pager_lma = 0
self.pager_vma = 0

66
conts/baremetal/baremetal4/SConstruct Normal file
View File

@@ -0,0 +1,66 @@
# -*- mode: python; coding: utf-8; -*-
#
# Codezero -- Virtualization microkernel for embedded systems.
#
# Copyright © 2009 B Labs Ltd
#
import os, shelve, sys
from os.path import *
PROJRELROOT = '../..'
sys.path.append(PROJRELROOT)
from config.projpaths import *
from config.configuration import *
config = configuration_retrieve()
platform = config.platform
arch = config.arch
gcc_cpu_flag = config.gcc_cpu_flag
LIBL4_RELDIR = 'conts/libl4'
KERNEL_INCLUDE = join(PROJROOT, 'include')
LIBL4_DIR = join(PROJROOT, LIBL4_RELDIR)
LIBL4_INCLUDE = join(LIBL4_DIR, 'include')
LIBL4_LIBPATH = join(BUILDDIR, LIBL4_RELDIR)
# Locally important paths are here
LIBC_RELDIR = 'conts/libc'
LIBC_DIR = join(PROJROOT, LIBC_RELDIR)
LIBC_LIBPATH = join(BUILDDIR, LIBC_RELDIR)
LIBC_INCLUDE = [join(LIBC_DIR, 'include'), \
join(LIBC_DIR, 'include/arch' + '/' + arch)]
LIBDEV_RELDIR = 'conts/libdev'
LIBDEV_DIR = join(PROJROOT, LIBDEV_RELDIR)
LIBDEV_LIBPATH = join(join(BUILDDIR, LIBDEV_RELDIR), 'sys-userspace')
LIBDEV_INCLUDE = [join(LIBDEV_DIR, 'uart/include')]
LIBDEV_CCFLAGS = '-DPLATFORM_' + platform.upper()
# FIXME: Add these to autogenerated SConstruct !!!
LIBMEM_RELDIR = 'conts/libmem'
LIBMEM_DIR = join(PROJROOT, LIBMEM_RELDIR)
LIBMEM_LIBPATH = join(BUILDDIR, LIBMEM_RELDIR)
LIBMEM_INCLUDE = LIBMEM_DIR
env = Environment(CC = config.user_toolchain + 'gcc',
# We don't use -nostdinc because sometimes we need standard headers,
# such as stdarg.h e.g. for variable args, as in printk().
CCFLAGS = ['-g', '-nostdlib', '-ffreestanding', '-std=gnu99', '-Wall', \
'-Werror', ('-mcpu=' + gcc_cpu_flag), LIBDEV_CCFLAGS],
LINKFLAGS = ['-nostdlib', '-T' + "include/linker.lds", "-u_start"],
ASFLAGS = ['-D__ASSEMBLY__'], \
PROGSUFFIX = '.elf', # The suffix to use for final executable\
ENV = {'PATH' : os.environ['PATH']}, # Inherit shell path\
LIBS = ['gcc', 'libl4', 'libmalloc', 'c-userspace', 'libdev-userspace', 'gcc', 'c-userspace'], # libgcc.a - This is required for division routines.
CPPPATH = ["#include", KERNEL_INCLUDE, LIBL4_INCLUDE, LIBDEV_INCLUDE, LIBC_INCLUDE, LIBMEM_INCLUDE],
LIBPATH = [LIBL4_LIBPATH, LIBDEV_LIBPATH, LIBC_LIBPATH, LIBMEM_LIBPATH],
CPPFLAGS = '-include l4/config.h -include l4/macros.h -include l4/types.h')
src = Glob('*.[cS]')
src += Glob('src/*.[cS]')
objs = env.Object(src)
prog = env.Program('main.elf', objs)
Depends(prog, 'include/linker.lds')

21
conts/baremetal/baremetal4/container.c Normal file
View File

@@ -0,0 +1,21 @@
/*
* Container entry point for pager
*
* Copyright (C) 2007-2009 B Labs Ltd.
*/
#include <l4lib/init.h>
#include <l4lib/utcb.h>
extern void main(void);
void __container_init(void)
{
/* Generic L4 initialisation */
__l4_init();
/* Entry to main */
main();
}

12
conts/baremetal/baremetal4/include/capability.h Normal file
View File

@@ -0,0 +1,12 @@
#ifndef __UART_SERVICE_CAPABILITY_H__
#define __UART_SERVICE_CAPABILITY_H__
#include <l4lib/capability.h>
#include <l4/api/capability.h>
#include <l4/generic/cap-types.h>
void cap_print(struct capability *cap);
void cap_list_print(struct cap_list *cap_list);
int cap_read_all();
#endif /* header */

13
conts/baremetal/baremetal4/include/container.h Normal file
View File

@@ -0,0 +1,13 @@
/*
* Autogenerated definitions for this container.
*/
#ifndef __CONTAINER_H__
#define __CONTAINER_H__
#define __CONTAINER_NAME__ "uart_service"
#define __CONTAINER_ID__ 0
#define __CONTAINER__ "cont0"
#endif /* __CONTAINER_H__ */

7
conts/baremetal/baremetal4/include/linker.h Normal file
View File

@@ -0,0 +1,7 @@
#ifndef __LINKER_H__
#define __LINKER_H__
extern char vma_start[];
extern char __end[];
#endif /* __LINKER_H__ */

357
conts/baremetal/baremetal4/main.c Normal file
View File

@@ -0,0 +1,357 @@
/*
* UART service for userspace
*/
#include <l4lib/arch/syslib.h>
#include <l4lib/arch/syscalls.h>
#include <l4lib/addr.h>
#include <l4lib/exregs.h>
#include <l4lib/ipcdefs.h>
#include <l4/api/errno.h>
#include <l4/api/space.h>
#include <capability.h>
#include <container.h>
#include <pl011_uart.h> /* FIXME: Its best if this is <libdev/uart/pl011.h> */
#include <linker.h>
#define UARTS_TOTAL 3
static struct capability caparray[32];
static int total_caps = 0;
struct capability uart_cap[UARTS_TOTAL];
void cap_print(struct capability *cap)
{
printf("Capability id:\t\t\t%d\n", cap->capid);
printf("Capability resource id:\t\t%d\n", cap->resid);
printf("Capability owner id:\t\t%d\n",cap->owner);
switch (cap_type(cap)) {
case CAP_TYPE_TCTRL:
printf("Capability type:\t\t%s\n", "Thread Control");
break;
case CAP_TYPE_EXREGS:
printf("Capability type:\t\t%s\n", "Exchange Registers");
break;
case CAP_TYPE_MAP_PHYSMEM:
printf("Capability type:\t\t%s\n", "Map/Physmem");
break;
case CAP_TYPE_MAP_VIRTMEM:
printf("Capability type:\t\t%s\n", "Map/Virtmem");
break;
case CAP_TYPE_IPC:
printf("Capability type:\t\t%s\n", "Ipc");
break;
case CAP_TYPE_UMUTEX:
printf("Capability type:\t\t%s\n", "Mutex");
break;
case CAP_TYPE_QUANTITY:
printf("Capability type:\t\t%s\n", "Quantitative");
break;
default:
printf("Capability type:\t\t%s\n", "Unknown");
break;
}
switch (cap_rtype(cap)) {
case CAP_RTYPE_THREAD:
printf("Capability resource type:\t%s\n", "Thread");
break;
case CAP_RTYPE_SPACE:
printf("Capability resource type:\t%s\n", "Space");
break;
case CAP_RTYPE_CONTAINER:
printf("Capability resource type:\t%s\n", "Container");
break;
case CAP_RTYPE_THREADPOOL:
printf("Capability resource type:\t%s\n", "Thread Pool");
break;
case CAP_RTYPE_SPACEPOOL:
printf("Capability resource type:\t%s\n", "Space Pool");
break;
case CAP_RTYPE_MUTEXPOOL:
printf("Capability resource type:\t%s\n", "Mutex Pool");
break;
case CAP_RTYPE_MAPPOOL:
printf("Capability resource type:\t%s\n", "Map Pool (PMDS)");
break;
case CAP_RTYPE_CPUPOOL:
printf("Capability resource type:\t%s\n", "Cpu Pool");
break;
case CAP_RTYPE_CAPPOOL:
printf("Capability resource type:\t%s\n", "Capability Pool");
break;
default:
printf("Capability resource type:\t%s\n", "Unknown");
break;
}
printf("\n");
}
void cap_array_print()
{
printf("Capabilities\n"
"~~~~~~~~~~~~\n");
for (int i = 0; i < total_caps; i++)
cap_print(&caparray[i]);
printf("\n");
}
int cap_read_all()
{
int ncaps;
int err;
/* Read number of capabilities */
if ((err = l4_capability_control(CAP_CONTROL_NCAPS,
0, 0, 0, &ncaps)) < 0) {
printf("l4_capability_control() reading # of"
" capabilities failed.\n Could not "
"complete CAP_CONTROL_NCAPS request.\n");
BUG();
}
total_caps = ncaps;
/* Read all capabilities */
if ((err = l4_capability_control(CAP_CONTROL_READ,
0, 0, 0, caparray)) < 0) {
printf("l4_capability_control() reading of "
"capabilities failed.\n Could not "
"complete CAP_CONTROL_READ_CAPS request.\n");
BUG();
}
#if 0
cap_array_print(&caparray);
#endif
return 0;
}
/*
* Scans for up to UARTS_TOTAL uart devices in capabilities.
*/
int uart_probe_devices(void)
{
int uarts = 0;
/* Scan for uart devices */
for (int i = 0; i < total_caps; i++) {
/* Match device type */
if (cap_devtype(&caparray[i]) == CAP_DEVTYPE_UART) {
/* Copy to correct device index */
memcpy(&uart_cap[cap_devnum(&caparray[i]) - 1],
&caparray[i], sizeof(uart_cap[0]));
uarts++;
}
}
if (uarts != UARTS_TOTAL) {
printf("%s: Error, not all uarts could be found. "
"uarts=%d\n", __CONTAINER_NAME__, uarts);
return -ENODEV;
}
return 0;
}
static struct pl011_uart uart[UARTS_TOTAL];
int uart_setup_devices(void)
{
for (int i = 0; i < UARTS_TOTAL; i++) {
/* Get one page from address pool */
uart[i].base = (unsigned long)l4_new_virtual(1);
/* Map uart to a virtual address region */
if (IS_ERR(l4_map((void *)__pfn_to_addr(uart_cap[i].start),
(void *)uart[i].base, uart_cap[i].size, MAP_USR_IO_FLAGS,
self_tid()))) {
printf("%s: FATAL: Failed to map UART device "
"%d to a virtual address\n",
__CONTAINER_NAME__,
cap_devnum(&uart_cap[i]));
BUG();
}
/* Initialize uart */
pl011_initialise(&uart[i]);
}
return 0;
}
static struct address_pool device_vaddr_pool;
/*
* Initialize a virtual address pool
* for mapping physical devices.
*/
void init_vaddr_pool(void)
{
for (int i = 0; i < total_caps; i++) {
/* Find the virtual memory region for this process */
if (cap_type(&caparray[i]) == CAP_TYPE_MAP_VIRTMEM &&
__pfn_to_addr(caparray[i].start) ==
(unsigned long)vma_start) {
/*
* Do we have any unused virtual space
* where we run, and do we have enough
* pages of it to map all uarts?
*/
if (__pfn(page_align_up(__end))
+ UARTS_TOTAL <= caparray[i].end) {
/*
* Yes. We initialize the device
* virtual memory pool here.
*
* We may allocate virtual memory
* addresses from this pool.
*/
address_pool_init(&device_vaddr_pool, page_align_up(__end),
__pfn_to_addr(caparray[i].end), UARTS_TOTAL);
return;
} else
goto out_err;
}
}
out_err:
printf("%s: FATAL: No virtual memory "
"region available to map "
"devices.\n", __CONTAINER_NAME__);
BUG();
}
void *l4_new_virtual(int npages)
{
return address_new(&device_vaddr_pool, npages, PAGE_SIZE);
}
void uart_generic_tx(char c, int devno)
{
pl011_tx_char(uart[devno].base, c);
}
char uart_generic_rx(int devno)
{
char c;
pl011_rx_char(uart[devno].base, &c);
return c;
}
void handle_requests(void)
{
l4id_t senderid;
u32 tag;
int ret;
printf("%s: Initiating ipc.\n", __CONTAINER__);
if ((ret = l4_receive(L4_ANYTHREAD)) < 0) {
printf("%s: %s: IPC Error: %d. Quitting...\n", __CONTAINER__,
__FUNCTION__, ret);
BUG();
}
/* Syslib conventional ipc data which uses first few mrs. */
tag = l4_get_tag();
senderid = l4_get_sender();
/*
* TODO:
*
* Maybe add tags here that handle requests for sharing
* of the requested uart device with the client?
*
* In order to be able to do that, we should have a
* shareable/grantable capability to the device. Also
* the request should (currently) come from a task
* inside the current container
*/
switch (tag) {
case L4_IPC_TAG_UART_SENDCHAR:
uart_generic_tx(0, 1); /*FIXME: Fill in */
break;
case L4_IPC_TAG_UART_RECVCHAR:
uart_generic_rx(1); /* FIXME: Fill in */
break;
default:
printf("%s: Error received ipc from 0x%x residing "
"in container %x with an unrecognized tag: "
"0x%x\n", __CONTAINER__, senderid,
__cid(senderid), tag);
}
/* Reply */
if ((ret = l4_ipc_return(ret)) < 0) {
printf("%s: IPC return error: %d.\n", __FUNCTION__, ret);
BUG();
}
}
/*
* UTCB-size aligned utcb.
*
* BIG WARNING NOTE: This declaration is legal if we are
* running in a disjoint virtual address space, where the
* utcb declaration lies in a unique virtual address in
* the system.
*/
#define DECLARE_UTCB(name) \
struct utcb name ALIGN(sizeof(struct utcb))
DECLARE_UTCB(utcb);
/* Set up own utcb for ipc */
int l4_utcb_setup(void *utcb_address)
{
struct task_ids ids;
struct exregs_data exregs;
int err;
l4_getid(&ids);
/* Clear utcb */
memset(utcb_address, 0, sizeof(struct utcb));
/* Setup exregs for utcb request */
memset(&exregs, 0, sizeof(exregs));
exregs_set_utcb(&exregs, (unsigned long)utcb_address);
if ((err = l4_exchange_registers(&exregs, ids.tid)) < 0)
return err;
return 0;
}
void main(void)
{
int err;
/* Read all capabilities */
cap_read_all();
/* Scan for uart devices in capabilities */
uart_probe_devices();
/* Initialize virtual address pool for uarts */
init_vaddr_pool();
/* Map and initialize uart devices */
uart_setup_devices();
/* Setup own utcb */
if ((err = l4_utcb_setup(&utcb)) < 0) {
printf("FATAL: Could not set up own utcb. "
"err=%d\n", err);
BUG();
}
/* Listen for uart requests */
while (1)
handle_requests();
}

0
conts/baremetal/baremetal4/src/test.c Normal file
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71
conts/baremetal/baremetal5/SConstruct Normal file
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@@ -0,0 +1,71 @@
# -*- mode: python; coding: utf-8; -*-
#
# Codezero -- Virtualization microkernel for embedded systems.
#
# Copyright © 2009 B Labs Ltd
#
import os, shelve, sys
from os.path import *
PROJRELROOT = '../..'
sys.path.append(PROJRELROOT)
from config.projpaths import *
from config.configuration import *
from configure import *
config = configuration_retrieve()
arch = config.arch
platform = config.platform
gcc_cpu_flag = config.gcc_cpu_flag
# Wrapper library for system calls
LIBL4_RELDIR = 'conts/libl4'
KERNEL_INCLUDE = join(PROJROOT, 'include')
LIBL4_DIR = join(PROJROOT, LIBL4_RELDIR)
LIBL4_INCLUDE = join(LIBL4_DIR, 'include')
LIBL4_LIBPATH = join(BUILDDIR, LIBL4_RELDIR)
# Some user-space libraries
LIBC_RELDIR = 'conts/libc'
LIBC_DIR = join(PROJROOT, LIBC_RELDIR)
LIBC_LIBPATH = join(BUILDDIR, LIBC_RELDIR)
LIBC_INCLUDE = [join(LIBC_DIR, 'include'), \
join(LIBC_DIR, 'include/arch' + '/' + arch)]
LIBDEV_RELDIR = 'conts/libdev'
LIBDEV_DIR = join(PROJROOT, LIBDEV_RELDIR)
LIBDEV_LIBPATH = join(join(BUILDDIR, LIBDEV_RELDIR), 'sys-userspace')
LIBDEV_INCLUDE = [join(LIBDEV_DIR, 'uart/include'),
join(LIBDEV_DIR, 'timer/sp804/include')]
LIBDEV_CCFLAGS = '-DPLATFORM_' + platform.upper()
LIBMEM_RELDIR = 'conts/libmem'
LIBMEM_DIR = join(PROJROOT, LIBMEM_RELDIR)
LIBMEM_LIBPATH = join(BUILDDIR, LIBMEM_RELDIR)
LIBMEM_INCLUDE = LIBMEM_DIR
env = Environment(CC = config.user_toolchain + 'gcc',
# We don't use -nostdinc because sometimes we need standard headers,
# such as stdarg.h e.g. for variable args, as in printk().
CCFLAGS = ['-g', '-nostdlib', '-ffreestanding', '-std=gnu99', '-Wall', \
'-Werror', ('-mcpu=' + gcc_cpu_flag), LIBDEV_CCFLAGS], \
LINKFLAGS = ['-nostdlib', '-T' + "include/linker.lds", "-u_start"],\
ASFLAGS = ['-D__ASSEMBLY__'], \
PROGSUFFIX = '.elf', # The suffix to use for final executable
ENV = {'PATH' : os.environ['PATH']}, # Inherit shell path
LIBS = ['gcc', 'libl4', 'c-userspace', 'libdev-userspace', \
'libmm', 'libmc', 'libmalloc', 'gcc', 'c-userspace'],
# libgcc.a - This is required for division routines.
CPPPATH = ["#include", KERNEL_INCLUDE, LIBL4_INCLUDE, LIBDEV_INCLUDE, \
LIBC_INCLUDE, LIBMEM_INCLUDE],
LIBPATH = [LIBL4_LIBPATH, LIBDEV_LIBPATH, LIBC_LIBPATH, LIBMEM_LIBPATH],
CPPFLAGS = '-include l4/config.h -include l4/macros.h -include l4/types.h')
src = Glob('*.[cS]')
src += Glob('src/*.[cS]')
objs = env.Object(src)
prog = env.Program('main.elf', objs)
Depends(prog, 'include/linker.lds')

21
conts/baremetal/baremetal5/container.c Normal file
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@@ -0,0 +1,21 @@
/*
* Container entry point for pager
*
* Copyright (C) 2007-2009 B Labs Ltd.
*/
#include <l4lib/init.h>
#include <l4lib/utcb.h>
void main(void);
void __container_init(void)
{
/* Generic L4 initialisation */
__l4_init();
/* Entry to main */
main();
}

12
conts/baremetal/baremetal5/include/capability.h Normal file
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@@ -0,0 +1,12 @@
#ifndef __UART_SERVICE_CAPABILITY_H__
#define __UART_SERVICE_CAPABILITY_H__
#include <l4lib/capability.h>
#include <l4/api/capability.h>
#include <l4/generic/cap-types.h>
void cap_print(struct capability *cap);
void cap_list_print(struct cap_list *cap_list);
int cap_read_all();
#endif /* header */

13
conts/baremetal/baremetal5/include/container.h Normal file
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@@ -0,0 +1,13 @@
/*
* Autogenerated definitions for this container.
*/
#ifndef __CONTAINER_H__
#define __CONTAINER_H__
#define __CONTAINER_NAME__ "timer_service"
#define __CONTAINER_ID__ 0
#define __CONTAINER__ "cont0"
#endif /* __CONTAINER_H__ */

7
conts/baremetal/baremetal5/include/linker.h Normal file
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@@ -0,0 +1,7 @@
#ifndef __LINKER_H__
#define __LINKER_H__
extern char vma_start[];
extern char __end[];
#endif /* __LINKER_H__ */

0
conts/baremetal/baremetal5/include/test.h Normal file
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357
conts/baremetal/baremetal5/main.c Normal file
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@@ -0,0 +1,357 @@
/*
* Timer service for userspace
*/
#include <l4lib/arch/syslib.h>
#include <l4lib/arch/syscalls.h>
#include <l4lib/addr.h>
#include <l4lib/exregs.h>
#include <l4lib/ipcdefs.h>
#include <l4/api/errno.h>
#include <l4/api/space.h>
#include <capability.h>
#include <container.h>
#include "sp804_timer.h"
#include <linker.h>
/* Frequency of timer in MHz */
#define TIMER_FREQUENCY 1
#define TIMERS_TOTAL 1
static struct capability caparray[32];
static int total_caps = 0;
struct capability timer_cap[TIMERS_TOTAL];
void cap_print(struct capability *cap)
{
printf("Capability id:\t\t\t%d\n", cap->capid);
printf("Capability resource id:\t\t%d\n", cap->resid);
printf("Capability owner id:\t\t%d\n",cap->owner);
switch (cap_type(cap)) {
case CAP_TYPE_TCTRL:
printf("Capability type:\t\t%s\n", "Thread Control");
break;
case CAP_TYPE_EXREGS:
printf("Capability type:\t\t%s\n", "Exchange Registers");
break;
case CAP_TYPE_MAP_PHYSMEM:
printf("Capability type:\t\t%s\n", "Map/Physmem");
break;
case CAP_TYPE_MAP_VIRTMEM:
printf("Capability type:\t\t%s\n", "Map/Virtmem");
break;
case CAP_TYPE_IPC:
printf("Capability type:\t\t%s\n", "Ipc");
break;
case CAP_TYPE_UMUTEX:
printf("Capability type:\t\t%s\n", "Mutex");
break;
case CAP_TYPE_QUANTITY:
printf("Capability type:\t\t%s\n", "Quantitative");
break;
default:
printf("Capability type:\t\t%s\n", "Unknown");
break;
}
switch (cap_rtype(cap)) {
case CAP_RTYPE_THREAD:
printf("Capability resource type:\t%s\n", "Thread");
break;
case CAP_RTYPE_SPACE:
printf("Capability resource type:\t%s\n", "Space");
break;
case CAP_RTYPE_CONTAINER:
printf("Capability resource type:\t%s\n", "Container");
break;
case CAP_RTYPE_THREADPOOL:
printf("Capability resource type:\t%s\n", "Thread Pool");
break;
case CAP_RTYPE_SPACEPOOL:
printf("Capability resource type:\t%s\n", "Space Pool");
break;
case CAP_RTYPE_MUTEXPOOL:
printf("Capability resource type:\t%s\n", "Mutex Pool");
break;
case CAP_RTYPE_MAPPOOL:
printf("Capability resource type:\t%s\n", "Map Pool (PMDS)");
break;
case CAP_RTYPE_CPUPOOL:
printf("Capability resource type:\t%s\n", "Cpu Pool");
break;
case CAP_RTYPE_CAPPOOL:
printf("Capability resource type:\t%s\n", "Capability Pool");
break;
default:
printf("Capability resource type:\t%s\n", "Unknown");
break;
}
printf("\n");
}
void cap_array_print()
{
printf("Capabilities\n"
"~~~~~~~~~~~~\n");
for (int i = 0; i < total_caps; i++)
cap_print(&caparray[i]);
printf("\n");
}
int cap_read_all()
{
int ncaps;
int err;
/* Read number of capabilities */
if ((err = l4_capability_control(CAP_CONTROL_NCAPS,
0, 0, 0, &ncaps)) < 0) {
printf("l4_capability_control() reading # of"
" capabilities failed.\n Could not "
"complete CAP_CONTROL_NCAPS request.\n");
BUG();
}
total_caps = ncaps;
/* Read all capabilities */
if ((err = l4_capability_control(CAP_CONTROL_READ,
0, 0, 0, caparray)) < 0) {
printf("l4_capability_control() reading of "
"capabilities failed.\n Could not "
"complete CAP_CONTROL_READ_CAPS request.\n");
BUG();
}
#if 0
cap_array_print(&caparray);
#endif
return 0;
}
/*
* Scans for up to TIMERS_TOTAL timer devices in capabilities.
*/
int timer_probe_devices(void)
{
int timers = 0;
/* Scan for timer devices */
for (int i = 0; i < total_caps; i++) {
/* Match device type */
if (cap_devtype(&caparray[i]) == CAP_DEVTYPE_TIMER) {
/* Copy to correct device index */
memcpy(&timer_cap[cap_devnum(&caparray[i]) - 1],
&caparray[i], sizeof(timer_cap[0]));
timers++;
}
}
if (timers != TIMERS_TOTAL) {
printf("%s: Error, not all timers could be found. "
"timers=%d\n", __CONTAINER_NAME__, timers);
return -ENODEV;
}
return 0;
}
static struct sp804_timer timer[TIMERS_TOTAL];
int timer_setup_devices(void)
{
for (int i = 0; i < TIMERS_TOTAL; i++) {
/* Get one page from address pool */
timer[i].base = (unsigned long)l4_new_virtual(1);
/* Map timers to a virtual address region */
if (IS_ERR(l4_map((void *)__pfn_to_addr(timer_cap[i].start),
(void *)timer[i].base, timer_cap[i].size, MAP_USR_IO_FLAGS,
self_tid()))) {
printf("%s: FATAL: Failed to map TIMER device "
"%d to a virtual address\n",
__CONTAINER_NAME__,
cap_devnum(&timer_cap[i]));
BUG();
}
/* Initialise timer */
sp804_init(timer[i].base, SP804_TIMER_RUNMODE_FREERUN, \
SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
SP804_TIMER_IRQDISABLE);
/* Enable Timer */
sp804_enable(timer[i].base, 1);
}
return 0;
}
static struct address_pool device_vaddr_pool;
/*
* Initialize a virtual address pool
* for mapping physical devices.
*/
void init_vaddr_pool(void)
{
for (int i = 0; i < total_caps; i++) {
/* Find the virtual memory region for this process */
if (cap_type(&caparray[i]) == CAP_TYPE_MAP_VIRTMEM &&
__pfn_to_addr(caparray[i].start) ==
(unsigned long)vma_start) {
/*
* Do we have any unused virtual space
* where we run, and do we have enough
* pages of it to map all timers?
*/
if (__pfn(page_align_up(__end))
+ TIMERS_TOTAL <= caparray[i].end) {
/*
* Yes. We initialize the device
* virtual memory pool here.
*
* We may allocate virtual memory
* addresses from this pool.
*/
address_pool_init(&device_vaddr_pool, page_align_up(__end),
__pfn_to_addr(caparray[i].end), TIMERS_TOTAL);
return;
} else
goto out_err;
}
}
out_err:
printf("%s: FATAL: No virtual memory "
"region available to map "
"devices.\n", __CONTAINER_NAME__);
BUG();
}
void *l4_new_virtual(int npages)
{
return address_new(&device_vaddr_pool, npages, PAGE_SIZE);
}
int timer_gettime(int devno)
{
return sp804_read_value(timer[devno].base);
}
void handle_requests(void)
{
l4id_t senderid;
u32 tag;
int ret;
printf("%s: Initiating ipc.\n", __CONTAINER__);
if ((ret = l4_receive(L4_ANYTHREAD)) < 0) {
printf("%s: %s: IPC Error: %d. Quitting...\n", __CONTAINER__,
__FUNCTION__, ret);
BUG();
}
/* Syslib conventional ipc data which uses first few mrs. */
tag = l4_get_tag();
senderid = l4_get_sender();
/*
* TODO:
*
* Maybe add tags here that handle requests for sharing
* of the requested timer device with the client?
*
* In order to be able to do that, we should have a
* shareable/grantable capability to the device. Also
* the request should (currently) come from a task
* inside the current container
*/
switch (tag) {
case L4_IPC_TAG_TIMER_GETTIME:
timer_gettime(1);
break;
default:
printf("%s: Error received ipc from 0x%x residing "
"in container %x with an unrecognized tag: "
"0x%x\n", __CONTAINER__, senderid,
__cid(senderid), tag);
}
/* Reply */
if ((ret = l4_ipc_return(ret)) < 0) {
printf("%s: IPC return error: %d.\n", __FUNCTION__, ret);
BUG();
}
}
/*
* UTCB-size aligned utcb.
*
* BIG WARNING NOTE: This declaration is legal if we are
* running in a disjoint virtual address space, where the
* utcb declaration lies in a unique virtual address in
* the system.
*/
#define DECLARE_UTCB(name) \
struct utcb name ALIGN(sizeof(struct utcb))
DECLARE_UTCB(utcb);
/* Set up own utcb for ipc */
int l4_utcb_setup(void *utcb_address)
{
struct task_ids ids;
struct exregs_data exregs;
int err;
l4_getid(&ids);
/* Clear utcb */
memset(utcb_address, 0, sizeof(struct utcb));
/* Setup exregs for utcb request */
memset(&exregs, 0, sizeof(exregs));
exregs_set_utcb(&exregs, (unsigned long)utcb_address);
if ((err = l4_exchange_registers(&exregs, ids.tid)) < 0)
return err;
return 0;
}
void main(void)
{
int err;
/* Read all capabilities */
cap_read_all();
/* Scan for timer devices in capabilities */
timer_probe_devices();
/* Initialize virtual address pool for timers */
init_vaddr_pool();
/* Map and initialize timer devices */
timer_setup_devices();
/* Setup own utcb */
if ((err = l4_utcb_setup(&utcb)) < 0) {
printf("FATAL: Could not set up own utcb. "
"err=%d\n", err);
BUG();
}
/* Listen for timer requests */
while (1)
handle_requests();
}

0
conts/baremetal/baremetal5/src/test.c Normal file
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8
conts/libdev/SConscript
View File

@@ -21,12 +21,16 @@ variant = type
# Path for uart files
LIBDEV_UART_PATH = join(PROJROOT, 'conts/libdev/uart')
# Path for timer files
LIBDEV_TIEMR_PATH = join(PROJROOT, 'conts/libdev/timer/sp804')
e = env.Clone()
e.Append(CPPPATH = [LIBDEV_UART_PATH + '/include'],
e.Append(CPPPATH = [LIBDEV_UART_PATH + '/include', LIBDEV_TIEMR_PATH + '/include'],
CCFLAGS = ['-nostdinc', '-DVARIANT_' + variant.upper(),
'-DPLATFORM_' + platform.upper()])
source = Glob('uart/src' + '/*.c')
source = Glob('uart/src' + '/*.c') + \
Glob('timer/sp804/src' + '/*.c')
objects = e.StaticObject(source)
library = e.StaticLibrary('libdev-' + variant, objects)

71
conts/libdev/timer/sp804/include/sp804_timer.h Normal file
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@@ -0,0 +1,71 @@
/*
* SP804 Primecell Timer offsets
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __SP804_TIMER_H__
#define __SP804_TIMER_H__
#define SP804_TIMER2_OFFSET 0x20
/* Base address of Timers for differen platforms */
#if defined(PLATFORM_PB926)
#define TIMER0_PHYS_BASE 0x101E2000
#define TIMER1_PHYS_BASE (TIMER0_PHYS_BASE + SP804_TIMER2_OFFSET)
#define TIMER2_PHYS_BASE 0x101E3000
#define TIMER3_PHYS_BASE (TIMER2_PHYS_BASE + SP804_TIMER2_OFFSET)
#elif defined(PLATFORM_EB)
#define TIMER0_PHYS_BASE 0x10011000
#define TIMER1_PHYS_BASE (TIMER0_PHYS_BASE + SP804_TIMER2_OFFSET)
#define TIMER2_PHYS_BASE 0x10012000
#define TIMER3_PHYS_BASE (TIMER2_PHYS_BASE + SP804_TIMER2_OFFSET)
#elif defined(PLATFORM_PB11MPCORE)
#define TIMER0_PHYS_BASE 0x10011000
#define TIMER1_PHYS_BASE (TIMER0_PHYS_BASE + SP804_TIMER2_OFFSET)
#define TIMER2_PHYS_BASE 0x10012000
#define TIMER3_PHYS_BASE (TIMER2_PHYS_BASE + SP804_TIMER2_OFFSET)
#define TIMER4_PHYS_BASE 0x10018000
#define TIMER5_PHYS_BASE (TIMER4_PHYS_BASE + SP804_TIMER2_OFFSET)
#define TIMER6_PHYS_BASE 0x10019000
#define TIMER7_PHYS_BASE (TIMER6_PHYS_BASE + SP804_TIMER2_OFFSET)
#endif
/* Run mode of timers */
#define SP804_TIMER_RUNMODE_FREERUN 0
#define SP804_TIMER_RUNMODE_PERIODIC 1
/* Wrap mode of timers */
#define SP804_TIMER_WRAPMODE_WRAPPING 0
#define SP804_TIMER_WRAPMODE_ONESHOT 1
/* Operational width of timer */
#define SP804_TIMER_WIDTH16BIT 0
#define SP804_TIMER_WIDTH32BIT 1
/* Enable/disable irq on timer */
#define SP804_TIMER_IRQDISABLE 0
#define SP804_TIMER_IRQENABLE 1
/* Register offsets */
#define SP804_TIMERLOAD 0x0
#define SP804_TIMERVALUE 0x4
#define SP804_TIMERCONTROL 0x8
#define SP804_TIMERINTCLR 0xC
#define SP804_TIMERRIS 0x10
#define SP804_TIMERMIS 0x14
#define SP804_TIMERBGLOAD 0x18
struct sp804_timer {
unsigned int base;
};
void sp804_init(unsigned int timer_base, int runmode, int wrapmode, \
int width, int irq_enable);
void sp804_irq_handler(unsigned int timer_base);
void sp804_enable(unsigned int timer_base, int enable);
void sp804_set_irq(unsigned int timer_base, int enable);
unsigned int sp804_read_value(unsigned int timer_base);
#endif /* __SP804_TIMER_H__ */

104
conts/libdev/timer/sp804/src/sp804_timer.c Normal file
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@@ -0,0 +1,104 @@
/*
* SP804 Primecell Timer driver
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <sp804_timer.h>
#define read(a) *((volatile unsigned int *)(a))
#define write(v, a) (*((volatile unsigned int *)(a)) = v)
#define setbit(bit, a) write(read(a) | bit, a)
#define clrbit(bit, a) write(read(a) & ~bit, a)
void sp804_irq_handler(unsigned int timer_base)
{
/*
* Timer enabled as Periodic/Wrapper only needs irq clearing
* as it automatically reloads and wraps
*/
write(1, (timer_base + SP804_TIMERINTCLR));
}
static inline void sp804_control(unsigned int timer_base, int bit, int setclr)
{
unsigned long addr = (timer_base + SP804_TIMERCONTROL);
setclr ? setbit(bit, addr) : clrbit(bit, addr);
}
/*
* Sets timer's run mode:
* @periodic: periodic mode = 1, free-running = 0.
*/
#define SP804_PEREN (1 << 6)
static inline void sp804_set_runmode(unsigned int timer_base, int periodic)
{
sp804_control(timer_base, SP804_PEREN, periodic);
}
/*
* Sets timer's wrapping mode:
* @oneshot: oneshot = 1, wrapping = 0.
*/
#define SP804_ONESHOT (1 << 0)
static inline void sp804_set_wrapmode(unsigned int timer_base, int oneshot)
{
sp804_control(timer_base, SP804_ONESHOT, oneshot);
}
/*
* Sets the operational width of timers.
* In 16bit mode, top halfword is ignored.
* @width: 32bit mode = 1; 16bit mode = 0
*/
#define SP804_32BIT (1 << 1)
static inline void sp804_set_widthmode(unsigned int timer_base, int width)
{
sp804_control(timer_base, SP804_32BIT, width);
}
/*
* Enable/disable timer:
* @enable: enable = 1, disable = 0;
*/
#define SP804_ENABLE (1 << 7)
void sp804_enable(unsigned int timer_base, int enable)
{
sp804_control(timer_base, SP804_ENABLE, enable);
}
/*
* Enable/disable local irq register:
* @enable: enable = 1, disable = 0
*/
#define SP804_IRQEN (1 << 5)
void sp804_set_irq(unsigned int timer_base, int enable)
{
sp804_control(timer_base, SP804_IRQEN, enable);
}
/* Loads timer with value in val */
static inline void sp804_load_value(unsigned int timer_base, unsigned int val)
{
write(val, (timer_base + SP804_TIMERLOAD));
}
/* Returns current timer value */
unsigned int sp804_read_value(unsigned int timer_base)
{
return read(timer_base + SP804_TIMERVALUE);
}
/* TODO: Define macro values for duration */
void sp804_init(unsigned int timer_base, int run_mode, int wrap_mode, \
int width, int irq_enable)
{
/* 1 tick per usec */
const int duration = 250;
sp804_set_runmode(timer_base, run_mode); /* Periodic */
sp804_set_wrapmode(timer_base, wrap_mode); /* Wrapping */
sp804_set_widthmode(timer_base, width); /* 32 bit */
sp804_set_irq(timer_base, irq_enable); /* Enable */
sp804_load_value(timer_base, duration);
}

4
conts/libdev/uart/include/pl011_uart.h
View File

@@ -26,8 +26,6 @@
#define PL011_BASE 0x10009000
#elif defined(PLATFORM_PB11MPCORE)
#define PL011_BASE 0x10009000
#elif defined(PLATFORM_PBA8)
#define PL011_BASE 0x10009000
#endif
#endif
@@ -62,7 +60,7 @@
#define PL011_OEIRQ (1 << 10)
struct pl011_uart {
unsigned int base;
unsigned long base;
unsigned int frame_errors;
unsigned int parity_errors;
unsigned int break_errors;

2
conts/libl4/SConscript
View File

@@ -54,8 +54,6 @@ def create_symlinks(arch):
print cmd
os.system(cmd)
# TODO: There are errors in this code that -Werror gives problems with.
#create_symlinks(arch)
objects = env.StaticObject(Glob('src/*.c') + Glob('src/' + arch + '/*.[cS]'))
library = env.StaticLibrary('l4', objects)

8
conts/libl4/SConstruct
View File

@@ -16,13 +16,17 @@ from config.configuration import *
config = configuration_retrieve()
arch = config.arch
LIBMEM_RELDIR = 'conts/libmem'
LIBMEM_DIR = join(PROJROOT, LIBMEM_RELDIR)
env = Environment(CC = config.user_toolchain + 'gcc',
CCFLAGS = ['-std=gnu99', '-g', '-nostdlib', '-ffreestanding'],
CCFLAGS = ['-std=gnu99', '-g', '-nostdlib', '-ffreestanding', '-Werror'],
LINKFLAGS = ['-nostdlib'],
ASFLAGS = ['-D__ASSEMBLY__'],
ENV = {'PATH' : os.environ['PATH']},
LIBS = 'gcc',
CPPPATH = ['#include', '#include/l4lib/arch', join(PROJROOT,'include')])
CPPPATH = ['#include', '#include/l4lib/arch', join(PROJROOT,'include'), \
LIBMEM_DIR])
# TODO: There are errors in this code that -Werror gives problems with.

2
conts/libl4/include/l4lib/addr.h
View File

@@ -20,7 +20,7 @@ int address_pool_init_with_idpool(struct address_pool *pool,
unsigned long start, unsigned long end);
int address_pool_init(struct address_pool *pool,
unsigned long start, unsigned long end,
int size);
unsigned int size);
void *address_new(struct address_pool *pool, int nitems, int size);
int address_del(struct address_pool *, void *addr, int nitems, int size);

4
conts/libl4/include/l4lib/ipcdefs.h
View File

@@ -72,4 +72,8 @@ extern l4id_t pagerid;
#define L4_IPC_TAG_UART_SENDBUF 53 /* Buffered send */
#define L4_IPC_TAG_UART_RECVBUF 54 /* Buffered recv */
/* For ipc to timer service (TODO: Shared mapping buffers???) */
#define L4_IPC_TAG_TIMER_GETTIME 55
#endif /* __IPCDEFS_H__ */

4
conts/libl4/src/addr.c
View File

@@ -24,9 +24,9 @@ int address_pool_init_with_idpool(struct address_pool *pool,
int address_pool_init(struct address_pool *pool,
unsigned long start, unsigned long end,
int size)
unsigned int size)
{
if ((pool->idpool = id_pool_new_init((end - start) / size)) < 0)
if ((pool->idpool = id_pool_new_init(__pfn(end - start) / size)) < 0)
return (int)pool->idpool;
pool->start = start;
pool->end = end;

2
conts/libl4/src/thread.c
View File

@@ -22,6 +22,8 @@ extern unsigned long lib_utcb_range_size;
/* Static variable definitions */
struct l4_mutex lib_mutex;
extern void global_add_task(struct l4lib_tcb *task);
/* Function definitions */
int l4_thread_create(struct task_ids *ids, unsigned int flags,
int (*func)(void *), void *arg)

25
conts/libmem/SConstruct
View File

@@ -2,23 +2,19 @@
# Copyright (C) 2007 Bahadir Balban
#
import os
import glob
import sys
import os, glob, sys
from os.path import join
from string import split
from configure import *
PROJRELROOT = '../..'
sys.path.append(PROJRELROOT)
from configure import *
config = configuration_retrieve()
project_root = "../.."
headers_root = join(project_root, "include/l4")
headers_root = join(PROJRELROOT, "include/l4")
config_h = join(headers_root, "config.h")
#libl4 paths
libl4_headers = join(project_root, "tasks/libl4/include")
libl4_libpath = join(project_root, "tasks/libl4")
mm = "mm"
kmalloc = "kmalloc"
memcache = "memcache"
@@ -29,19 +25,24 @@ kmalloc_dir = kmalloc
memcache_dir = memcache
tests_dir = tests
LIBL4_RELDIR = 'conts/libl4'
LIBL4_DIR = join(PROJROOT, LIBL4_RELDIR)
LIBL4_INCLUDE = join(LIBL4_DIR, 'include')
LIBL4_LIBPATH = join(BUILDDIR, LIBL4_RELDIR)
test_env = Environment(CC = 'gcc -m32',
CCFLAGS = ['-g', '-std=gnu99', '-Wall', '-Werror'],
ENV = {'PATH' : os.environ['PATH']},
LIBS = ['gcc', 'mm', 'km', 'mc'],
LIBPATH = ['#'],
CPPPATH = ['#include', join(project_root, "include"), "#", libl4_headers])
CPPPATH = ['#include', join(PROJRELROOT, "include"), "#", LIBL4_INCLUDE])
env = Environment(CC = config.user_toolchain + 'gcc',
CCFLAGS = ['-g', '-nostdlib', '-Wall', '-Werror', '-ffreestanding', '-std=gnu99'],
LINKFLAGS = ['-nostdlib'],
ENV = {'PATH' : os.environ['PATH']},
LIBS = 'gcc',
CPPPATH = [join(project_root, "include"), "#", libl4_headers])
CPPPATH = [join(PROJRELROOT, "include"), "#", LIBL4_INCLUDE])
if os.path.exists(config_h) is False:
print "\nThis build requires a valid kernel configuration header."

2
include/l4/generic/cap-types.h
View File

@@ -58,7 +58,7 @@
(c)->attr |= CAP_DEVTYPE_MASK & devtype;}
#define cap_set_devnum(c, devnum) \
{(c)->attr &= ~CAP_DEVNUM_MASK; \
(c)->attr |= CAP_DEVNUM_MASK & devnum;}
(c)->attr |= CAP_DEVNUM_MASK & (devnum << CAP_DEVNUM_SHIFT);}
#define cap_devnum(c) \
(((c)->attr & CAP_DEVNUM_MASK) >> CAP_DEVNUM_SHIFT)
#define cap_devtype(c) ((c)->attr & CAP_DEVTYPE_MASK)

27
include/l4/platform/ab926/irq.h
View File

@@ -1,27 +0,0 @@
#ifndef __PLATFORM_IRQ_H__
#define __PLATFORM_IRQ_H__
#define IRQ_CHIPS_MAX 2
#define IRQS_MAX 64
/* IRQ indices. */
#define IRQ_TIMER01 4
#define IRQ_TIMER23 5
#define IRQ_RTC 10
#define IRQ_UART0 12
#define IRQ_UART1 13
#define IRQ_UART2 14
#define IRQ_SIC 31
/* Cascading definitions */
#define PIC_IRQS_MAX 31 /* Total irqs on PIC */
/* The local irq line of the dummy peripheral on this chip */
#define LOCALIRQ_DUMMY 15
/* The irq index offset of this chip, is the maximum of previous chip + 1 */
#define SIRQ_CHIP_OFFSET (PIC_IRQS_MAX + 1)
/* The global irq number of dummy is the local irq line + it's chip offset */
#define IRQ_DUMMY (LOCALIRQ_DUMMY + SIRQ_CHIP_OFFSET)
#endif /* __PLATFORM_IRQ_H__ */

60
include/l4/platform/ab926/offsets.h
View File

@@ -1,60 +0,0 @@
/*
* Describes physical memory layout of pb926 platform.
*
* Copyright (C) 2007 Bahadir Balban
*/
#ifndef __PLATFORM_PB926_OFFSETS_H__
#define __PLATFORM_PB926_OFFSETS_H__
/* Physical memory base */
#define PHYS_MEM_START 0x00000000 /* inclusive */
#define PHYS_MEM_END 0x08000000 /* 128 MB, exclusive */
/*
* These bases taken from where kernel is `physically' linked at,
* also used to calculate virtual-to-physical translation offset.
* See the linker script for their sources. PHYS_ADDR_BASE can't
* use a linker variable because it's referred from assembler.
*/
#define PHYS_ADDR_BASE 0x100000
/* Device memory base */
#define PB926_DEV_PHYS 0x10000000
/* Device offsets in physical memory */
#define PB926_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PB926_SYSCTRL_BASE 0x101E0000 /* System controller */
#define PB926_WATCHDOG_BASE 0x101E1000 /* Watchdog */
#define PB926_TIMER01_BASE 0x101E2000 /* Timers 0 and 1 */
#define PB926_TIMER23_BASE 0x101E3000 /* Timers 2 and 3 */
#define PB926_RTC_BASE 0x101E8000 /* Real Time Clock */
#define PB926_VIC_BASE 0x10140000 /* Primary Vectored IC */
#define PB926_SIC_BASE 0x10003000 /* Secondary IC */
#define PB926_UART0_BASE 0x101F1000 /* Console port (UART0) */
/*
* Uart virtual address until a file-based console access
* is available for userspace
*/
#define USERSPACE_UART_BASE 0x500000
/*
* Device offsets in virtual memory. They offset to some virtual
* device base address. Each page on this virtual base is consecutively
* allocated to devices. Nice and smooth.
*/
#define PB926_TIMER01_VOFFSET 0x00000000
#define PB926_UART0_VOFFSET 0x00001000
#define PB926_VIC_VOFFSET 0x00002000
#define PB926_SIC_VOFFSET 0x00003000
#define PB926_SYSREGS_VOFFSET 0x00005000
#define PB926_SYSCTRL_VOFFSET 0x00006000
#define PB926_UART0_VBASE (IO_AREA0_VADDR + PB926_UART0_VOFFSET)
#define PB926_TIMER01_VBASE (IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
#define PB926_SYSCTRL_VBASE (IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
#define PB926_VIC_VBASE (IO_AREA0_VADDR + PB926_VIC_VOFFSET)
#define PB926_SIC_VBASE (IO_AREA0_VADDR + PB926_SIC_VOFFSET)
#endif /* __PLATFORM_PB926_OFFSETS_H__ */

22
include/l4/platform/ab926/platform.h
View File

@@ -1,22 +0,0 @@
#ifndef __PLATFORM_PB926_PLATFORM_H__
#define __PLATFORM_PB926_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
*
* Copyright (C) Bahadir Balban 2007
*/
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PB926_UART0_VBASE
#define PLATFORM_TIMER_BASE PB926_TIMER01_VBASE
#define PLATFORM_SP810_BASE PB926_SYSCTRL_VBASE
#define PLATFORM_IRQCTRL_BASE PB926_VIC_VBASE
#define PLATFORM_SIRQCTRL_BASE PB926_SIC_VBASE
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PB926_PLATFORM_H__ */

15
include/l4/platform/ab926/printascii.h
View File

@@ -1,15 +0,0 @@
#ifndef __PLATFORM__PB926__PRINTASCII__H__
#define __PLATFORM__PB926__PRINTASCII__H__
#define dprintk(str, val) \
{ \
printascii(str); \
printascii("0x"); \
printhex8((val)); \
printascii("\n"); \
}
void printascii(char *str);
void printhex8(unsigned int);
#endif /* __PLATFORM__PB926__PRINTASCII__H__ */

20
include/l4/platform/ab926/uart.h
View File

@@ -1,20 +0,0 @@
/*
* Platform specific ties to generic uart functions that putc expects.
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __PLATFORM_PB926_UART_H__
#define __PLATFORM_PB926_UART_H__
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PB926_UART0_VBASE
#include <l4/drivers/uart/pl011/pl011_uart.h>
void uart_init(void);
void uart_putc(char c);
#endif /* __PLATFORM_PB926_UART_H__ */

18
include/l4/platform/pb926/platform.h
View File

@@ -13,14 +13,14 @@
#include <l4/generic/cap-types.h>
#include <l4/generic/resource.h>
#define PLATFORM_CONSOLE0_BASE PB926_UART0_VBASE
#define PLATFORM_CONSOLE0_BASE PB926_UART0_VBASE
/* SP804 timer has TIMER1 at TIMER0 + 0x20 address */
#define PLATFORM_TIMER0_BASE PB926_TIMER01_VBASE
#define PLATFORM_TIMER0_BASE PB926_TIMER01_VBASE
#define PLATFORM_SP810_BASE PB926_SYSCTRL_VBASE
#define PLATFORM_IRQCTRL_BASE PB926_VIC_VBASE
#define PLATFORM_SIRQCTRL_BASE PB926_SIC_VBASE
#define PLATFORM_IRQCTRL_BASE PB926_VIC_VBASE
#define PLATFORM_SIRQCTRL_BASE PB926_SIC_VBASE
/* Total number of timers present in this platform */
#define TOTAL_TIMERS 4
@@ -30,6 +30,16 @@
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
/* Wrapping Plaform specific Physical Device Addresses */
#define PLATFORM_CONSOLE0_PHY_BASE PB926_UART0_BASE
#define PLATFORM_CONSOLE1_PHY_BASE PB926_UART1_BASE
#define PLATFORM_CONSOLE2_PHY_BASE PB926_UART2_BASE
#define PLATFORM_CONSOLE3_PHY_BASE PB926_UART3_BASE
#define PLATFORM_TIMER0_PHY_BASE PB926_TIMER01_BASE
#define PLATFORM_TIMER1_PHY_BASE PB926_TIMER23_BASE
int platform_setup_device_caps(struct kernel_resources *kres);
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);

25
include/l4/platform/pba8/irq.h
View File

@@ -1,25 +0,0 @@
#ifndef __PLATFORM_IRQ_H__
#define __PLATFORM_IRQ_H__
/* TODO: Not sure about this, need to check */
#define IRQ_CHIPS_MAX 4
#define IRQS_MAX 96
/*
* IRQ indices, 32-63 and 72-89 index
* available for external sources
* 0-32: used for SI, provided by
* distributed interrupt controller
*/
#define IRQ_TIMER01 36
#define IRQ_TIMER23 37
#define IRQ_TIMER45 73
#define IRQ_TIMER67 74
#define IRQ_RTC 42
#define IRQ_UART0 44
#define IRQ_UART1 45
#define IRQ_UART2 46
#define IRQ_UART3 47
#endif /* __PLATFORM_IRQ_H__ */

77
include/l4/platform/pba8/offsets.h
View File

@@ -1,77 +0,0 @@
/*
* Describes physical memory layout of pb926 platform.
*
* Copyright (C) 2007 Bahadir Balban
*/
#ifndef __PLATFORM_PBA8_OFFSETS_H__
#define __PLATFORM_PBA8_OFFSETS_H__
/* Physical memory base */
#define PHYS_MEM_START 0x00000000 /* inclusive */
#define PHYS_MEM_END 0x10000000 /* 256 MB, exclusive */
/*
* These bases taken from where kernel is `physically' linked at,
* also used to calculate virtual-to-physical translation offset.
* See the linker script for their sources. PHYS_ADDR_BASE can't
* use a linker variable because it's referred from assembler.
*/
#define PHYS_ADDR_BASE 0x100000
/* Device memory base */
#define PBA8_DEV_PHYS 0x10000000
/* Device offsets in physical memory */
#define PBA8_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PBA8_SYSCTRL0_BASE 0x10001000 /* System controller 0 */
#define PBA8_UART0_BASE 0x10009000 /* UART 0 */
#define PBA8_UART1_BASE 0x1000A000 /* UART 1 */
#define PBA8_UART2_BASE 0x1000B000 /* UART 2 */
#define PBA8_UART3_BASE 0x1000C000 /* UART 3 */
#define PBA8_WATCHDOG0_BASE 0x1000F000 /* WATCHDOG 0 */
#define PBA8_WATCHDOG1_BASE 0x10010000 /* WATCHDOG 1 */
#define PBA8_TIMER01_BASE 0x10011000 /* TIMER 0-1 */
#define PBA8_TIMER23_BASE 0x10012000 /* TIMER 2-3 */
#define PBA8_RTC_BASE 0x10017000 /* RTC interface */
#define PBA8_TIMER45_BASE 0x10018000 /* TIMER 4-5 */
#define PBA8_TIMER67_BASE 0x10019000 /* TIMER 6-7 */
#define PBA8_SYSCTRL1_BASE 0x1001A000 /* System controller 1 */
#define PBA8_GIC0_BASE 0x1E000000 /* GIC 0 */
#define PBA8_GIC1_BASE 0x1E010000 /* GIC 1 */
#define PBA8_GIC2_BASE 0x1E020000 /* GIC 2 */
#define PBA8_GIC3_BASE 0x1E030000 /* GIC 3 */
/*
* Uart virtual address until a file-based console access
* is available for userspace
*/
#define USERSPACE_UART_BASE 0x500000
/*
* Device offsets in virtual memory. They offset to some virtual
* device base address. Each page on this virtual base is consecutively
* allocated to devices. Nice and smooth.
*/
#define PBA8_SYSREGS_VOFFSET 0x00000000
#define PBA8_SYSCTRL0_VOFFSET 0x00001000
#define PBA8_SYSCTRL1_VOFFSET 0x00002000
#define PBA8_UART0_VOFFSET 0x00003000
#define PBA8_TIMER01_VOFFSET 0x00004000
#define PBA8_GIC0_VOFFSET 0x00005000
#define PBA8_GIC1_VOFFSET 0x00006000
#define PBA8_GIC2_VOFFSET 0x00007000
#define PBA8_GIC3_VOFFSET 0x00008000
#define PBA8_SYSREGS_VBASE (IO_AREA0_VADDR + PBA8_SYSREGS_VOFFSET)
#define PBA8_SYSCTRL0_VBASE (IO_AREA0_VADDR + PBA8_SYSCTRL0_VOFFSET)
#define PBA8_SYSCTRL1_VBASE (IO_AREA0_VADDR + PBA8_SYSCTRL1_VOFFSET)
#define PBA8_UART0_VBASE (IO_AREA0_VADDR + PBA8_UART0_VOFFSET)
#define PBA8_TIMER01_VBASE (IO_AREA0_VADDR + PBA8_TIMER01_VOFFSET)
#define PBA8_GIC0_VBASE (IO_AREA0_VADDR + PBA8_GIC0_VOFFSET)
#define PBA8_GIC1_VBASE (IO_AREA0_VADDR + PBA8_GIC1_VOFFSET)
#define PBA8_GIC2_VBASE (IO_AREA0_VADDR + PBA8_GIC2_VOFFSET)
#define PBA8_GIC3_VBASE (IO_AREA0_VADDR + PBA8_GIC3_VOFFSET)
#endif /* __PLATFORM_PBA8_OFFSETS_H__ */

32
include/l4/platform/pba8/platform.h
View File

@@ -1,32 +0,0 @@
#ifndef __PBA8_PLATFORM_H__
#define __PBA8_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
*
* Copyright (C) Bahadir Balban 2007
*/
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE0_BASE PBA8_UART0_VBASE
#define PLATFORM_TIMER0_BASE PBA8_TIMER01_VBASE
#define PLATFORM_SP810_BASE PBA8_SYSCTRL0_VBASE
/* Total number of timers present in this platform */
#define TOTAL_TIMERS 8
#define PLATFORM_TIMER0 0
#define PLATFORM_TIMER1 1
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
#define PLATFORM_TIMER4 4
#define PLATFORM_TIMER5 5
#define PLATFORM_TIMER6 6
#define PLATFORM_TIMER7 7
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PBA8_PLATFORM_H__ */

15
include/l4/platform/pba8/printascii.h
View File

@@ -1,15 +0,0 @@
#ifndef __PLATFORM__PBA8__PRINTASCII__H__
#define __PLATFORM__PBA8__PRINTASCII__H__
#define dprintk(str, val) \
{ \
printascii(str); \
printascii("0x"); \
printhex8((val)); \
printascii("\n"); \
}
void printascii(char *str);
void printhex8(unsigned int);
#endif /* __PLATFORM__PBA8__PRINTASCII__H__ */

20
include/l4/platform/pba8/uart.h
View File

@@ -1,20 +0,0 @@
/*
* Platform specific ties to generic uart functions that putc expects.
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __PLATFORM_PBA8_UART_H__
#define __PLATFORM_PBA8_UART_H__
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PBA8_UART0_VBASE
#include <l4/drivers/uart/pl011/pl011_uart.h>
void uart_init(void);
void uart_putc(char c);
#endif /* __PLATFORM_PB926_UART_H__ */

1
scripts/baremetal/files/linker.lds.in
View File

@@ -26,4 +26,5 @@ SECTIONS
. = ALIGN(8);
__stack = .;
}
__end = .;
}

1
scripts/kernel/generate_kernel_cinfo.py
View File

@@ -29,6 +29,7 @@ cinfo_file_start = \
#include <l4/generic/resource.h>
#include <l4/generic/capability.h>
#include <l4/generic/cap-types.h>
#include INC_PLAT(platform.h)
%s

40
scripts/linux/build_linux.py
View File

@@ -43,9 +43,7 @@ class LinuxUpdateKernel:
self.cpuid_list = (['ARM926', '0x41069265'],)
# List of ARCHIDs, to be used by linux based on codezero config
self.archid_list = (['PB926', '0x183'],
['AB926', '0x25E'],
['PB1176', '0x5E0'],
['PBA8', '0x769'],
['EB', '0x33B'],
['PB11MPCORE', '0x3D4'],)
@@ -165,21 +163,11 @@ class LinuxBuilder:
self.LINUX_KERNEL_BUILDDIR = \
source_to_builddir(LINUX_KERNELDIR, container.id)
self.linux_lds_in = join(self.LINUX_KERNELDIR, "linux.lds.in")
self.linux_lds_out = join(self.LINUX_KERNEL_BUILDDIR, "linux.lds")
self.linux_S_in = join(self.LINUX_KERNELDIR, "linux.S.in")
self.linux_S_out = join(self.LINUX_KERNEL_BUILDDIR, "linux.S")
self.linux_h_in = join(self.LINUX_KERNELDIR, "linux.h.in")
self.linux_h_out = join(self.LINUX_KERNEL_BUILDDIR, "linux.h")
self.linux_elf_out = join(self.LINUX_KERNEL_BUILDDIR, "linux.elf")
self.container = container
self.kernel_binary_image = \
join(os.path.relpath(self.LINUX_KERNEL_BUILDDIR, LINUX_KERNELDIR), \
"arch/arm/boot/Image")
self.kernel_image = None
"vmlinux")
self.kernel_image = join(self.LINUX_KERNEL_BUILDDIR, "linux.elf")
self.kernel_updater = LinuxUpdateKernel(self.container)
def build_linux(self, config):
@@ -197,24 +185,14 @@ class LinuxBuilder:
"CROSS_COMPILE=" + config.user_toolchain + " O=" + \
self.LINUX_KERNEL_BUILDDIR)
with open(self.linux_h_out, 'w+') as output:
with open(self.linux_h_in, 'r') as input:
output.write(input.read() % {'cn' : self.container.id})
with open(self.linux_S_in, 'r') as input:
with open(self.linux_S_out, 'w+') as output:
content = input.read() % self.kernel_binary_image
output.write(content)
os.system(config.user_toolchain + "cpp -I%s -P %s > %s" % \
(self.LINUX_KERNEL_BUILDDIR, self.linux_lds_in, \
self.linux_lds_out))
os.system(config.user_toolchain + "gcc -nostdlib -o %s -T%s %s" % \
(self.linux_elf_out, self.linux_lds_out, self.linux_S_out))
# Get the kernel image path
self.kernel_image = self.linux_elf_out
# Generate kernel_image, elf to be used by codezero
linux_elf_gen_cmd = ("arm-none-linux-gnueabi-objcopy -R .note \
-R .note.gnu.build-id -R .comment -S --change-addresses " + \
str(conv_hex(-self.container.linux_page_offset + self.container.linux_phys_offset)) + \
" " + self.kernel_binary_image + " " + self.kernel_image)
#print cmd
os.system(linux_elf_gen_cmd)
print 'Done...'
def clean(self):

2
src/generic/capability.c
View File

@@ -15,7 +15,7 @@
#include <l4/api/thread.h>
#include <l4/api/exregs.h>
#include <l4/api/ipc.h>
#include <l4/api/irq.h>
//#include <l4/api/irq.h>
#include INC_GLUE(message.h)
#include INC_GLUE(ipc.h)

6
src/generic/resource.c
View File

@@ -335,8 +335,8 @@ int memcap_request_device(struct cap_list *cap_list,
list_foreach_removable_struct(cap, n, &cap_list->caps, list) {
if (cap->start == devcap->start &&
cap->end == devcap->end &&
cap_is_devmem(cap)) {
cap->end == devcap->end &&
cap_is_devmem(cap)) {
/* Unlink only. This is boot memory */
list_remove(&cap->list);
return 0;
@@ -350,7 +350,6 @@ int memcap_request_device(struct cap_list *cap_list,
__pfn_to_addr(devcap->end), devcap->attr);
BUG();
}
/*
* TODO: Evaluate if access bits are needed and add new cap ranges
* only if their access bits match.
@@ -509,6 +508,7 @@ int copy_pager_info(struct pager *pager, struct pager_info *pinfo)
cap->start = cap_info->start;
cap->end = cap_info->end;
cap->size = cap_info->size;
cap->attr = cap_info->attr;
cap_list_insert(cap, &pager->cap_list);
}

10
src/platform/ab926/SConscript
View File

@@ -1,10 +0,0 @@
# Inherit global environment
Import('env')
# The set of source files associated with this SConscript file.
src_local = ['printascii.S','platform.c', 'uart.c', 'timer.c', 'irq.c']
obj = env.Object(src_local)
Return('obj')

57
src/platform/ab926/irq.c
View File

@@ -1,57 +0,0 @@
/*
* Support for generic irq handling using platform irq controller (PL190)
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include <l4/generic/irq.h>
#include <l4/generic/time.h>
#include INC_PLAT(irq.h)
#include INC_PLAT(platform.h)
#include INC_ARCH(exception.h)
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
.level = 0,
.cascade = IRQ_SIC,
.offset = 0,
.ops = {
.init = pl190_vic_init,
.read_irq = pl190_read_irq,
.ack_and_mask = pl190_mask_irq,
.unmask = pl190_unmask_irq,
},
},
[1] = {
.name = "Secondary irq controller",
.level = 1,
.cascade = IRQ_NIL,
.offset = SIRQ_CHIP_OFFSET,
.ops = {
.init = pl190_sic_init,
.read_irq = pl190_sic_read_irq,
.ack_and_mask = pl190_sic_mask_irq,
.unmask = pl190_sic_unmask_irq,
},
},
};
static int platform_timer_handler(void)
{
sp804_irq_handler();
return do_timer_irq();
}
/* Built-in irq handlers initialised at compile time.
* Else register with register_irq() */
struct irq_desc irq_desc_array[IRQS_MAX] = {
[IRQ_TIMER01] = {
.name = "Timer01",
.chip = &irq_chip_array[0],
.handler = platform_timer_handler,
},
};

62
src/platform/ab926/platform.c
View File

@@ -1,62 +0,0 @@
/*
* PB926 platform-specific initialisation and setup
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include <l4/generic/space.h>
#include <l4/generic/irq.h>
#include INC_ARCH(linker.h)
#include INC_PLAT(printascii.h)
#include INC_SUBARCH(mm.h)
#include INC_SUBARCH(mmu_ops.h)
#include INC_GLUE(memory.h)
#include INC_GLUE(memlayout.h)
#include INC_PLAT(offsets.h)
#include INC_PLAT(platform.h)
#include INC_PLAT(uart.h)
#include INC_PLAT(irq.h)
#include INC_ARCH(asm.h)
void init_platform_console(void)
{
add_boot_mapping(PB926_UART0_BASE, PL011_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/*
* Map same UART IO area to userspace so that primitive uart-based
* userspace printf can work. Note, this raw mapping is to be
* removed in the future, when file-based io is implemented.
*/
add_boot_mapping(PB926_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
MAP_USR_IO_FLAGS);
uart_init();
}
void init_platform_timer(void)
{
add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}
void init_platform_irq_controller()
{
add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
irq_controllers_init();
}
void platform_init(void)
{
init_platform_console();
init_platform_timer();
init_platform_irq_controller();
}

110
src/platform/ab926/printascii.S
View File

@@ -1,110 +0,0 @@
/*
* Basic UART printing.
*/
#include INC_ARCH(asm.h)
#include INC_GLUE(memlayout.h)
#define UART_DATA_OFFSET 0x0
.macro uart_address rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x10000000
orreq \rx, \rx, #0x001F0000
orreq \rx, \rx, #0x00001000
/* FIXME: This offset is incorrect */
movne \rx, #0xf9000000 @#IO_AREA0_VADDR
addne \rx, \rx, #PB926_UART0_VOFFSET @ UART0 page offset from
@ virtual io area base.
.endm
.macro uart_send, ry, rx
strb \ry, [\rx, #UART_DATA_OFFSET]
.endm
.macro uart_wait, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 5
bne 501b
.endm
.macro uart_busy, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 3
bne 501b
.endm
.text
/*
* Useful debugging routines
*/
BEGIN_PROC(printhex8)
mov r1, #8
b printhex
BEGIN_PROC(printhex4)
mov r1, #4
b printhex
BEGIN_PROC(printhex2)
mov r1, #2
printhex: adr r2, hexbuf
@printhex: ldr r2, =hexbuf
add r3, r2, r1
mov r1, #0
strb r1, [r3]
1: and r1, r0, #15
mov r0, r0, lsr #4
cmp r1, #10
addlt r1, r1, #'0'
addge r1, r1, #'a' - 10
strb r1, [r3, #-1]!
teq r3, r2
bne 1b
mov r0, r2
b printascii
.ltorg
.align
@ vmem-linked image has strings in vmem addresses. This replaces
@ the reference with corresponding physical address. Note this
@ won't work if memory offsets aren't clear cut values for
@ orr'ing and bic'ing. rm = mmu bits rs = string address.
.macro get_straddr rs, rm
mrc p15, 0, \rm, c1, c0 @ Get MMU bits.
tst \rm, #1 @ MMU enabled?
@subeq \rs, \rs, #KERNEL_AREA_START
biceq \rs, \rs, #KERNEL_AREA_START @ Clear Virtual mem offset.
@orreq \rs, \rs, #PHYS_ADDR_BASE @ Add Phy mem offset.
.endm
BEGIN_PROC(printascii)
get_straddr r0, r1
uart_address r3
b 2f
1: uart_wait r2, r3
uart_send r1, r3
uart_busy r2, r3
teq r1, #'\n'
moveq r1, #'\r'
beq 1b
2: teq r0, #0
ldrneb r1, [r0], #1
teqne r1, #0
bne 1b
mov pc, lr
END_PROC(printascii)
BEGIN_PROC(printch)
uart_address r3
mov r1, r0
mov r0, #0
b 1b
hexbuf: .space 16

28
src/platform/ab926/timer.c
View File

@@ -1,28 +0,0 @@
/*
* Ties up platform timer with generic timer api
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#include <l4/generic/irq.h>
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/timer/sp804/sp804_timer.h>
#include <l4/drivers/misc/sp810/sp810_sysctrl.h>
void timer_init(void)
{
/* Set timer 0 to 1MHz */
sp810_set_timclk(0, 1);
/* Initialise timer */
sp804_init();
}
void timer_start(void)
{
irq_enable(IRQ_TIMER01);
sp804_set_irq(0, 1); /* Enable timer0 irq */
sp804_enable(0, 1); /* Enable timer0 */
}

28
src/platform/ab926/uart.c
View File

@@ -1,28 +0,0 @@
/*
* Ties up platform's uart driver functions with generic API
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/uart/pl011/pl011_uart.h>
extern struct pl011_uart uart;
void uart_init()
{
uart.base = PL011_BASE;
uart.ops.initialise(&uart);
}
/* Generic uart function that lib/putchar.c expects to see implemented */
void uart_putc(char c)
{
int res;
/* Platform specific uart implementation */
do {
res = uart.ops.tx_char(c);
} while (res < 0);
}

2
src/platform/pb926/platform.c
View File

@@ -26,7 +26,7 @@
*/
int platform_setup_device_caps(struct kernel_resources *kres)
{
struct capability *uart[4], *timer[2];
struct capability *uart[4], *timer[4];
/* Setup capabilities for userspace uarts and timers */
uart[1] = alloc_bootmem(sizeof(*uart[1]), 0);

10
src/platform/pba8/SConscript
View File

@@ -1,10 +0,0 @@
# Inherit global environment
Import('env')
# The set of source files associated with this SConscript file.
src_local = ['printascii.S','platform.c', 'uart.c', 'timer.c', 'irq.c']
obj = env.Object(src_local)
Return('obj')

61
src/platform/pba8/irq.c
View File

@@ -1,61 +0,0 @@
/*
* Support for generic irq handling using platform irq controller (PL190)
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include <l4/generic/irq.h>
#include <l4/generic/time.h>
#include INC_PLAT(irq.h)
#include INC_PLAT(platform.h)
#include INC_ARCH(exception.h)
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
.level = 0,
.cascade = IRQ_SIC,
.offset = 0,
.ops = {
.init = pl190_vic_init,
.read_irq = pl190_read_irq,
.ack_and_mask = pl190_mask_irq,
.unmask = pl190_unmask_irq,
},
},
[1] = {
.name = "Secondary irq controller",
.level = 1,
.cascade = IRQ_NIL,
.offset = SIRQ_CHIP_OFFSET,
.ops = {
.init = pl190_sic_init,
.read_irq = pl190_sic_read_irq,
.ack_and_mask = pl190_sic_mask_irq,
.unmask = pl190_sic_unmask_irq,
},
},
};
#endif
static int platform_timer_handler(void)
{
sp804_irq_handler(PLATFORM_TIMER0_BASE);
return do_timer_irq();
}
/* Built-in irq handlers initialised at compile time.
* Else register with register_irq() */
struct irq_desc irq_desc_array[IRQS_MAX] = {
[IRQ_TIMER01] = {
.name = "Timer01",
.chip = &irq_chip_array[0],
.handler = platform_timer_handler,
},
};

67
src/platform/pba8/platform.c
View File

@@ -1,67 +0,0 @@
/*
* PBA8 platform-specific initialisation and setup
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include <l4/generic/space.h>
#include <l4/generic/irq.h>
#include INC_ARCH(linker.h)
#include INC_PLAT(printascii.h)
#include INC_SUBARCH(mm.h)
#include INC_SUBARCH(mmu_ops.h)
#include INC_GLUE(memory.h)
#include INC_GLUE(memlayout.h)
#include INC_PLAT(offsets.h)
#include INC_PLAT(platform.h)
#include INC_PLAT(uart.h)
#include INC_PLAT(irq.h)
#include INC_ARCH(asm.h)
void init_platform_console(void)
{
add_boot_mapping(PBA8_UART0_BASE, PLATFORM_CONSOLE0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/*
* Map same UART IO area to userspace so that primitive uart-based
* userspace printf can work. Note, this raw mapping is to be
* removed in the future, when file-based io is implemented.
*/
add_boot_mapping(PBA8_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
MAP_USR_IO_FLAGS);
uart_init();
}
void init_platform_timer(void)
{
add_boot_mapping(PBA8_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PBA8_SYSCTRL0_BASE, PBA8_SYSCTRL0_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/* TODO: May need mapping for SYSCTRL1 */
add_boot_mapping(PBA8_SYSCTRL1_BASE, PBA8_SYSCTRL1_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}
void init_platform_irq_controller()
{
#if 0
add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
irq_controllers_init();
#endif
}
void platform_init(void)
{
init_platform_console();
init_platform_timer();
init_platform_irq_controller();
}

121
src/platform/pba8/printascii.S
View File

@@ -1,121 +0,0 @@
/*
* Basic UART printing.
*/
#include INC_ARCH(asm.h)
#include INC_GLUE(memlayout.h)
#include INC_PLAT(offsets.h)
#include INC_SUBARCH(mm.h)
#define UART_DATA_OFFSET 0x0
#define UART0_PHYS_BASE PBA8_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)
#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF)
#define UART0_VIRT_BASE PBA8_UART0_VBASE
#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000)
#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000)
#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF)
.macro uart_address rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #UART0_PHYS_BYTE1
orreq \rx, #UART0_PHYS_BYTE2
orreq \rx, #UART0_PHYS_BYTE3_4
movne \rx, #UART0_VIRT_BYTE1
orrne \rx, #UART0_VIRT_BYTE2
orrne \rx, #UART0_VIRT_BYTE3_4
.endm
.macro uart_send, ry, rx
strb \ry, [\rx, #UART_DATA_OFFSET]
.endm
.macro uart_wait, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 5
bne 501b
.endm
.macro uart_busy, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 3
bne 501b
.endm
.text
/*
* Useful debugging routines
*/
BEGIN_PROC(printhex8)
mov r1, #8
b printhex
BEGIN_PROC(printhex4)
mov r1, #4
b printhex
BEGIN_PROC(printhex2)
mov r1, #2
printhex: adr r2, hexbuf
@printhex: ldr r2, =hexbuf
add r3, r2, r1
mov r1, #0
strb r1, [r3]
1: and r1, r0, #15
mov r0, r0, lsr #4
cmp r1, #10
addlt r1, r1, #'0'
addge r1, r1, #'a' - 10
strb r1, [r3, #-1]!
teq r3, r2
bne 1b
mov r0, r2
b printascii
.ltorg
.align
@ vmem-linked image has strings in vmem addresses. This replaces
@ the reference with corresponding physical address. Note this
@ won't work if memory offsets aren't clear cut values for
@ orr'ing and bic'ing. rm = mmu bits rs = string address.
.macro get_straddr rs, rm
mrc p15, 0, \rm, c1, c0 @ Get MMU bits.
tst \rm, #1 @ MMU enabled?
@subeq \rs, \rs, #KERNEL_AREA_START
biceq \rs, \rs, #KERNEL_AREA_START @ Clear Virtual mem offset.
@orreq \rs, \rs, #PHYS_ADDR_BASE @ Add Phy mem offset.
.endm
BEGIN_PROC(printascii)
get_straddr r0, r1
uart_address r3
b 2f
1: uart_wait r2, r3
uart_send r1, r3
uart_busy r2, r3
teq r1, #'\n'
moveq r1, #'\r'
beq 1b
2: teq r0, #0
ldrneb r1, [r0], #1
teqne r1, #0
bne 1b
mov pc, lr
END_PROC(printascii)
BEGIN_PROC(printch)
uart_address r3
mov r1, r0
mov r0, #0
b 1b
hexbuf: .space 16

30
src/platform/pba8/timer.c
View File

@@ -1,30 +0,0 @@
/*
* Ties up platform timer with generic timer api
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#include <l4/generic/irq.h>
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/timer/sp804/sp804_timer.h>
#include <l4/drivers/misc/sp810/sp810_sysctrl.h>
void timer_init(void)
{
/* Set timer 0 to 1MHz */
sp810_set_timclk(PLATFORM_TIMER0, 1);
/* Initialise timer */
sp804_init(PLATFORM_TIMER0_BASE, SP804_TIMER_RUNMODE_PERIODIC, \
SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
SP804_TIMER_IRQENABLE);
}
void timer_start(void)
{
irq_enable(IRQ_TIMER01);
sp804_enable(PLATFORM_TIMER0, 1); /* Enable timer0 */
}

29
src/platform/pba8/uart.c
View File

@@ -1,29 +0,0 @@
/*
* Ties up platform's uart driver functions with generic API
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/uart/pl011/pl011_uart.h>
extern struct pl011_uart uart;
void uart_init()
{
/* We are using UART0 for kernel */
uart.base = PLATFORM_CONSOLE0_BASE;
pl011_initialise_device(&uart);
}
/* Generic uart function that lib/putchar.c expects to see implemented */
void uart_putc(char c)
{
int res;
/* Platform specific uart implementation */
do {
res = pl011_tx_char(uart.base, c);
} while (res < 0);
}

22
tools/tagsgen/tagsgen_kernel
View File

@@ -1,22 +0,0 @@
rm -f cscope.*
rm -f tags
# Put all sources into a file list.
find ./src -name '*.cc' > tagfilelist
find ./src -name '*.c' >> tagfilelist
find ./src -name '*.h' >> tagfilelist
find ./src -name '*.s' >> tagfilelist
find ./src -name '*.S' >> tagfilelist
find ./src -name '*.lds' >> tagfilelist
find ./include -name '*.h' >> tagfilelist
find ./include -name '*.s' >> tagfilelist
find ./include -name '*.S' >> tagfilelist
find ./include -name '*.lds' >> tagfilelist
# Use file list to include in tags.
ctags --languages=C,Asm --recurse -Ltagfilelist
cscope -q -k -R -i tagfilelist
# Remove file list.
rm -f tagfilelist

54
tools/tagsgen/tagsgen_kernel.py Executable file
View File

@@ -0,0 +1,54 @@
#! /usr/bin/env python2.6
# -*- mode: python; coding: utf-8; -*-
import os, sys
PROJRELROOT = '../../'
sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), PROJRELROOT)))
from config.configuration import *
config = configuration_retrieve()
platform = config.platform
subarch = config.subarch
arch = config.arch
def main():
os.system("rm -f cscope.*")
os.system("rm -f tags")
# Type of files to be included
file_extn = ['*.cc', '*.c', '*.h', '*.s', '*.S', '*.lds']
# Kernel directories
src_dir_path = 'src'
include_dir_path = 'include/l4'
search_folder = \
['api', 'arch/'+ arch, 'arch/'+ arch + '/' + subarch, 'drivers', \
'generic', 'glue/' + arch, 'lib', 'platform/' + platform]
# Put all sources into a file list.
for extn in file_extn:
for dir in search_folder:
# Directory depth to be searched
if dir == 'drivers':
depth = 5
else:
depth = 1
os.system("find " + join(src_dir_path, dir) + \
" -maxdepth " + str(depth) + " -name '" + extn + "' >> tagfilelist")
os.system("find " + join(include_dir_path, dir) + \
" -maxdepth " + str(depth) + " -name '" + extn + "' >> tagfilelist")
# Use file list to include in tags.
os.system("ctags --languages=C,Asm --recurse -Ltagfilelist")
os.system("cscope -q -k -R -i tagfilelist")
# Remove file list.
os.system("rm -f tagfilelist")
if __name__ == "__main__":
main()