Changes to platform device handling, irqs, userspace device configuration

Revised irq handling and device address naming on internal devices.
This commit is contained in:
Bahadir Balban
2009-11-29 18:11:08 +02:00
parent fa660514df
commit 346d79c0cd
21 changed files with 267 additions and 157 deletions

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@@ -371,7 +371,7 @@ int is_kern_pgdi(int i)
(i == PGD_INDEX(USER_KIP_PAGE)) ||
(i == PGD_INDEX(ARM_HIGH_VECTOR)) ||
(i == PGD_INDEX(ARM_SYSCALL_VECTOR)) ||
(i == PGD_INDEX(USERSPACE_UART_BASE)))
(i == PGD_INDEX(USERSPACE_CONSOLE_VIRTUAL)))
return 1;
else
return 0;

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@@ -32,10 +32,11 @@
l4id_t pl190_read_irq(void)
{
l4id_t irq;
if ((irq =__clz(read(PL190_VIC_IRQSTATUS))))
return irq;
else
if ((irq = (31 - __clz(read(PL190_VIC_IRQSTATUS)))) < 0)
return IRQ_NIL;
else
return irq;
}
void pl190_mask_irq(l4id_t irq)
@@ -60,10 +61,10 @@ l4id_t pl190_sic_read_irq(void)
{
l4id_t irq;
if ((irq =__clz(read(PL190_SIC_STATUS))))
return irq;
else
if ((irq =(31 - __clz(read(PL190_SIC_STATUS)))) < 0)
return IRQ_NIL;
else
return irq;
}
void pl190_sic_mask_irq(l4id_t irq)

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@@ -233,7 +233,7 @@ int pl011_initialise_device(struct pl011_uart * uart)
/* Initialise data register for 8 bit data read/writes */
pl011_set_word_width(uart->base, 8);
/*
/*
* Fifos are disabled because by default it is assumed the port
* will be used as a user terminal, and in that case the typed
* characters will only show up when fifos are flushed, rather than

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@@ -34,7 +34,7 @@ unsigned int kernel_mapping_end;
/* Maps the early memory regions needed to bootstrap the system */
void init_kernel_mappings(void)
{
memset(&init_pgd, 0, sizeof(pgd_table_t));
memset((void *)virt_to_phys(&init_pgd), 0, sizeof(pgd_table_t));
/* Map kernel area to its virtual region */
add_section_mapping_init(align(virt_to_phys(_start_text),SZ_1MB),

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@@ -84,7 +84,7 @@ void copy_pgd_kern_all(pgd_table_t *to)
ARM_SYSCALL_VECTOR + PAGE_SIZE);
/* We temporarily map uart registers to every process */
copy_pgd_kern_by_vrange(to, from, USERSPACE_UART_BASE,
USERSPACE_UART_BASE + PAGE_SIZE);
copy_pgd_kern_by_vrange(to, from, USERSPACE_CONSOLE_VIRTUAL,
USERSPACE_CONSOLE_VIRTUAL + PAGE_SIZE);
}

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@@ -47,7 +47,7 @@ static int platform_timer_handler(struct irq_desc *desc)
* Microkernel is using just TIMER0,
* so we call handler with TIMER01 index
*/
sp804_irq_handler(PLATFORM_TIMER0_BASE);
sp804_irq_handler(PLATFORM_TIMER0_VIRTUAL);
return do_timer_irq();
}

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@@ -72,7 +72,7 @@ int platform_setup_device_caps(struct kernel_resources *kres)
/* We will use UART0 for kernel as well as user tasks, so map it to kernel and user space */
void init_platform_console(void)
{
add_boot_mapping(PB926_UART0_BASE, PLATFORM_CONSOLE0_BASE, PAGE_SIZE,
add_boot_mapping(PB926_UART0_BASE, PLATFORM_CONSOLE_VIRTUAL, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/*
@@ -80,7 +80,7 @@ void init_platform_console(void)
* userspace printf can work. Note, this raw mapping is to be
* removed in the future, when file-based io is implemented.
*/
add_boot_mapping(PB926_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
add_boot_mapping(PB926_UART0_BASE, USERSPACE_CONSOLE_VIRTUAL, PAGE_SIZE,
MAP_USR_IO_FLAGS);
uart_init();
@@ -93,10 +93,10 @@ void init_platform_console(void)
*/
void init_platform_timer(void)
{
add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER0_VIRTUAL, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
add_boot_mapping(PB926_SYSCTRL_BASE, PLATFORM_SYSCTRL_VIRTUAL, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
@@ -104,9 +104,9 @@ void init_platform_timer(void)
void init_platform_irq_controller()
{
add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL0_VIRTUAL, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
add_boot_mapping(PB926_SIC_BASE, PLATFORM_IRQCTRL1_VIRTUAL, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
irq_controllers_init();
}

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@@ -13,7 +13,7 @@
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)
#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF)
#define UART0_VIRT_BASE PB926_UART0_VBASE
#define UART0_VIRT_BASE PLATFORM_CONSOLE_VIRTUAL
#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000)
#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000)
#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF)

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@@ -17,7 +17,7 @@ void timer_init(void)
sp810_set_timclk(PLATFORM_TIMER0, 1);
/* Initialise timer */
sp804_init(PLATFORM_TIMER0_BASE, SP804_TIMER_RUNMODE_PERIODIC, \
sp804_init(PLATFORM_TIMER0_VIRTUAL, SP804_TIMER_RUNMODE_PERIODIC, \
SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
SP804_TIMER_IRQENABLE);
}
@@ -29,6 +29,6 @@ void timer_start(void)
irq_enable(IRQ_TIMER01);
/* Enable timer */
sp804_enable(PLATFORM_TIMER0_BASE, 1);
sp804_enable(PLATFORM_TIMER0_VIRTUAL, 1);
}

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@@ -13,7 +13,7 @@ extern struct pl011_uart uart;
void uart_init()
{
/* We are using UART0 for kernel */
uart.base = PLATFORM_CONSOLE0_BASE;
uart.base = PLATFORM_CONSOLE_VIRTUAL;
pl011_initialise_device(&uart);
}