mirror of
https://github.com/drasko/codezero.git
synced 2026-01-12 19:03:15 +01:00
Changes to platform device handling, irqs, userspace device configuration
Revised irq handling and device address naming on internal devices.
This commit is contained in:
@@ -371,7 +371,7 @@ int is_kern_pgdi(int i)
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(i == PGD_INDEX(USER_KIP_PAGE)) ||
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(i == PGD_INDEX(ARM_HIGH_VECTOR)) ||
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(i == PGD_INDEX(ARM_SYSCALL_VECTOR)) ||
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(i == PGD_INDEX(USERSPACE_UART_BASE)))
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(i == PGD_INDEX(USERSPACE_CONSOLE_VIRTUAL)))
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return 1;
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else
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return 0;
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@@ -32,10 +32,11 @@
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l4id_t pl190_read_irq(void)
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{
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l4id_t irq;
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if ((irq =__clz(read(PL190_VIC_IRQSTATUS))))
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return irq;
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else
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if ((irq = (31 - __clz(read(PL190_VIC_IRQSTATUS)))) < 0)
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return IRQ_NIL;
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else
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return irq;
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}
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void pl190_mask_irq(l4id_t irq)
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@@ -60,10 +61,10 @@ l4id_t pl190_sic_read_irq(void)
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{
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l4id_t irq;
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if ((irq =__clz(read(PL190_SIC_STATUS))))
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return irq;
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else
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if ((irq =(31 - __clz(read(PL190_SIC_STATUS)))) < 0)
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return IRQ_NIL;
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else
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return irq;
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}
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void pl190_sic_mask_irq(l4id_t irq)
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@@ -233,7 +233,7 @@ int pl011_initialise_device(struct pl011_uart * uart)
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/* Initialise data register for 8 bit data read/writes */
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pl011_set_word_width(uart->base, 8);
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/*
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/*
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* Fifos are disabled because by default it is assumed the port
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* will be used as a user terminal, and in that case the typed
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* characters will only show up when fifos are flushed, rather than
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@@ -34,7 +34,7 @@ unsigned int kernel_mapping_end;
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/* Maps the early memory regions needed to bootstrap the system */
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void init_kernel_mappings(void)
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{
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memset(&init_pgd, 0, sizeof(pgd_table_t));
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memset((void *)virt_to_phys(&init_pgd), 0, sizeof(pgd_table_t));
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/* Map kernel area to its virtual region */
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add_section_mapping_init(align(virt_to_phys(_start_text),SZ_1MB),
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@@ -84,7 +84,7 @@ void copy_pgd_kern_all(pgd_table_t *to)
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ARM_SYSCALL_VECTOR + PAGE_SIZE);
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/* We temporarily map uart registers to every process */
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copy_pgd_kern_by_vrange(to, from, USERSPACE_UART_BASE,
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USERSPACE_UART_BASE + PAGE_SIZE);
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copy_pgd_kern_by_vrange(to, from, USERSPACE_CONSOLE_VIRTUAL,
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USERSPACE_CONSOLE_VIRTUAL + PAGE_SIZE);
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}
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@@ -47,7 +47,7 @@ static int platform_timer_handler(struct irq_desc *desc)
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* Microkernel is using just TIMER0,
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* so we call handler with TIMER01 index
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*/
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sp804_irq_handler(PLATFORM_TIMER0_BASE);
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sp804_irq_handler(PLATFORM_TIMER0_VIRTUAL);
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return do_timer_irq();
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}
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@@ -72,7 +72,7 @@ int platform_setup_device_caps(struct kernel_resources *kres)
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/* We will use UART0 for kernel as well as user tasks, so map it to kernel and user space */
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void init_platform_console(void)
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{
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add_boot_mapping(PB926_UART0_BASE, PLATFORM_CONSOLE0_BASE, PAGE_SIZE,
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add_boot_mapping(PB926_UART0_BASE, PLATFORM_CONSOLE_VIRTUAL, PAGE_SIZE,
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MAP_IO_DEFAULT_FLAGS);
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/*
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@@ -80,7 +80,7 @@ void init_platform_console(void)
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* userspace printf can work. Note, this raw mapping is to be
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* removed in the future, when file-based io is implemented.
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*/
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add_boot_mapping(PB926_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
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add_boot_mapping(PB926_UART0_BASE, USERSPACE_CONSOLE_VIRTUAL, PAGE_SIZE,
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MAP_USR_IO_FLAGS);
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uart_init();
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@@ -93,10 +93,10 @@ void init_platform_console(void)
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*/
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void init_platform_timer(void)
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{
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add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
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add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER0_VIRTUAL, PAGE_SIZE,
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MAP_IO_DEFAULT_FLAGS);
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add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
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add_boot_mapping(PB926_SYSCTRL_BASE, PLATFORM_SYSCTRL_VIRTUAL, PAGE_SIZE,
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MAP_IO_DEFAULT_FLAGS);
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timer_init();
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@@ -104,9 +104,9 @@ void init_platform_timer(void)
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void init_platform_irq_controller()
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{
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add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
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add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL0_VIRTUAL, PAGE_SIZE,
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MAP_IO_DEFAULT_FLAGS);
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add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
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add_boot_mapping(PB926_SIC_BASE, PLATFORM_IRQCTRL1_VIRTUAL, PAGE_SIZE,
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MAP_IO_DEFAULT_FLAGS);
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irq_controllers_init();
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}
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@@ -13,7 +13,7 @@
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#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)
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#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF)
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#define UART0_VIRT_BASE PB926_UART0_VBASE
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#define UART0_VIRT_BASE PLATFORM_CONSOLE_VIRTUAL
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#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000)
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#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000)
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#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF)
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@@ -17,7 +17,7 @@ void timer_init(void)
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sp810_set_timclk(PLATFORM_TIMER0, 1);
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/* Initialise timer */
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sp804_init(PLATFORM_TIMER0_BASE, SP804_TIMER_RUNMODE_PERIODIC, \
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sp804_init(PLATFORM_TIMER0_VIRTUAL, SP804_TIMER_RUNMODE_PERIODIC, \
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SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
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SP804_TIMER_IRQENABLE);
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}
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@@ -29,6 +29,6 @@ void timer_start(void)
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irq_enable(IRQ_TIMER01);
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/* Enable timer */
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sp804_enable(PLATFORM_TIMER0_BASE, 1);
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sp804_enable(PLATFORM_TIMER0_VIRTUAL, 1);
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}
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@@ -13,7 +13,7 @@ extern struct pl011_uart uart;
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void uart_init()
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{
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/* We are using UART0 for kernel */
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uart.base = PLATFORM_CONSOLE0_BASE;
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uart.base = PLATFORM_CONSOLE_VIRTUAL;
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pl011_initialise_device(&uart);
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}
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