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Tested compilation of various platforms.

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This commit is contained in:
Amit Mahajan
2009-11-03 12:10:16 +05:30
parent 6e898151bc
commit 3be4cbc45c
3 changed files with 13 additions and 12 deletions
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5
config/cml/arm.ruleset
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@@ -125,8 +125,9 @@ unless ARCH_ARM suppress arm_menu
unless PLATFORM_EB suppress CPU_ARM1136
derive DRIVER_UART_PL011 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
derive DRIVER_TIMER_SP804 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
derive DRIVER_IRQ_PL190 from SUBARCH_V5
derive DRIVER_IRQ_GIC from SUBARCH_V6 or SUBARCH_V7
derive DRIVER_IRQ_PL190 from PLATFORM_PB926 or PLATFORM_AB926
derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_PBA8 or PLATFORM_EB
# Toolchains:
default TOOLCHAIN_KERNEL from 'arm-none-eabi-'

18
config/configuration.py
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@@ -51,11 +51,11 @@ class configuration:
def __init__(self):
# Mapping between platform selected and gcc flags for it
self.cpu_to_gcc_flag = (['PB926', 'arm926ej-s'],
['PBA8', 'cortex-a8'],
['PB11MPCORE', 'mpcore'],
['PB1136', 'arm1136jf-s'],
['PB1176', 'arm1176jz-s'],)
self.cpu_to_gcc_flag = (['ARM926', 'arm926ej-s'],
['CORTEXA8', 'cortex-a8'],
['ARM11MPCORE', 'mpcore'],
['ARM1136', 'arm1136jf-s'],
['ARM1176', 'arm1176jz-s'],)
self.arch = None
self.subarch = None
self.platform = None
@@ -96,15 +96,15 @@ class configuration:
if name[:len("CONFIG_PLATFORM_")] == "CONFIG_PLATFORM_":
parts = name.split("_", 3)
self.platform = parts[2].lower()
for cputype, cpuflag in self.cpu_to_gcc_flag:
if parts[2] == cputype:
self.gcc_cpu_flag = cpuflag
# Extract cpu from a name value pair
# Extract cpu and its gcc flag from a name value pair
def get_cpu(self, name, val):
if name[:len("CONFIG_CPU_")] == "CONFIG_CPU_":
parts = name.split("_", 3)
self.cpu = parts[2].lower()
for cputype, cpuflag in self.cpu_to_gcc_flag:
if parts[2] == cputype:
self.gcc_cpu_flag = cpuflag
# Extract kernel space toolchain from a name value pair
def get_toolchain_kernel(self, name, val):

2
include/l4/platform/eb/offsets.h
View File

@@ -59,7 +59,7 @@
#define EB_GIC3_VOFFSET 0x00007000
#define EB_SYSREGS_VBASE (IO_AREA0_VADDR + EB_SYSREGS_VOFFSET)
#define EB_SYSCTRL_VBASE (IO_AREA0_VADDR + EB_SYSCTRL0_VOFFSET)
#define EB_SYSCTRL_VBASE (IO_AREA0_VADDR + EB_SYSCTRL_VOFFSET)
#define EB_UART0_VBASE (IO_AREA0_VADDR + EB_UART0_VOFFSET)
#define EB_TIMER01_VBASE (IO_AREA0_VADDR + EB_TIMER01_VOFFSET)
#define EB_GIC0_VBASE (IO_AREA0_VADDR + EB_GIC0_VOFFSET)