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Patch for comments by bahadir

Browse Source
This commit is contained in:
Amit Mahajan
2009-11-01 00:51:55 +05:30
parent 52d346af40
commit 8d9f5f82d0
30 changed files with 105 additions and 101 deletions
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15
config/configuration.py
View File

@@ -54,11 +54,10 @@ class configuration:
def __init__(self):
# Mapping between platform selected and gcc flags for it
self.cpu_to_gcc_flag = (['PB926', 'arm926ej-s'],
['CORTEXA8', 'cortex-a8'],
['ARM11MPCORE', 'mpcore'],
['CORTEXA9', 'cortex-a9'],
['ARM1136', 'arm1136jf-s'],
['ARM1176', 'arm1176jz-s'],)
['PBA8', 'cortex-a8'],
['PB11MPCORE', 'mpcore'],
['PB1136', 'arm1136jf-s'],
['PB1176', 'arm1176jz-s'],)
# Mapping between the processor architecture and toolchain
self.toolchain_kernel = (['ARM', 'arm-none-eabi-'],)
@@ -111,9 +110,9 @@ class configuration:
if name[:len("CONFIG_PLATFORM_")] == "CONFIG_PLATFORM_":
parts = name.split("_", 3)
self.platform = parts[2].lower()
for i in self.cpu_to_gcc_flag:
if i[0] == parts[2]:
self.gcc_cpu_flag = i[1]
for cputype, cpuflag in self.cpu_to_gcc_flag:
if parts[2] == cputype:
self.gcc_cpu_flag = cpuflag
# Extract cpu from a name value pair
def get_cpu(self, name, val):

3
conts/libc/SConscript
View File

@@ -15,7 +15,7 @@ sys.path.append(PROJRELROOT)
from config.configuration import *
from config.projpaths import *
Import('env', 'arch', 'platform')
Import('env', 'arch')
variant = 'userspace'
@@ -28,7 +28,6 @@ source = \
Glob('src/*.c') + \
Glob('src/sys-' + variant + '/*.c') + \
Glob('src/sys-' + variant + '/arch-' + arch + '/*.c') + \
Glob('src/sys-' + variant + '/arch-' + arch + '/plat-' + platform + '/*.c') + \
Glob('src/arch-' + arch + '/*.c') + \
Glob('src/arch-' + arch + '/*.S') + \
Glob('crt/sys-' + variant + '/arch-' + arch + '/*.[cS]')

2
conts/libc/include/sys-userspace/arch-arm/arch/pl011_uart.h
View File

@@ -49,7 +49,7 @@
#define PL011_OEIRQ (1 << 10)
/* FIXME: Need to define this somewhere else */
struct pl011_uart;
struct pl011_uart uart;
int pl011_initialise(struct pl011_uart *uart);
int pl011_tx_char(unsigned int base, char c);

0
conts/libc/src/sys-userspace/arch-arm/plat-pb926/platform_init.c → conts/libc/src/sys-userspace/arch-arm/platform_init.c
View File

0
conts/libc/src/sys-userspace/arch-arm/plat-pb926/sys_fputc.c → conts/libc/src/sys-userspace/arch-arm/sys_fputc.c
View File

5
conts/libc/src/sys-userspace/arch-arm/sys_stdio.c
View File

@@ -1,10 +1,9 @@
#include <stdio.h>
#include <stdint.h>
int __fputc(int c, FILE *stream);
extern int __fputc(int c, FILE *stream);
static int
ser_out(int c)
static int ser_out(int c)
{
__fputc(c, 0);
if (c == '\n')

4
include/l4/arch/arm/v6/mm.h
View File

@@ -40,6 +40,9 @@
#define PMD_ENTRY_TOTAL 256
#define PMD_MAP_SIZE SZ_1MB
/* We need this as printascii.S is including this file */
#ifndef __ASSEMBLY__
/* Type-checkable page table elements */
typedef u32 pgd_t;
typedef u32 pmd_t;
@@ -157,4 +160,5 @@ void remove_section_mapping(unsigned long vaddr);
void copy_pgds_by_vrange(pgd_table_t *to, pgd_table_t *from,
unsigned long start, unsigned long end);
#endif /* __ASSEMBLY__*/
#endif /* __V5_MM_H__ */

4
include/l4/arch/arm/v7/mm.h
View File

@@ -40,6 +40,9 @@
#define PMD_ENTRY_TOTAL 256
#define PMD_MAP_SIZE SZ_1MB
/* We need this as printascii.S is including this file */
#ifndef __ASSEMBLY__
/* Type-checkable page table elements */
typedef u32 pgd_t;
typedef u32 pmd_t;
@@ -157,4 +160,5 @@ void remove_section_mapping(unsigned long vaddr);
void copy_pgds_by_vrange(pgd_table_t *to, pgd_table_t *from,
unsigned long start, unsigned long end);
#endif /* __ASSEMBLY__*/
#endif /* __V5_MM_H__ */

36
include/l4/drivers/irq/gic/gic.h
View File

@@ -11,25 +11,25 @@
#include INC_PLAT(platform.h)
/* GIC CPU register offsets */
#define ARM_GIC_CPU_ICR 0x00 /* Interface Control */
#define ARM_GIC_CPUPMR 0x04 /* Interrupt Priority Mask */
#define ARM_GIC_CPU_BPR 0x08 /* Binary Point */
#define ARM_GIC_CPU_IAR 0x0c /* Interrupt Acknowledge */
#define ARM_GIC_CPU_EOIR 0x10 /* End of Interrupt */
#define ARM_GIC_CPU_RRI 0x14 /* Running Priority */
#define ARM_GIC_CPU_HPIR 0x18 /* Highest Priority Interrupt*/
#define ARM_GIC_CPU_IC 0x00 /* Interface Control */
#define ARM_GIC_CPUPM 0x04 /* Interrupt Priority Mask */
#define ARM_GIC_CPU_BP 0x08 /* Binary Point */
#define ARM_GIC_CPU_IA 0x0c /* Interrupt Acknowledge */
#define ARM_GIC_CPU_EOI 0x10 /* End of Interrupt */
#define ARM_GIC_CPU_RPI 0x14 /* Running Priority */
#define ARM_GIC_CPU_HPI 0x18 /* Highest Priority Interrupt*/
/* Distributor register map */
#define ARM_GIC_DIST_CR 0x000 /* Control Register */
#define ARM_GIC_DIST_ICTR 0x004 /* Interface Controller Type */
#define ARM_GIC_DIST_ISER 0x100 /* Interrupt Set Enable */
#define ARM_GIC_DIST_ICER 0x180 /* Interrupt Clear Enable */
#define ARM_GIC_DIST_ISPR 0x200 /* Interrupt Set Pending */
#define ARM_GIC_DIST_ICPR 0x280 /* Interrupt Clear Pending*/
#define ARM_GIC_DIST_ABR 0x300 /* Active Bit */
#define ARM_GIC_DIST_IPR 0x400 /* Interrupt Priority */
#define ARM_GIC_DIST_IPTR 0x800 /* Interrupt Processor Target */
#define ARM_GIC_DIST_ICR 0xc00 /* Interrupt Configuration */
#define ARM_GIC_DIST_SGIR 0xf00 /* Software Generated Interrupt */
#define ARM_GIC_DIST_CNTRL 0x000 /* Control Register */
#define ARM_GIC_DIST_ICT 0x004 /* Interface Controller Type */
#define ARM_GIC_DIST_ISE 0x100 /* Interrupt Set Enable */
#define ARM_GIC_DIST_ICE 0x180 /* Interrupt Clear Enable */
#define ARM_GIC_DIST_ISP 0x200 /* Interrupt Set Pending */
#define ARM_GIC_DIST_ICP 0x280 /* Interrupt Clear Pending*/
#define ARM_GIC_DIST_AB 0x300 /* Active Bit */
#define ARM_GIC_DIST_IP 0x400 /* Interrupt Priority */
#define ARM_GIC_DIST_IPT 0x800 /* Interrupt Processor Target */
#define ARM_GIC_DIST_IC 0xc00 /* Interrupt Configuration */
#define ARM_GIC_DIST_SGI 0xf00 /* Software Generated Interrupt */
#endif /* __ARM_GIC_H__ */

6
include/l4/platform/eb/platform.h
View File

@@ -1,5 +1,5 @@
#ifndef __PLATFORM_EB_PLATFORM_H__
#define __PLATFORM_EB_PLATFORM_H__
#ifndef __EB_PLATFORM_H__
#define __EB_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -25,4 +25,4 @@
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_EB_PLATFORM_H__ */
#endif /* __EB_PLATFORM_H__ */

14
include/l4/platform/pb11mpcore/platform.h
View File

@@ -1,5 +1,5 @@
#ifndef __PLATFORM_PB11MPCORE_PLATFORM_H__
#define __PLATFORM_PB11MPCORE_PLATFORM_H__
#ifndef __PB11MPCORE_PLATFORM_H__
#define __PB11MPCORE_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -22,13 +22,13 @@
#define PLATFORM_TIMER1 1
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
#define PLATFORM_TIMER3 4
#define PLATFORM_TIMER3 5
#define PLATFORM_TIMER3 6
#define PLATFORM_TIMER3 7
#define PLATFORM_TIMER4 4
#define PLATFORM_TIMER5 5
#define PLATFORM_TIMER6 6
#define PLATFORM_TIMER7 7
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PB11MPCORE_PLATFORM_H__ */
#endif /* __PB11MPCORE_PLATFORM_H__ */

6
include/l4/platform/pb926/platform.h
View File

@@ -1,5 +1,5 @@
#ifndef __PLATFORM_PB926_PLATFORM_H__
#define __PLATFORM_PB926_PLATFORM_H__
#ifndef __PB926_PLATFORM_H__
#define __PB926_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -30,4 +30,4 @@
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PB926_PLATFORM_H__ */
#endif /* __PB926_PLATFORM_H__ */

14
include/l4/platform/pba8/platform.h
View File

@@ -1,5 +1,5 @@
#ifndef __PLATFORM_PBA8_PLATFORM_H__
#define __PLATFORM_PBA8_PLATFORM_H__
#ifndef __PBA8_PLATFORM_H__
#define __PBA8_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -21,12 +21,12 @@
#define PLATFORM_TIMER1 1
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
#define PLATFORM_TIMER3 4
#define PLATFORM_TIMER3 5
#define PLATFORM_TIMER3 6
#define PLATFORM_TIMER3 7
#define PLATFORM_TIMER4 4
#define PLATFORM_TIMER5 5
#define PLATFORM_TIMER6 6
#define PLATFORM_TIMER7 7
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PBA8_PLATFORM_H__ */
#endif /* __PBA8_PLATFORM_H__ */

2
loader/libs/c/SConstruct
View File

@@ -11,7 +11,6 @@ variant = "baremetal"
config = configuration_retrieve()
arch = config.arch
subarch = config.subarch
platform = config.platform
gcc_cpu_flag = config.gcc_cpu_flag
env = Environment(CC = config.kernel_toolchain + 'gcc',
@@ -34,7 +33,6 @@ source = \
Glob('src/*.c') + \
Glob('src/sys-' + variant + '/*.c') + \
Glob('src/sys-' + variant + '/arch-' + arch + '/*.c') + \
Glob('src/sys-' + variant + '/arch-' + arch + '/plat-' + platform + '/*.c') + \
Glob('src/arch-' + arch + '/*.c') + \
Glob('src/arch-' + arch + '/*.S') + \
Glob('crt/sys-' + variant + '/arch-' + arch + '/*.[cS]')

2
loader/libs/c/include/arch/pl011_uart.h
View File

@@ -58,7 +58,7 @@
#define PL011_OEIRQ (1 << 10)
/* FIXME: Need to define this somewhere else */
struct pl011_uart;
struct pl011_uart uart;
int pl011_initialise(struct pl011_uart *uart);
int pl011_tx_char(unsigned int base, char c);

0
loader/libs/c/src/sys-baremetal/arch-arm/plat-pb926/platform_init.c → loader/libs/c/src/sys-baremetal/arch-arm/platform_init.c
View File

24
loader/libs/c/src/sys-baremetal/arch-arm/plat-pb926/sys_fputc.c → loader/libs/c/src/sys-baremetal/arch-arm/sys_fputc.c
View File

@@ -105,7 +105,7 @@ extern struct pl011_uart uart;
int pl011_tx_char(unsigned int base, char c)
{
unsigned int val = 0;
read(val, (base + PL011_UARTFR));
if(val & PL011_TXFF) { /* TX FIFO Full */
return -PL011_EAGAIN;
@@ -118,27 +118,27 @@ int pl011_rx_char(unsigned int base, char * c)
{
unsigned int data;
unsigned int val = 0;
read(val, (base + PL011_UARTFR));
if(val & PL011_RXFE) { /* RX FIFO Empty */
return -PL011_EAGAIN;
}
read(data, (base + PL011_UARTDR));
*c = (char) data;
if((data >> 8) & 0xF) { /* There were errors */
return -1; /* Signal error in xfer */
}
return 0; /* No error return */
}
/*
* Sets the baud rate in kbps. It is recommended to use
* standard rates such as: 1200, 2400, 3600, 4800, 7200,
/*
* Sets the baud rate in kbps. It is recommended to use
* standard rates such as: 1200, 2400, 3600, 4800, 7200,
* 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200.
*/
void pl011_set_baudrate(unsigned int base, unsigned int baud,
void pl011_set_baudrate(unsigned int base, unsigned int baud,
unsigned int clkrate)
{
const unsigned int uartclk = 24000000; /* 24Mhz clock fixed on pb926 */
@@ -174,12 +174,12 @@ void pl011_set_baudrate(unsigned int base, unsigned int baud,
void pl011_set_irq_mask(unsigned int base, unsigned int flags)
{
unsigned int val = 0;
if(flags > 0x3FF) {
/* Invalid irqmask bitvector */
return;
}
read(val, (base + PL011_UARTIMSC));
val |= flags;
write(val, (base + PL011_UARTIMSC));
@@ -190,12 +190,12 @@ void pl011_set_irq_mask(unsigned int base, unsigned int flags)
void pl011_clr_irq_mask(unsigned int base, unsigned int flags)
{
unsigned int val = 0;
if(flags > 0x3FF) {
/* Invalid irqmask bitvector */
return;
}
read(val, (base + PL011_UARTIMSC));
val &= ~flags;
write(val, (base + PL011_UARTIMSC));

5
loader/libs/c/src/sys-baremetal/arch-arm/sys_stdio.c
View File

@@ -1,10 +1,9 @@
#include <stdio.h>
#include <stdint.h>
int __fputc(int c, FILE *stream);
extern int __fputc(int c, FILE *stream);
static int
ser_out(int c)
static int ser_out(int c)
{
__fputc(c, 0);
if (c == '\n')

22
scripts/linux/build_linux.py
View File

@@ -45,7 +45,9 @@ class LinuxUpdateKernel:
self.archid_list = (['PB926', '0x183'],
['AB926', '0x25E'],
['PB1176', '0x5E0'],
['REALVIEW_EB', '33B'],)
['PBA8', '0x769'],
['EB', '0x33B'],
['PB11MPCORE', '0x3D4'],)
# Replace line(having input_pattern) in filename with new_data
def replace_line(self, filename, input_pattern, new_data, prev_line):
@@ -119,13 +121,13 @@ class LinuxUpdateKernel:
# TODO: This call needs to be made global
config = configuration_retrieve()
for i in self.cpuid_list:
if i[0] == config.cpu.upper():
cpuid = i[1]
for cpu_type, cpu_id in self.cpuid_list:
if cpu_type == config.cpu.upper():
cpuid = cpu_id
break
for i in self.archid_list:
if i[0] == config.platform.upper():
archid = i[1]
for arch_type, arch_id in self.archid_list:
if arch_type == config.platform.upper():
archid = arch_id
break
file = join(LINUX_KERNELDIR, 'arch/arm/kernel/head.S')
@@ -145,10 +147,10 @@ class LinuxUpdateKernel:
def modify_kernel_config(self):
file = join(LINUX_KERNELDIR, 'arch/arm/configs/versatile_defconfig')
for i in self.config_param_list:
param = 'CONFIG_' + i[0]
for param_name, param_value in self.config_param_list:
param = 'CONFIG_' + param_name
prev_line = ''
if i[1] == 'SET':
if param_value == 'SET':
data_to_replace = ('# ' + param)
new_data = (param + '=y' + '\n')
else:

2
src/drivers/irq/gic/gic.c
View File

@@ -27,6 +27,7 @@
((setclr) ? setbit(bitvect, (base + reg)) \
: clrbit(bitvect, (base + reg)))
#if 0
/* Returns the irq number on this chip converting the irq bitvector */
int pl190_read_irq(void)
{
@@ -102,3 +103,4 @@ void pl190_sic_init(void)
write(0xFFFFFFFF, PL190_SIC_PICENCLR);
}
#endif

3
src/platform/eb/irq.c
View File

@@ -12,6 +12,8 @@
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
@@ -38,6 +40,7 @@ struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
},
},
};
#endif
static int platform_timer_handler(void)
{

2
src/platform/eb/platform.c
View File

@@ -39,7 +39,7 @@ void init_platform_timer(void)
{
add_boot_mapping(EB_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(EB_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
add_boot_mapping(EB_SYSCTRL_BASE, EB_SYSCTRL_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}

4
src/platform/eb/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE EB_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)

3
src/platform/pb11mpcore/irq.c
View File

@@ -12,6 +12,8 @@
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
@@ -38,6 +40,7 @@ struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
},
},
};
#endif
static int platform_timer_handler(void)
{

8
src/platform/pb11mpcore/platform.c
View File

@@ -29,7 +29,7 @@ void init_platform_console(void)
* userspace printf can work. Note, this raw mapping is to be
* removed in the future, when file-based io is implemented.
*/
add_boot_mapping(PBMPCORE_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
add_boot_mapping(PB11MPCORE_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
MAP_USR_IO_FLAGS);
uart_init();
@@ -37,11 +37,13 @@ void init_platform_console(void)
void init_platform_timer(void)
{
add_boot_mapping(PBMPCORE_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
add_boot_mapping(PB11MPCORE_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL0_VBASE, PAGE_SIZE,
add_boot_mapping(PB11MPCORE_SYSCTRL0_BASE, PB11MPCORE_SYSCTRL0_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/* TODO: SYSCTRL1 mapping may be needed */
add_boot_mapping(PB11MPCORE_SYSCTRL1_BASE, PB11MPCORE_SYSCTRL1_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}

4
src/platform/pb11mpcore/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE PB11MPCORE_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)

4
src/platform/pb926/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE PB926_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)

4
src/platform/pba8/irq.c
View File

@@ -12,6 +12,9 @@
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
@@ -38,6 +41,7 @@ struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
},
},
};
#endif
static int platform_timer_handler(void)
{

4
src/platform/pba8/platform.c
View File

@@ -39,9 +39,11 @@ void init_platform_timer(void)
{
add_boot_mapping(PBA8_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PBA8_SYSCTRL_BASE, PB926_SYSCTRL0_VBASE, PAGE_SIZE,
add_boot_mapping(PBA8_SYSCTRL0_BASE, PBA8_SYSCTRL0_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/* TODO: May need mapping for SYSCTRL1 */
add_boot_mapping(PBA8_SYSCTRL1_BASE, PBA8_SYSCTRL1_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}

4
src/platform/pba8/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE PBA8_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)