Patch for comments by bahadir

This commit is contained in:
Amit Mahajan
2009-11-01 00:51:55 +05:30
parent 52d346af40
commit 8d9f5f82d0
30 changed files with 105 additions and 101 deletions

View File

@@ -40,6 +40,9 @@
#define PMD_ENTRY_TOTAL 256
#define PMD_MAP_SIZE SZ_1MB
/* We need this as printascii.S is including this file */
#ifndef __ASSEMBLY__
/* Type-checkable page table elements */
typedef u32 pgd_t;
typedef u32 pmd_t;
@@ -157,4 +160,5 @@ void remove_section_mapping(unsigned long vaddr);
void copy_pgds_by_vrange(pgd_table_t *to, pgd_table_t *from,
unsigned long start, unsigned long end);
#endif /* __ASSEMBLY__*/
#endif /* __V5_MM_H__ */

View File

@@ -40,6 +40,9 @@
#define PMD_ENTRY_TOTAL 256
#define PMD_MAP_SIZE SZ_1MB
/* We need this as printascii.S is including this file */
#ifndef __ASSEMBLY__
/* Type-checkable page table elements */
typedef u32 pgd_t;
typedef u32 pmd_t;
@@ -157,4 +160,5 @@ void remove_section_mapping(unsigned long vaddr);
void copy_pgds_by_vrange(pgd_table_t *to, pgd_table_t *from,
unsigned long start, unsigned long end);
#endif /* __ASSEMBLY__*/
#endif /* __V5_MM_H__ */

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@@ -11,25 +11,25 @@
#include INC_PLAT(platform.h)
/* GIC CPU register offsets */
#define ARM_GIC_CPU_ICR 0x00 /* Interface Control */
#define ARM_GIC_CPUPMR 0x04 /* Interrupt Priority Mask */
#define ARM_GIC_CPU_BPR 0x08 /* Binary Point */
#define ARM_GIC_CPU_IAR 0x0c /* Interrupt Acknowledge */
#define ARM_GIC_CPU_EOIR 0x10 /* End of Interrupt */
#define ARM_GIC_CPU_RRI 0x14 /* Running Priority */
#define ARM_GIC_CPU_HPIR 0x18 /* Highest Priority Interrupt*/
#define ARM_GIC_CPU_IC 0x00 /* Interface Control */
#define ARM_GIC_CPUPM 0x04 /* Interrupt Priority Mask */
#define ARM_GIC_CPU_BP 0x08 /* Binary Point */
#define ARM_GIC_CPU_IA 0x0c /* Interrupt Acknowledge */
#define ARM_GIC_CPU_EOI 0x10 /* End of Interrupt */
#define ARM_GIC_CPU_RPI 0x14 /* Running Priority */
#define ARM_GIC_CPU_HPI 0x18 /* Highest Priority Interrupt*/
/* Distributor register map */
#define ARM_GIC_DIST_CR 0x000 /* Control Register */
#define ARM_GIC_DIST_ICTR 0x004 /* Interface Controller Type */
#define ARM_GIC_DIST_ISER 0x100 /* Interrupt Set Enable */
#define ARM_GIC_DIST_ICER 0x180 /* Interrupt Clear Enable */
#define ARM_GIC_DIST_ISPR 0x200 /* Interrupt Set Pending */
#define ARM_GIC_DIST_ICPR 0x280 /* Interrupt Clear Pending*/
#define ARM_GIC_DIST_ABR 0x300 /* Active Bit */
#define ARM_GIC_DIST_IPR 0x400 /* Interrupt Priority */
#define ARM_GIC_DIST_IPTR 0x800 /* Interrupt Processor Target */
#define ARM_GIC_DIST_ICR 0xc00 /* Interrupt Configuration */
#define ARM_GIC_DIST_SGIR 0xf00 /* Software Generated Interrupt */
#define ARM_GIC_DIST_CNTRL 0x000 /* Control Register */
#define ARM_GIC_DIST_ICT 0x004 /* Interface Controller Type */
#define ARM_GIC_DIST_ISE 0x100 /* Interrupt Set Enable */
#define ARM_GIC_DIST_ICE 0x180 /* Interrupt Clear Enable */
#define ARM_GIC_DIST_ISP 0x200 /* Interrupt Set Pending */
#define ARM_GIC_DIST_ICP 0x280 /* Interrupt Clear Pending*/
#define ARM_GIC_DIST_AB 0x300 /* Active Bit */
#define ARM_GIC_DIST_IP 0x400 /* Interrupt Priority */
#define ARM_GIC_DIST_IPT 0x800 /* Interrupt Processor Target */
#define ARM_GIC_DIST_IC 0xc00 /* Interrupt Configuration */
#define ARM_GIC_DIST_SGI 0xf00 /* Software Generated Interrupt */
#endif /* __ARM_GIC_H__ */

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@@ -1,5 +1,5 @@
#ifndef __PLATFORM_EB_PLATFORM_H__
#define __PLATFORM_EB_PLATFORM_H__
#ifndef __EB_PLATFORM_H__
#define __EB_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -25,4 +25,4 @@
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_EB_PLATFORM_H__ */
#endif /* __EB_PLATFORM_H__ */

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@@ -1,5 +1,5 @@
#ifndef __PLATFORM_PB11MPCORE_PLATFORM_H__
#define __PLATFORM_PB11MPCORE_PLATFORM_H__
#ifndef __PB11MPCORE_PLATFORM_H__
#define __PB11MPCORE_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -22,13 +22,13 @@
#define PLATFORM_TIMER1 1
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
#define PLATFORM_TIMER3 4
#define PLATFORM_TIMER3 5
#define PLATFORM_TIMER3 6
#define PLATFORM_TIMER3 7
#define PLATFORM_TIMER4 4
#define PLATFORM_TIMER5 5
#define PLATFORM_TIMER6 6
#define PLATFORM_TIMER7 7
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PB11MPCORE_PLATFORM_H__ */
#endif /* __PB11MPCORE_PLATFORM_H__ */

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@@ -1,5 +1,5 @@
#ifndef __PLATFORM_PB926_PLATFORM_H__
#define __PLATFORM_PB926_PLATFORM_H__
#ifndef __PB926_PLATFORM_H__
#define __PB926_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -30,4 +30,4 @@
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PB926_PLATFORM_H__ */
#endif /* __PB926_PLATFORM_H__ */

View File

@@ -1,5 +1,5 @@
#ifndef __PLATFORM_PBA8_PLATFORM_H__
#define __PLATFORM_PBA8_PLATFORM_H__
#ifndef __PBA8_PLATFORM_H__
#define __PBA8_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -21,12 +21,12 @@
#define PLATFORM_TIMER1 1
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
#define PLATFORM_TIMER3 4
#define PLATFORM_TIMER3 5
#define PLATFORM_TIMER3 6
#define PLATFORM_TIMER3 7
#define PLATFORM_TIMER4 4
#define PLATFORM_TIMER5 5
#define PLATFORM_TIMER6 6
#define PLATFORM_TIMER7 7
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PBA8_PLATFORM_H__ */
#endif /* __PBA8_PLATFORM_H__ */