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Patch for comments by bahadir

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This commit is contained in:
Amit Mahajan
2009-11-01 00:51:55 +05:30
parent 52d346af40
commit 8d9f5f82d0
30 changed files with 105 additions and 101 deletions
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2
src/drivers/irq/gic/gic.c
View File

@@ -27,6 +27,7 @@
((setclr) ? setbit(bitvect, (base + reg)) \
: clrbit(bitvect, (base + reg)))
#if 0
/* Returns the irq number on this chip converting the irq bitvector */
int pl190_read_irq(void)
{
@@ -102,3 +103,4 @@ void pl190_sic_init(void)
write(0xFFFFFFFF, PL190_SIC_PICENCLR);
}
#endif

3
src/platform/eb/irq.c
View File

@@ -12,6 +12,8 @@
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
@@ -38,6 +40,7 @@ struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
},
},
};
#endif
static int platform_timer_handler(void)
{

2
src/platform/eb/platform.c
View File

@@ -39,7 +39,7 @@ void init_platform_timer(void)
{
add_boot_mapping(EB_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(EB_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
add_boot_mapping(EB_SYSCTRL_BASE, EB_SYSCTRL_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}

4
src/platform/eb/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE EB_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)

3
src/platform/pb11mpcore/irq.c
View File

@@ -12,6 +12,8 @@
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
@@ -38,6 +40,7 @@ struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
},
},
};
#endif
static int platform_timer_handler(void)
{

8
src/platform/pb11mpcore/platform.c
View File

@@ -29,7 +29,7 @@ void init_platform_console(void)
* userspace printf can work. Note, this raw mapping is to be
* removed in the future, when file-based io is implemented.
*/
add_boot_mapping(PBMPCORE_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
add_boot_mapping(PB11MPCORE_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
MAP_USR_IO_FLAGS);
uart_init();
@@ -37,11 +37,13 @@ void init_platform_console(void)
void init_platform_timer(void)
{
add_boot_mapping(PBMPCORE_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
add_boot_mapping(PB11MPCORE_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL0_VBASE, PAGE_SIZE,
add_boot_mapping(PB11MPCORE_SYSCTRL0_BASE, PB11MPCORE_SYSCTRL0_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/* TODO: SYSCTRL1 mapping may be needed */
add_boot_mapping(PB11MPCORE_SYSCTRL1_BASE, PB11MPCORE_SYSCTRL1_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}

4
src/platform/pb11mpcore/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE PB11MPCORE_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)

4
src/platform/pb926/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE PB926_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)

4
src/platform/pba8/irq.c
View File

@@ -12,6 +12,9 @@
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
#if 0
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
@@ -38,6 +41,7 @@ struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
},
},
};
#endif
static int platform_timer_handler(void)
{

4
src/platform/pba8/platform.c
View File

@@ -39,9 +39,11 @@ void init_platform_timer(void)
{
add_boot_mapping(PBA8_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PBA8_SYSCTRL_BASE, PB926_SYSCTRL0_VBASE, PAGE_SIZE,
add_boot_mapping(PBA8_SYSCTRL0_BASE, PBA8_SYSCTRL0_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/* TODO: May need mapping for SYSCTRL1 */
add_boot_mapping(PBA8_SYSCTRL1_BASE, PBA8_SYSCTRL1_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}

4
src/platform/pba8/printascii.S
View File

@@ -8,10 +8,6 @@
#define UART_DATA_OFFSET 0x0
/*
* FIXME: We need to divide into bytes as writing to register doesnot look
* possible directly, it gives some errors in compilation
*/
#define UART0_PHYS_BASE PBA8_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)