Removed AB926 platform

This commit is contained in:
Amit Mahajan
2009-11-27 00:43:53 +05:30
parent efdd81330a
commit bc4a233adb
13 changed files with 1 additions and 444 deletions

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@@ -20,7 +20,6 @@ SUBARCH_V7 'ARM v7 Architecture, To be added'
arm_platform_type 'ARM Platform Type'
PLATFORM_EB 'Realview EB Platform, Unsupported yet'
PLATFORM_AB926 'Versatile AB926 Platform, Unsupported yet'
PLATFORM_PB926 'Versatile PB926 Platform'
PLATFORM_PB11MPCORE 'Realview PB11MPCore Platform'
PLATFORM_PBA8 'Realview PB-A8 Platform'
@@ -56,7 +55,6 @@ choices arm_subarch_type
choices arm_platform_type
PLATFORM_EB
PLATFORM_AB926
PLATFORM_PB926
PLATFORM_PB11MPCORE
PLATFORM_PBA8
@@ -104,7 +102,6 @@ default CONTAINERS from 1
#Platform rules:
unless SUBARCH_V5 suppress PLATFORM_PB926
unless SUBARCH_V5 suppress PLATFORM_AB926
unless SUBARCH_V6 suppress PLATFORM_PB11MPCORE
unless SUBARCH_V7 suppress PLATFORM_PBA8
@@ -124,7 +121,7 @@ unless ARCH_ARM suppress arm_menu
unless PLATFORM_EB suppress CPU_ARM1136
derive DRIVER_UART_PL011 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
derive DRIVER_TIMER_SP804 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
derive DRIVER_IRQ_PL190 from PLATFORM_PB926 or PLATFORM_AB926
derive DRIVER_IRQ_PL190 from PLATFORM_PB926
derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_PBA8 or PLATFORM_EB

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@@ -1,27 +0,0 @@
#ifndef __PLATFORM_IRQ_H__
#define __PLATFORM_IRQ_H__
#define IRQ_CHIPS_MAX 2
#define IRQS_MAX 64
/* IRQ indices. */
#define IRQ_TIMER01 4
#define IRQ_TIMER23 5
#define IRQ_RTC 10
#define IRQ_UART0 12
#define IRQ_UART1 13
#define IRQ_UART2 14
#define IRQ_SIC 31
/* Cascading definitions */
#define PIC_IRQS_MAX 31 /* Total irqs on PIC */
/* The local irq line of the dummy peripheral on this chip */
#define LOCALIRQ_DUMMY 15
/* The irq index offset of this chip, is the maximum of previous chip + 1 */
#define SIRQ_CHIP_OFFSET (PIC_IRQS_MAX + 1)
/* The global irq number of dummy is the local irq line + it's chip offset */
#define IRQ_DUMMY (LOCALIRQ_DUMMY + SIRQ_CHIP_OFFSET)
#endif /* __PLATFORM_IRQ_H__ */

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@@ -1,60 +0,0 @@
/*
* Describes physical memory layout of pb926 platform.
*
* Copyright (C) 2007 Bahadir Balban
*/
#ifndef __PLATFORM_PB926_OFFSETS_H__
#define __PLATFORM_PB926_OFFSETS_H__
/* Physical memory base */
#define PHYS_MEM_START 0x00000000 /* inclusive */
#define PHYS_MEM_END 0x08000000 /* 128 MB, exclusive */
/*
* These bases taken from where kernel is `physically' linked at,
* also used to calculate virtual-to-physical translation offset.
* See the linker script for their sources. PHYS_ADDR_BASE can't
* use a linker variable because it's referred from assembler.
*/
#define PHYS_ADDR_BASE 0x100000
/* Device memory base */
#define PB926_DEV_PHYS 0x10000000
/* Device offsets in physical memory */
#define PB926_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PB926_SYSCTRL_BASE 0x101E0000 /* System controller */
#define PB926_WATCHDOG_BASE 0x101E1000 /* Watchdog */
#define PB926_TIMER01_BASE 0x101E2000 /* Timers 0 and 1 */
#define PB926_TIMER23_BASE 0x101E3000 /* Timers 2 and 3 */
#define PB926_RTC_BASE 0x101E8000 /* Real Time Clock */
#define PB926_VIC_BASE 0x10140000 /* Primary Vectored IC */
#define PB926_SIC_BASE 0x10003000 /* Secondary IC */
#define PB926_UART0_BASE 0x101F1000 /* Console port (UART0) */
/*
* Uart virtual address until a file-based console access
* is available for userspace
*/
#define USERSPACE_UART_BASE 0x500000
/*
* Device offsets in virtual memory. They offset to some virtual
* device base address. Each page on this virtual base is consecutively
* allocated to devices. Nice and smooth.
*/
#define PB926_TIMER01_VOFFSET 0x00000000
#define PB926_UART0_VOFFSET 0x00001000
#define PB926_VIC_VOFFSET 0x00002000
#define PB926_SIC_VOFFSET 0x00003000
#define PB926_SYSREGS_VOFFSET 0x00005000
#define PB926_SYSCTRL_VOFFSET 0x00006000
#define PB926_UART0_VBASE (IO_AREA0_VADDR + PB926_UART0_VOFFSET)
#define PB926_TIMER01_VBASE (IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
#define PB926_SYSCTRL_VBASE (IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
#define PB926_VIC_VBASE (IO_AREA0_VADDR + PB926_VIC_VOFFSET)
#define PB926_SIC_VBASE (IO_AREA0_VADDR + PB926_SIC_VOFFSET)
#endif /* __PLATFORM_PB926_OFFSETS_H__ */

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@@ -1,22 +0,0 @@
#ifndef __PLATFORM_PB926_PLATFORM_H__
#define __PLATFORM_PB926_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
*
* Copyright (C) Bahadir Balban 2007
*/
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PB926_UART0_VBASE
#define PLATFORM_TIMER_BASE PB926_TIMER01_VBASE
#define PLATFORM_SP810_BASE PB926_SYSCTRL_VBASE
#define PLATFORM_IRQCTRL_BASE PB926_VIC_VBASE
#define PLATFORM_SIRQCTRL_BASE PB926_SIC_VBASE
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PLATFORM_PB926_PLATFORM_H__ */

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@@ -1,15 +0,0 @@
#ifndef __PLATFORM__PB926__PRINTASCII__H__
#define __PLATFORM__PB926__PRINTASCII__H__
#define dprintk(str, val) \
{ \
printascii(str); \
printascii("0x"); \
printhex8((val)); \
printascii("\n"); \
}
void printascii(char *str);
void printhex8(unsigned int);
#endif /* __PLATFORM__PB926__PRINTASCII__H__ */

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@@ -1,20 +0,0 @@
/*
* Platform specific ties to generic uart functions that putc expects.
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __PLATFORM_PB926_UART_H__
#define __PLATFORM_PB926_UART_H__
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PB926_UART0_VBASE
#include <l4/drivers/uart/pl011/pl011_uart.h>
void uart_init(void);
void uart_putc(char c);
#endif /* __PLATFORM_PB926_UART_H__ */

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@@ -43,7 +43,6 @@ class LinuxUpdateKernel:
self.cpuid_list = (['ARM926', '0x41069265'],)
# List of ARCHIDs, to be used by linux based on codezero config
self.archid_list = (['PB926', '0x183'],
['AB926', '0x25E'],
['PB1176', '0x5E0'],
['PBA8', '0x769'],
['EB', '0x33B'],

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@@ -1,10 +0,0 @@
# Inherit global environment
Import('env')
# The set of source files associated with this SConscript file.
src_local = ['printascii.S','platform.c', 'uart.c', 'timer.c', 'irq.c']
obj = env.Object(src_local)
Return('obj')

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@@ -1,57 +0,0 @@
/*
* Support for generic irq handling using platform irq controller (PL190)
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include <l4/generic/irq.h>
#include <l4/generic/time.h>
#include INC_PLAT(irq.h)
#include INC_PLAT(platform.h)
#include INC_ARCH(exception.h)
#include <l4/drivers/irq/pl190/pl190_vic.h>
#include <l4/drivers/timer/sp804/sp804_timer.h>
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
[0] = {
.name = "Vectored irq controller",
.level = 0,
.cascade = IRQ_SIC,
.offset = 0,
.ops = {
.init = pl190_vic_init,
.read_irq = pl190_read_irq,
.ack_and_mask = pl190_mask_irq,
.unmask = pl190_unmask_irq,
},
},
[1] = {
.name = "Secondary irq controller",
.level = 1,
.cascade = IRQ_NIL,
.offset = SIRQ_CHIP_OFFSET,
.ops = {
.init = pl190_sic_init,
.read_irq = pl190_sic_read_irq,
.ack_and_mask = pl190_sic_mask_irq,
.unmask = pl190_sic_unmask_irq,
},
},
};
static int platform_timer_handler(void)
{
sp804_irq_handler();
return do_timer_irq();
}
/* Built-in irq handlers initialised at compile time.
* Else register with register_irq() */
struct irq_desc irq_desc_array[IRQS_MAX] = {
[IRQ_TIMER01] = {
.name = "Timer01",
.chip = &irq_chip_array[0],
.handler = platform_timer_handler,
},
};

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@@ -1,62 +0,0 @@
/*
* PB926 platform-specific initialisation and setup
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include <l4/generic/space.h>
#include <l4/generic/irq.h>
#include INC_ARCH(linker.h)
#include INC_PLAT(printascii.h)
#include INC_SUBARCH(mm.h)
#include INC_SUBARCH(mmu_ops.h)
#include INC_GLUE(memory.h)
#include INC_GLUE(memlayout.h)
#include INC_PLAT(offsets.h)
#include INC_PLAT(platform.h)
#include INC_PLAT(uart.h)
#include INC_PLAT(irq.h)
#include INC_ARCH(asm.h)
void init_platform_console(void)
{
add_boot_mapping(PB926_UART0_BASE, PL011_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
/*
* Map same UART IO area to userspace so that primitive uart-based
* userspace printf can work. Note, this raw mapping is to be
* removed in the future, when file-based io is implemented.
*/
add_boot_mapping(PB926_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
MAP_USR_IO_FLAGS);
uart_init();
}
void init_platform_timer(void)
{
add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
timer_init();
}
void init_platform_irq_controller()
{
add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
MAP_IO_DEFAULT_FLAGS);
irq_controllers_init();
}
void platform_init(void)
{
init_platform_console();
init_platform_timer();
init_platform_irq_controller();
}

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@@ -1,110 +0,0 @@
/*
* Basic UART printing.
*/
#include INC_ARCH(asm.h)
#include INC_GLUE(memlayout.h)
#define UART_DATA_OFFSET 0x0
.macro uart_address rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x10000000
orreq \rx, \rx, #0x001F0000
orreq \rx, \rx, #0x00001000
/* FIXME: This offset is incorrect */
movne \rx, #0xf9000000 @#IO_AREA0_VADDR
addne \rx, \rx, #PB926_UART0_VOFFSET @ UART0 page offset from
@ virtual io area base.
.endm
.macro uart_send, ry, rx
strb \ry, [\rx, #UART_DATA_OFFSET]
.endm
.macro uart_wait, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 5
bne 501b
.endm
.macro uart_busy, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 3
bne 501b
.endm
.text
/*
* Useful debugging routines
*/
BEGIN_PROC(printhex8)
mov r1, #8
b printhex
BEGIN_PROC(printhex4)
mov r1, #4
b printhex
BEGIN_PROC(printhex2)
mov r1, #2
printhex: adr r2, hexbuf
@printhex: ldr r2, =hexbuf
add r3, r2, r1
mov r1, #0
strb r1, [r3]
1: and r1, r0, #15
mov r0, r0, lsr #4
cmp r1, #10
addlt r1, r1, #'0'
addge r1, r1, #'a' - 10
strb r1, [r3, #-1]!
teq r3, r2
bne 1b
mov r0, r2
b printascii
.ltorg
.align
@ vmem-linked image has strings in vmem addresses. This replaces
@ the reference with corresponding physical address. Note this
@ won't work if memory offsets aren't clear cut values for
@ orr'ing and bic'ing. rm = mmu bits rs = string address.
.macro get_straddr rs, rm
mrc p15, 0, \rm, c1, c0 @ Get MMU bits.
tst \rm, #1 @ MMU enabled?
@subeq \rs, \rs, #KERNEL_AREA_START
biceq \rs, \rs, #KERNEL_AREA_START @ Clear Virtual mem offset.
@orreq \rs, \rs, #PHYS_ADDR_BASE @ Add Phy mem offset.
.endm
BEGIN_PROC(printascii)
get_straddr r0, r1
uart_address r3
b 2f
1: uart_wait r2, r3
uart_send r1, r3
uart_busy r2, r3
teq r1, #'\n'
moveq r1, #'\r'
beq 1b
2: teq r0, #0
ldrneb r1, [r0], #1
teqne r1, #0
bne 1b
mov pc, lr
END_PROC(printascii)
BEGIN_PROC(printch)
uart_address r3
mov r1, r0
mov r0, #0
b 1b
hexbuf: .space 16

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@@ -1,28 +0,0 @@
/*
* Ties up platform timer with generic timer api
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#include <l4/generic/irq.h>
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/timer/sp804/sp804_timer.h>
#include <l4/drivers/misc/sp810/sp810_sysctrl.h>
void timer_init(void)
{
/* Set timer 0 to 1MHz */
sp810_set_timclk(0, 1);
/* Initialise timer */
sp804_init();
}
void timer_start(void)
{
irq_enable(IRQ_TIMER01);
sp804_set_irq(0, 1); /* Enable timer0 irq */
sp804_enable(0, 1); /* Enable timer0 */
}

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@@ -1,28 +0,0 @@
/*
* Ties up platform's uart driver functions with generic API
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/uart/pl011/pl011_uart.h>
extern struct pl011_uart uart;
void uart_init()
{
uart.base = PL011_BASE;
uart.ops.initialise(&uart);
}
/* Generic uart function that lib/putchar.c expects to see implemented */
void uart_putc(char c)
{
int res;
/* Platform specific uart implementation */
do {
res = uart.ops.tx_char(c);
} while (res < 0);
}