3 Commits

Author	SHA1	Message	Date
Bahadir Balban	0c4bd69357	Reimplemented atomic destructive read. Revised irq control capabilities.	2009-12-13 18:49:35 +02:00
Bahadir Balban	41b7176a58	2 posix containers tested with changes. Inline assemblers fixed. ... Inline assembler for irq disabling had no output variables defined.	2009-12-12 01:54:39 +02:00
Bahadir Balban	32c0bb3a76	Converted all wait/wakeup runqueue lock/unlock paths to irq versions. ... Irqs can now touch runqueues and do async wakeups. This necessitated that we implement all wake up wait and runqueue locking work with irqs. All this, assumes that in an SMP setup we may have cross-cpu wake ups, runqueue manipulation. If we later decide that we only wake up threads in the current container, (and lock containers to cpus) we won't really need spinlocks, or irq disabling anymore. The current set up might be trivially less responsive, but is more flexible.	2009-12-12 01:20:14 +02:00