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212 lines
6.8 KiB
C
212 lines
6.8 KiB
C
/*
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* Australian Public Licence B (OZPLB)
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*
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* Version 1-0
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*
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* Copyright (c) 2004 National ICT Australia
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*
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* All rights reserved.
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*
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* Developed by: Embedded, Real-time and Operating Systems Program (ERTOS)
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* National ICT Australia
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* http://www.ertos.nicta.com.au
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*
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* Permission is granted by National ICT Australia, free of charge, to
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* any person obtaining a copy of this software and any associated
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* documentation files (the "Software") to deal with the Software without
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* restriction, including (without limitation) the rights to use, copy,
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* modify, adapt, merge, publish, distribute, communicate to the public,
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* sublicense, and/or sell, lend or rent out copies of the Software, and
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* to permit persons to whom the Software is furnished to do so, subject
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* to the following conditions:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimers.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimers in the documentation and/or other materials provided
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* with the distribution.
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*
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* * Neither the name of National ICT Australia, nor the names of its
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* contributors, may be used to endorse or promote products derived
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* from this Software without specific prior written permission.
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*
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* EXCEPT AS EXPRESSLY STATED IN THIS LICENCE AND TO THE FULL EXTENT
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* PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS-IS", AND
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* NATIONAL ICT AUSTRALIA AND ITS CONTRIBUTORS MAKE NO REPRESENTATIONS,
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* WARRANTIES OR CONDITIONS OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO ANY REPRESENTATIONS, WARRANTIES OR CONDITIONS
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* REGARDING THE CONTENTS OR ACCURACY OF THE SOFTWARE, OR OF TITLE,
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT,
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* THE ABSENCE OF LATENT OR OTHER DEFECTS, OR THE PRESENCE OR ABSENCE OF
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* ERRORS, WHETHER OR NOT DISCOVERABLE.
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*
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* TO THE FULL EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL
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* NATIONAL ICT AUSTRALIA OR ITS CONTRIBUTORS BE LIABLE ON ANY LEGAL
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* THEORY (INCLUDING, WITHOUT LIMITATION, IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHERWISE) FOR ANY CLAIM, LOSS, DAMAGES OR OTHER
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* LIABILITY, INCLUDING (WITHOUT LIMITATION) LOSS OF PRODUCTION OR
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* OPERATION TIME, LOSS, DAMAGE OR CORRUPTION OF DATA OR RECORDS; OR LOSS
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* OF ANTICIPATED SAVINGS, OPPORTUNITY, REVENUE, PROFIT OR GOODWILL, OR
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* OTHER ECONOMIC LOSS; OR ANY SPECIAL, INCIDENTAL, INDIRECT,
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* CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES, ARISING OUT OF OR IN
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* CONNECTION WITH THIS LICENCE, THE SOFTWARE OR THE USE OF OR OTHER
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* DEALINGS WITH THE SOFTWARE, EVEN IF NATIONAL ICT AUSTRALIA OR ITS
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* CONTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH CLAIM, LOSS,
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* DAMAGES OR OTHER LIABILITY.
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*
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* If applicable legislation implies representations, warranties, or
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* conditions, or imposes obligations or liability on National ICT
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* Australia or one of its contributors in respect of the Software that
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* cannot be wholly or partly excluded, restricted or modified, the
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* liability of National ICT Australia or the contributor is limited, to
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* the full extent permitted by the applicable legislation, at its
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* option, to:
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* a. in the case of goods, any one or more of the following:
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* i. the replacement of the goods or the supply of equivalent goods;
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* ii. the repair of the goods;
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* iii. the payment of the cost of replacing the goods or of acquiring
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* equivalent goods;
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* iv. the payment of the cost of having the goods repaired; or
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* b. in the case of services:
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* i. the supplying of the services again; or
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* ii. the payment of the cost of having the services supplied again.
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*
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* The construction, validity and performance of this licence is governed
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* by the laws in force in New South Wales, Australia.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <arch/pl011_uart.h>
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extern struct pl011_uart uart;
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/* UART-specific internal error codes */
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#define PL011_ERROR 1
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#define PL011_EAGAIN 2
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/* Error status bits in receive status register */
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#define PL011_FE (1 << 0)
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#define PL011_PE (1 << 1)
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#define PL011_BE (1 << 2)
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#define PL011_OE (1 << 3)
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/* Status bits in flag register */
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#define PL011_TXFE (1 << 7)
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#define PL011_RXFF (1 << 6)
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#define PL011_TXFF (1 << 5)
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#define PL011_RXFE (1 << 4)
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#define PL011_BUSY (1 << 3)
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#define PL011_DCD (1 << 2)
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#define PL011_DSR (1 << 1)
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#define PL011_CTS (1 << 0)
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int pl011_tx_char(unsigned int base, char c)
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{
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unsigned int val = 0;
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read(val, (base + PL011_UARTFR));
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if(val & PL011_TXFF) { /* TX FIFO Full */
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return -PL011_EAGAIN;
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}
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write(c, (base + PL011_UARTDR));
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return 0;
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}
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int pl011_rx_char(unsigned int base, char * c)
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{
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unsigned int data;
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unsigned int val = 0;
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read(val, (base + PL011_UARTFR));
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if(val & PL011_RXFE) { /* RX FIFO Empty */
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return -PL011_EAGAIN;
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}
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read(data, (base + PL011_UARTDR));
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*c = (char) data;
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if((data >> 8) & 0xF) { /* There were errors */
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return -1; /* Signal error in xfer */
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}
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return 0; /* No error return */
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}
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/*
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* Sets the baud rate in kbps. It is recommended to use
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* standard rates such as: 1200, 2400, 3600, 4800, 7200,
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* 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200.
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*/
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void pl011_set_baudrate(unsigned int base, unsigned int baud,
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unsigned int clkrate)
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{
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const unsigned int uartclk = 24000000; /* 24Mhz clock fixed on pb926 */
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unsigned int val = 0, ipart = 0, fpart = 0;
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/* Use default pb926 rate if no rate is supplied */
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if(clkrate == 0) {
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clkrate = uartclk;
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}
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if(baud > 115200 || baud < 1200) {
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baud = 38400; /* Default rate. */
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}
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/* 24000000 / (38400 * 16) */
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ipart = 39;
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write(ipart, (base + PL011_UARTIBRD));
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write(fpart, (base + PL011_UARTFBRD));
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/*
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* For the IBAUD and FBAUD to update, we need to
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* write to UARTLCR_H because the 3 registers are
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* actually part of a single register in hardware
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* which only updates by a write to UARTLCR_H
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*/
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read(val, (base + PL011_UARTLCR_H));
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write(val, (base + PL011_UARTLCR_H));
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return;
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}
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/* Masks the irqs given in the flags bitvector. */
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void pl011_set_irq_mask(unsigned int base, unsigned int flags)
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{
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unsigned int val = 0;
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if(flags > 0x3FF) { /* Invalid irqmask bitvector */
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return;
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}
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read(val, (base + PL011_UARTIMSC));
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val |= flags;
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write(val, (base + PL011_UARTIMSC));
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return;
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}
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/* Clears the irqs given in flags from masking */
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void pl011_clr_irq_mask(unsigned int base, unsigned int flags)
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{
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unsigned int val = 0;
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if(flags > 0x3FF) {
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/* Invalid irqmask bitvector */
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return;
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}
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read(val, (base + PL011_UARTIMSC));
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val &= ~flags;
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write(val, (base + PL011_UARTIMSC));
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return;
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}
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int __fputc(int c, FILE *stream)
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{
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int res;
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do {
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res = pl011_tx_char(uart.base, c);
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} while( res < 0);
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return(0);
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}
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