force a single codegen unit on the dev profile

to work around problems with several codegen units, which is now the default for unoptimized builds

.gdbinit

@@ -1,9 +1,18 @@
 target remote :3333
+
 monitor arm semihosting enable
-# if using ITM
+
+# # send captured ITM to the file itm.fifo
+# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# # 8000000 must match the core clock frequency
 # monitor tpiu config internal itm.fifo uart off 8000000
+
+# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
+# # 2000000 is the frequency of the SWO pin
+# monitor tpiu config external uart off 8000000 2000000
+
+# # enable ITM port 0
 # monitor itm port 0 on
+
 load
-tbreak cortex_m_rt::reset_handler
-monitor reset halt
-continue
+step

CHANGELOG.md

@@ -5,6 +5,13 @@ This project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+## [v0.1.8] - 2017-05-30
+
+### Changed
+
+- Bumped the cortex-m-rt dependency to v0.2.3, and documented the `_stext`
+  symbol (see memory.x).
+
 ## [v0.1.7] - 2017-05-27
 
 ### Added
@@ -69,7 +76,8 @@ This project adheres to [Semantic Versioning](http://semver.org/).
 
 - Initial release
 
-[Unreleased]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.7...HEAD
+[Unreleased]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.8...HEAD
+[v0.1.8]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.7...v0.1.8
 [v0.1.7]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.6...v0.1.7
 [v0.1.6]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.5...v0.1.6
 [v0.1.5]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.4...v0.1.5

Cargo.toml

@@ -6,11 +6,14 @@ keywords = ["arm", "cortex-m", "template"]
 license = "MIT OR Apache-2.0"
 name = "cortex-m-quickstart"
 repository = "https://github.com/japaric/cortex-m-quickstart"
-version = "0.1.7"
+version = "0.1.9"
 
 [dependencies]
 cortex-m = "0.2.7"
-cortex-m-rt = "0.2.2"
+cortex-m-rt = "0.2.3"
+
+[profile.dev]
+codegen-units = 1
 
 [profile.release]
 lto = true

memory.x

@@ -10,3 +10,10 @@ MEMORY
 /* The stack is of the full descending type. */
 /* NOTE Do NOT modify `_stack_start` unless you know what you are doing */
 _stack_start = ORIGIN(RAM) + LENGTH(RAM);
+
+/* You can use this symbol to customize the location of the .text section */
+/* If omitted the .text section will be placed right after the .vector_table
+   section */
+/* This is required only on some microcontrollers that store some configuration
+   right after the vector table */
+/* _stext = ORIGIN(FLASH) + 0x400; */