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adding some uart examples

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root
2016-07-11 21:58:28 -04:00
parent 0a90403f14
commit 116797e99d
22 changed files with 1341 additions and 0 deletions
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31
boards/pizero/bootloader07/README
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@@ -19,6 +19,37 @@ pins great. If not there are other ways, some pins can be shoved in
rather than soldered. Or balanced if nothing else (stick them in and
lean them to the side so they touch), just dont short anything out.
On the sd card end of the board the P1 connector pins are like this,
same as other raspberry pi boards, but span the whole length of the
board rather than orentied more toward one corner than another.
|SD | 12
|CARD| 34
56
78
9.
..
..
The pins we care about
2
4
6
8 TX out
10 RX in
The pi TX goes to the uart RX and the pi RX to the uart TX.
Here are some examples of 3.3V level uarts, you need 3.3V level not 5V
definitely not RS232C
https://www.sparkfun.com/products/9873
https://www.adafruit.com/products/954
You can find these on ebay from china for a buck or two each with a
jumper to select between 3.3V and 5V.
This bootloader receives intel hex formatted files.
https://en.wikipedia.org/wiki/Intel_HEX

39
boards/pizero/uart02/Makefile Normal file
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@@ -0,0 +1,39 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
all : uart02.hex uart02.bin
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
uart02.o : uart02.c
$(ARMGNU)-gcc $(COPS) -c uart02.c -o uart02.o
uart02.elf : memmap vectors.o uart02.o
$(ARMGNU)-ld vectors.o uart02.o -T memmap -o uart02.elf
$(ARMGNU)-objdump -D uart02.elf > uart02.list
uart02.bin : uart02.elf
$(ARMGNU)-objcopy uart02.elf -O binary uart02.bin
uart02.hex : uart02.elf
$(ARMGNU)-objcopy uart02.elf -O ihex uart02.hex

17
boards/pizero/uart02/README Normal file
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@@ -0,0 +1,17 @@
See the top level README for information on where to find the
schematic and programmers reference manual for the ARM processor
on the raspberry pi. Also find information on how to load and run
these programs.
Based on uart01, this one enables the uart rxd1 receiver (gpio15).
It starts by printing 12345678 then whatever you type on the terminal
is echoed back.
See the top level README file for information on how to connect the
raspi uart to your host computer.
Using a dumb terminal (minicom) 115200 board No parity 8 bits 1 stop
bit, no flow control (might have to exit minicom and start again for
the flow control setting to take). What you type on the dumb terminal
comes back.

12
boards/pizero/uart02/memmap Normal file
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@@ -0,0 +1,12 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

130
boards/pizero/uart02/uart02.c Normal file
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@@ -0,0 +1,130 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
#define GPPUD 0x20200094
#define GPPUDCLK0 0x20200098
#define AUX_ENABLES 0x20215004
#define AUX_MU_IO_REG 0x20215040
#define AUX_MU_IER_REG 0x20215044
#define AUX_MU_IIR_REG 0x20215048
#define AUX_MU_LCR_REG 0x2021504C
#define AUX_MU_MCR_REG 0x20215050
#define AUX_MU_LSR_REG 0x20215054
#define AUX_MU_MSR_REG 0x20215058
#define AUX_MU_SCRATCH 0x2021505C
#define AUX_MU_CNTL_REG 0x20215060
#define AUX_MU_STAT_REG 0x20215064
#define AUX_MU_BAUD_REG 0x20215068
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//alt function 5 for uart1
//alt function 0 for uart0
//((250,000,000/115200)/8)-1 = 270
//------------------------------------------------------------------------
void uart_putc ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_putc(rc);
if(rb==0) break;
}
uart_putc(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_putc(0x0D);
uart_putc(0x0A);
}
//------------------------------------------------------------------------
int notmain ( unsigned int earlypc )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
hexstring(0x12345678);
hexstring(earlypc);
while(1)
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
ra=GET32(AUX_MU_IO_REG);
//while(1)
//{
//if(GET32(AUX_MU_LSR_REG)&0x20) break;
//}
PUT32(AUX_MU_IO_REG,ra);
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

34
boards/pizero/uart02/vectors.s Normal file
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@@ -0,0 +1,34 @@
.globl _start
_start:
mov sp,#0x8000
mov r0,pc
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

32
boards/pizero/uart03/Makefile Normal file
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@@ -0,0 +1,32 @@
ARMGNU ?= arm-none-eabi
COPS = -mthumb -Wall -O2 -nostdlib -nostartfiles -ffreestanding
all : uart03.hex uart03.bin
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
novectors.o : novectors.s
$(ARMGNU)-as novectors.s -o novectors.o
uart03.o : uart03.c
$(ARMGNU)-gcc $(COPS) -c uart03.c -o uart03.o
uart03.elf : memmap novectors.o uart03.o
$(ARMGNU)-ld novectors.o uart03.o -T memmap -o uart03.elf
$(ARMGNU)-objdump -D uart03.elf > uart03.list
uart03.bin : uart03.elf
$(ARMGNU)-objcopy uart03.elf -O binary uart03.bin
uart03.hex : uart03.elf
$(ARMGNU)-objcopy uart03.elf -O ihex uart03.hex

19
boards/pizero/uart03/README Normal file
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@@ -0,0 +1,19 @@
See the top level README for information on where to find the
schematic and programmers reference manual for the ARM processor
on the raspberry pi. Also find information on how to load and run
these programs.
Based on uart02, the difference is that this is primarily thumb code
instead of ARM. ARM in this case meaning the traditional 32 bit
instruction set and thumb meaning the traditional 16 bit instruction
subset. Thumb2 has confused/blurred those definitions though.
(thumb2 is a mostly 32 bit extension to the thumb instruction set using
formerly undefined instructions to create variable word length instructions).
From the top level readme we see that the RPi2 uses a different base
address for the peripherals. Uncomment the correct line at the
top of the uart03.c file depending on the Raspberry Pi you are using.
See the top level README for information on how to connect the raspi
uart to your host computer.

12
boards/pizero/uart03/memmap Normal file
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@@ -0,0 +1,12 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

49
boards/pizero/uart03/novectors.s Normal file
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@@ -0,0 +1,49 @@
.globl _start
_start:
ldr sp,stack_start
ldr r0,thumb_start_add
bx r0
stack_start: .word 0x8000
thumb_start_add: .word thumb_start
.word 0
.word 0
.thumb
.thumb_func
thumb_start:
bl notmain
hang: b hang
.thumb_func
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.thumb_func
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.thumb_func
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

126
boards/pizero/uart03/uart03.c Normal file
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@@ -0,0 +1,126 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#define PBASE 0x20000000
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define GPFSEL1 (PBASE+0x00200004)
#define GPSET0 (PBASE+0x0020001C)
#define GPCLR0 (PBASE+0x00200028)
#define GPPUD (PBASE+0x00200094)
#define GPPUDCLK0 (PBASE+0x00200098)
#define AUX_ENABLES (PBASE+0x00215004)
#define AUX_MU_IO_REG (PBASE+0x00215040)
#define AUX_MU_IER_REG (PBASE+0x00215044)
#define AUX_MU_IIR_REG (PBASE+0x00215048)
#define AUX_MU_LCR_REG (PBASE+0x0021504C)
#define AUX_MU_MCR_REG (PBASE+0x00215050)
#define AUX_MU_LSR_REG (PBASE+0x00215054)
#define AUX_MU_MSR_REG (PBASE+0x00215058)
#define AUX_MU_SCRATCH (PBASE+0x0021505C)
#define AUX_MU_CNTL_REG (PBASE+0x00215060)
#define AUX_MU_STAT_REG (PBASE+0x00215064)
#define AUX_MU_BAUD_REG (PBASE+0x00215068)
//((250,000,000/115200)/8)-1 = 270
//------------------------------------------------------------------------
void uart_putc ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_putc(rc);
if(rb==0) break;
}
uart_putc(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_putc(0x0D);
uart_putc(0x0A);
}
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
hexstring(0x12345678);
while(1)
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
ra=GET32(AUX_MU_IO_REG);
//while(1)
//{
//if(GET32(AUX_MU_LSR_REG)&0x20) break;
//}
PUT32(AUX_MU_IO_REG,ra);
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

71
boards/pizero/uart04/Makefile Normal file
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@@ -0,0 +1,71 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : uart04.hex uart04.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
uart04.o : uart04.c
$(ARMGNU)-gcc $(COPS) -c uart04.c -o uart04.o
uart04.elf : memmap vectors.o uart04.o
$(ARMGNU)-ld vectors.o uart04.o -T memmap -o uart04.elf
$(ARMGNU)-objdump -D uart04.elf > uart04.list
uart04.bin : uart04.elf
$(ARMGNU)-objcopy uart04.elf -O binary uart04.bin
uart04.hex : uart04.elf
$(ARMGNU)-objcopy uart04.elf -O ihex uart04.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
clang : uart04.clang.hex uart04.clang.bin
uart04.clang.bc : uart04.c
clang $(LOPS) -c uart04.c -o uart04.clang.bc
uart04.clang.opt.elf : memmap vectors.o uart04.clang.bc
opt $(OOPS) uart04.clang.bc -o uart04.clang.opt.bc
llc $(LLCOPS) uart04.clang.opt.bc -o uart04.clang.opt.s
$(ARMGNU)-as uart04.clang.opt.s -o uart04.clang.opt.o
$(ARMGNU)-ld -o uart04.clang.opt.elf -T memmap vectors.o uart04.clang.opt.o
$(ARMGNU)-objdump -D uart04.clang.opt.elf > uart04.clang.opt.list
uart04.clang.hex : uart04.clang.opt.elf
$(ARMGNU)-objcopy uart04.clang.opt.elf uart04.clang.hex -O ihex
uart04.clang.bin : uart04.clang.opt.elf
$(ARMGNU)-objcopy uart04.clang.opt.elf uart04.clang.bin -O binary

22
boards/pizero/uart04/README Normal file
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@@ -0,0 +1,22 @@
See the top level README for information on where to find the
schematic and programmers reference manual for the ARM processor
on the raspberry pi. Also find information on how to load and run
these programs.
Based on uart02 and blinker05. Like blinker05 this is a multi stage
program killing three birds with one stone. First it uses polling
of the interrupt status lines to show what happens to the registers, etc
when an rx based interrupt occurs. Then it uses interrupt polling to
receive characters rather than the uart status register. Then it
enables the interrupts to the arm and uses an interrupt service routine
to receive characters from the uart.
As with other parts of this mini uart, the documentation has errors,
bits that are marked as not used were required to make this work. When
working with this mini uart also have as a reference a real 16550 manual
if it doesnt work the way the BCM manual says, then pretend it is a
real 16550 and see what happens.
Note that the mini uart interrupt is not interrupt 57 uart_int, it is
interrupt 29 aux_int.

12
boards/pizero/uart04/memmap Normal file
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@@ -0,0 +1,12 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x10000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

224
boards/pizero/uart04/uart04.c Normal file
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@@ -0,0 +1,224 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
extern void enable_irq ( void );
extern void enable_fiq ( void );
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
#define GPPUD 0x20200094
#define GPPUDCLK0 0x20200098
#define AUX_ENABLES 0x20215004
#define AUX_MU_IO_REG 0x20215040
#define AUX_MU_IER_REG 0x20215044
#define AUX_MU_IIR_REG 0x20215048
#define AUX_MU_LCR_REG 0x2021504C
#define AUX_MU_MCR_REG 0x20215050
#define AUX_MU_LSR_REG 0x20215054
#define AUX_MU_MSR_REG 0x20215058
#define AUX_MU_SCRATCH 0x2021505C
#define AUX_MU_CNTL_REG 0x20215060
#define AUX_MU_STAT_REG 0x20215064
#define AUX_MU_BAUD_REG 0x20215068
#define IRQ_BASIC 0x2000B200
#define IRQ_PEND1 0x2000B204
#define IRQ_PEND2 0x2000B208
#define IRQ_FIQ_CONTROL 0x2000B210
#define IRQ_ENABLE1 0x2000B210
#define IRQ_ENABLE2 0x2000B214
#define IRQ_ENABLE_BASIC 0x2000B218
#define IRQ_DISABLE1 0x2000B21C
#define IRQ_DISABLE2 0x2000B220
#define IRQ_DISABLE_BASIC 0x2000B224
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//alt function 5 for uart1
//alt function 0 for uart0
//((250,000,000/115200)/8)-1 = 270
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0x5); //enable rx interrupts
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
void uart_putc ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_putc(rc);
if(rb==0) break;
}
uart_putc(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_putc(0x0D);
uart_putc(0x0A);
}
volatile unsigned int rxhead;
volatile unsigned int rxtail;
#define RXBUFMASK 0xFFF
volatile unsigned char rxbuffer[RXBUFMASK+1];
//-------------------------------------------------------------------------
void c_irq_handler ( void )
{
unsigned int rb,rc;
//an interrupt has occurred, find out why
while(1) //resolve all interrupts to uart
{
rb=GET32(AUX_MU_IIR_REG);
if((rb&1)==1) break; //no more interrupts
if((rb&6)==4)
{
//receiver holds a valid byte
rc=GET32(AUX_MU_IO_REG); //read byte from rx fifo
rxbuffer[rxhead]=rc&0xFF;
rxhead=(rxhead+1)&RXBUFMASK;
}
}
}
//------------------------------------------------------------------------
int notmain ( unsigned int earlypc )
{
unsigned int ra;
unsigned int rb;
unsigned int rc;
unsigned int rx;
PUT32(IRQ_DISABLE1,1<<29);
uart_init();
hexstring(0x12345678);
for(ra=0;ra<20;ra++) hexstring(ra);
hexstring(0x12345678);
hexstring(earlypc);
PUT32(IRQ_ENABLE1,1<<29);
for(rx=0;rx<5;)
{
ra=GET32(IRQ_PEND1);
if(ra&(1<<29))
{
hexstrings(ra);
hexstrings(GET32(AUX_MU_IIR_REG));
hexstring(GET32(AUX_MU_STAT_REG));
hexstring(GET32(AUX_MU_IO_REG));
hexstrings(GET32(IRQ_PEND1));
hexstrings(GET32(AUX_MU_IIR_REG));
hexstring(GET32(AUX_MU_STAT_REG));
rx++;
}
}
hexstring(0x12345678);
rxhead=rxtail;
for(rx=0;rx<5;)
{
while(rxtail!=rxhead)
{
uart_putc(rxbuffer[rxtail]);
rxtail=(rxtail+1)&RXBUFMASK;
rx++;
}
ra=GET32(IRQ_PEND1);
if(ra&(1<<29))
{
//an interrupt has occurred, find out why
while(1) //resolve all interrupts to uart
{
rb=GET32(AUX_MU_IIR_REG);
if((rb&1)==1) break; //no more interrupts
if((rb&6)==4)
{
//receiver holds a valid byte
rc=GET32(AUX_MU_IO_REG); //read byte from rx fifo
rxbuffer[rxhead]=rc&0xFF;
rxhead=(rxhead+1)&RXBUFMASK;
}
}
}
}
hexstring(0x12345678);
enable_irq();
while(1)
{
while(rxtail!=rxhead)
{
uart_putc(rxbuffer[rxtail]);
rxtail=(rxtail+1)&RXBUFMASK;
rx++;
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

96
boards/pizero/uart04/vectors.s Normal file
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,unused_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word hang
prefetch_handler: .word hang
data_handler: .word hang
unused_handler: .word hang
irq_handler: .word irq
fiq_handler: .word hang
reset:
mov r0,#0x8000
mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ (PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD2
msr cpsr_c,r0
mov sp,#0x8000
;@ (PSR_FIQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD1
msr cpsr_c,r0
mov sp,#0x4000
;@ (PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD3
msr cpsr_c,r0
mov sp,#0x8000000
;@ SVC MODE, IRQ ENABLED, FIQ DIS
;@mov r0,#0x53
;@msr cpsr_c, r0
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
.globl enable_irq
enable_irq:
mrs r0,cpsr
bic r0,r0,#0x80
msr cpsr_c,r0
bx lr
irq:
push {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
bl c_irq_handler
pop {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
subs pc,lr,#4
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

35
boards/pizero/uart05/Makefile Normal file
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ARMGNU ?= arm-none-eabi
#ARMGNU ?= arm-linux-gnueabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
all : uart05.bin
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.s
start.o : start.s
$(ARMGNU)-as start.s -o start.o
uart05.o : uart05.c
$(ARMGNU)-gcc $(COPS) -c uart05.c -o uart05.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
uart05.bin : memmap start.o periph.o uart05.o
$(ARMGNU)-ld start.o periph.o uart05.o -T memmap -o uart05.elf
$(ARMGNU)-objdump -D uart05.elf > uart05.list
$(ARMGNU)-objcopy uart05.elf -O ihex uart05.hex
$(ARMGNU)-objcopy uart05.elf -O binary uart05.bin

62
boards/pizero/uart05/README Normal file
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See the top level README file for more information on documentation
and how to run these programs.
Derived from bootloader07. This is a skeleton for building generic
uart based programs.
Yes I did some self modifying code in there to make it easier to dump
some registers of interest. In particular the MIDR (Main Identification
Register). Which helps you figure out which ARM core you are using.
The RPi 2 uses a Cortex-A7 r0p5 in the BCM2836, the predecessors to the
RPi2 use an ARM1176JZF-S. The pi zero is an ARM11 as shown below.
Raspberry Pi 2
00000000 410FC075 MIDR
00000001 84448003 CTR
00000002 00000000 TCMTR
00000003 00000000 TLBTR
00000004 410FC075 MIDR alias
00000005 80000F00 MPIDR
00000006 00000000 REVIDR
00000007 410FC075 MIDR alias
00000000 00001131 ID_PFR0
00000001 00011011 ID_PFR1
00000002 02010555 ID_DFR0
00000003 00000000 ID_AFR0
00000004 10101105 ID_MMFR0
00000005 40000000 MD_MMFR1
00000006 01240000 ID_MMFR2
00000007 02102211 ID_MMFR3
00000000 02101110 ID_ISAR0 *
00000001 13112111 ID_ISAR1
00000002 21232041 ID_ISAR2
00000003 11112131 ID_ISAR3
00000004 10011142 ID_ISAR4
00000005 00000000 ID_ISA45
pizero rpi2
410FB767 410FC075 MRC p15, 0, r0, c0, c0, 0
1D152152 84448003 MRC p15, 0, r0, c0, c0, 1
00000000 00000000 MRC p15, 0, r0, c0, c0, 2
00000800 00000000 MRC p15, 0, r0, c0, c0, 3
410FB767 410FC075 MRC p15, 0, r0, c0, c0, 4
410FB767 80000F00 MRC p15, 0, r0, c0, c0, 5
410FB767 00000000 MRC p15, 0, r0, c0, c0, 6
410FB767 410FC075 MRC p15, 0, r0, c0, c0, 7
00000111 00001131 MRC p15, 0, r0, c0, c1, 0
00000011 00011011 MRC p15, 0, r0, c0, c1, 1
00000033 02010555 MRC p15, 0, r0, c0, c1, 2
00000000 00000000 MRC p15, 0, r0, c0, c1, 3
01130003 10101105 MRC p15, 0, r0, c0, c1, 4
10030302 40000000 MRC p15, 0, r0, c0, c1, 5
01222100 01240000 MRC p15, 0, r0, c0, c1, 6
00000000 02102211 MRC p15, 0, r0, c0, c1, 7
00140011 02101110 MRC p15, 0, r0, c0, c2, 0
12002111 13112111 MRC p15, 0, r0, c0, c2, 1
11231121 21232041 MRC p15, 0, r0, c0, c2, 2
01102131 11112131 MRC p15, 0, r0, c0, c2, 3
00001141 10011142 MRC p15, 0, r0, c0, c2, 4
00000000 00000000 MRC p15, 0, r0, c0, c2, 5

12
boards/pizero/uart05/memmap Normal file
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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

152
boards/pizero/uart05/periph.c Normal file
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#define PBASE 0x20000000
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_CTL (PBASE+0x0000B408)
#define ARM_TIMER_CNT (PBASE+0x0000B420)
#define GPFSEL1 (PBASE+0x00200004)
#define GPSET0 (PBASE+0x0020001C)
#define GPCLR0 (PBASE+0x00200028)
#define GPPUD (PBASE+0x00200094)
#define GPPUDCLK0 (PBASE+0x00200098)
#define AUX_ENABLES (PBASE+0x00215004)
#define AUX_MU_IO_REG (PBASE+0x00215040)
#define AUX_MU_IER_REG (PBASE+0x00215044)
#define AUX_MU_IIR_REG (PBASE+0x00215048)
#define AUX_MU_LCR_REG (PBASE+0x0021504C)
#define AUX_MU_MCR_REG (PBASE+0x00215050)
#define AUX_MU_LSR_REG (PBASE+0x00215054)
#define AUX_MU_MSR_REG (PBASE+0x00215058)
#define AUX_MU_SCRATCH (PBASE+0x0021505C)
#define AUX_MU_CNTL_REG (PBASE+0x00215060)
#define AUX_MU_STAT_REG (PBASE+0x00215064)
#define AUX_MU_BAUD_REG (PBASE+0x00215068)
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//------------------------------------------------------------------------
unsigned int uart_lcr ( void )
{
return(GET32(AUX_MU_LSR_REG));
}
//------------------------------------------------------------------------
unsigned int uart_recv ( void )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
return(GET32(AUX_MU_IO_REG)&0xFF);
}
//------------------------------------------------------------------------
unsigned int uart_check ( void )
{
if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
return(0);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_send(rc);
if(rb==0) break;
}
uart_send(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_send(0x0D);
uart_send(0x0A);
}
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
void timer_init ( void )
{
//0xF9+1 = 250
//250MHz/250 = 1MHz
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

50
boards/pizero/uart05/start.s Normal file
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
.globl GETPC
GETPC:
mov r0,lr
bx lr
.globl BRANCHTO
BRANCHTO:
bx r0
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

104
boards/pizero/uart05/uart05.c Normal file
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// 2 outer corner sd card end
// 4
// 6
// 8 TX out
// 10 RX in
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern unsigned int GETPC ( void );
extern void dummy ( unsigned int );
extern unsigned int BRANCHTO ( unsigned int );
extern void uart_init ( void );
extern unsigned int uart_lcr ( void );
extern void uart_flush ( void );
extern void uart_send ( unsigned int );
extern unsigned int uart_recv ( void );
extern unsigned int uart_check ( void );
extern void hexstring ( unsigned int );
extern void hexstrings ( unsigned int );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
uart_init();
hexstring(0x12345678);
hexstring(GETPC());
//e12fff1e bx lr
//ee100f10 mrc 15, 0, r0, cr0, cr0, {0}
//ee100f30 mrc 15, 0, r0, cr0, cr0, {1}
//ee100f50 mrc 15, 0, r0, cr0, cr0, {2}
//ee100f70 mrc 15, 0, r0, cr0, cr0, {3}
//ee100f90 mrc 15, 0, r0, cr0, cr0, {4}
//ee100fb0 mrc 15, 0, r0, cr0, cr0, {5}
//ee100fd0 mrc 15, 0, r0, cr0, cr0, {6}
//ee100ff0 mrc 15, 0, r0, cr0, cr0, {7}
//ee100f11 mrc 15, 0, r0, cr0, cr1, {0}
//ee100f31 mrc 15, 0, r0, cr0, cr1, {1}
//ee100f51 mrc 15, 0, r0, cr0, cr1, {2}
//ee100f71 mrc 15, 0, r0, cr0, cr1, {3}
//ee100f91 mrc 15, 0, r0, cr0, cr1, {4}
//ee100fb1 mrc 15, 0, r0, cr0, cr1, {5}
//ee100fd1 mrc 15, 0, r0, cr0, cr1, {6}
//ee100ff1 mrc 15, 0, r0, cr0, cr1, {7}
//ee100f12 mrc 15, 0, r0, cr0, cr2, {0}
//ee100f32 mrc 15, 0, r0, cr0, cr2, {1}
//ee100f52 mrc 15, 0, r0, cr0, cr2, {2}
//ee100f72 mrc 15, 0, r0, cr0, cr2, {3}
//ee100f92 mrc 15, 0, r0, cr0, cr2, {4}
//ee100fb2 mrc 15, 0, r0, cr0, cr2, {5}
//ee100fd2 mrc 15, 0, r0, cr0, cr2, {6}
//ee100ff2 mrc 15, 0, r0, cr0, cr2, {7}
for(ra=0;ra<8;ra++)
{
PUT32(0x4000,0xee100f10|(ra<<5));
PUT32(0x4004,0xe12fff1e);
hexstrings(ra);
hexstring(BRANCHTO(0x4000));
}
for(ra=0;ra<8;ra++)
{
PUT32(0x4000,0xee100f11|(ra<<5));
PUT32(0x4004,0xe12fff1e);
hexstrings(ra);
hexstring(BRANCHTO(0x4000));
}
for(ra=0;ra<8;ra++)
{
PUT32(0x4000,0xee100f12|(ra<<5));
PUT32(0x4004,0xe12fff1e);
hexstrings(ra);
hexstring(BRANCHTO(0x4000));
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2014 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------