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thanks to ultimo and others I think I have the pi2 switching back to svc and secure mode now.

Browse Source 
and other cleanup
This commit is contained in:
dwelch
2016-03-28 20:44:00 -04:00
parent 77f364f4a4
commit 6f4c0d8bcc
106 changed files with 1728 additions and 262941 deletions
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1
README
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@@ -23,6 +23,7 @@ now there is a growing number of variations.
ARM11 based (BCM2835)
Raspberry Pi B
Raspberry Pi B2
Raspberry Pi A+
Raspberry Pi B+
Raspberry Pi Zero

35
aarch64/README
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@@ -1,35 +0,0 @@
Normally I prefer to not use a config.txt. The standard boot files
bootcode.bin, start.elf, and kernel7.img are how most of the raspberry
pis in the world are used, booting linux. Well tested. config.txt
creates exceptions to that, and from the early days of the raspi to
the present some of these have come and gone.
But...As of this writing in order to run 64 bit, from what the folks
on the bare metal forums say, you have to use a config.txt containing
arm_control=0x200
kernel_old=1
The bit set in arm_control indicates boot 64 bit not 32 bit.
kernel_old tells the bootloader to not provide any boot code for the
ARM (as of this writing that code is 32 bit instructions so wont work).
This means we have to build our program for address 0x0000 not address
0x8000 like we would normally. This also means we have to deal with
the other four cores. When all the affinity bits are zero in the
MPIDR_EL1 register, that is the master core.
This relies on some SBZ/RES0 bits, but works for now to put the other
cores in an infinite loop.
mrs x0,mpidr_el1
mov x1,#0xC1000000
bic x0,x0,x1
cbz x0,master
b .
master:
My build_gcc repository has a build_arm64 script that will build a
gnu based toolchain that can be/was used to build these examples.

36
aarch64/bootloader07/Makefile
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@@ -1,36 +0,0 @@
ARMGNU ?= aarch64-none-elf
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : kernel7.img
all : gcc
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
bootloader07.o : bootloader07.c
$(ARMGNU)-gcc $(COPS) -c bootloader07.c -o bootloader07.o
periph7.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph7.o
kernel7.img : loader vectors.o periph7.o bootloader07.o
$(ARMGNU)-ld vectors.o periph7.o bootloader07.o -T loader -o bootloader07_rpi2.elf
$(ARMGNU)-objdump -D bootloader07_rpi2.elf > bootloader07_rpi2.list
$(ARMGNU)-objcopy bootloader07_rpi2.elf -O ihex bootloader07_rpi2.hex
$(ARMGNU)-objcopy bootloader07_rpi2.elf -O binary kernel7.img

56
aarch64/bootloader07/README
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@@ -1,56 +0,0 @@
See the top level README file for more information on documentation
and how to run these programs.
This is a very simple bootloader. Instead of the sd dance (see
top level README), this makes life a bit simpler and greatly reduces
physical wear and tear on the sd card socket. Do the sd card dance one
more time with this kernel.img. Get some sort of serial solution to
connect a dumb termial program with the ability to download raw/ascii
files.
bootloader01 was .hex based, this one is also .hex based but a
different way to parse it. bootloader02 through bootloader06
expect binary files, a binary image of the memory starting at
address 0x8000. I intend to release bootloader08 at the same time
and it will be .bin based but have the go feature.
This bootloader07 parses intel hex formatted files. Look that up at
wikipedia, it is very simple and historically widely used for bare
metal embedded work. (S record is another format like intel hex but
of course motorola had to have their own. Intel hex and Motorola S-
record). I felt like doing another state machine and honestly had
forgotten I did one before in bootloader01. This bootloader does
not make any of the others obsolete, it was just a fun exercise.
The thing that annoyed me the most about my bootloader is that
I use minicom and minicom spawns a separate program to do the file
transfers, xmodem, ascii, kermit, etc, and there is a delay and
a loss of data when the spawned program exits and minicom returns.
The solution is that you hit the g key when you want the program
to start so you are basically back in the terminal at that point.
I normally do not deliver binaries. In this case I have included all
of the build files so that you can at least get started without having
to build the bootloader. This is specifically for the raspberry pi 3,
compiled for aarch64.
As of this writing for this to work you must in addition to the other
files (bootcode.bin, start.elf, the kernel7.img from here) and a
config.txt containing
arm_control=0x200
kernel_old=1
The bit set in arm_control indicates boot 64 bit not 32 bit.
kernel_old tells the bootloader to not provide any boot code for the
ARM (as of this writing that code is 32 bit instructions so wont work).
This means we have to build our program for address 0x0000 not address
0x8000 like we would normally. This also means we have to deal with
the other four cores. When all the affinity bits are zero in the
MPIDR_EL1 register, that is the master core. For now I put the other
cores in an infinite loop.

226
aarch64/bootloader07/bootloader07.c
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@@ -1,226 +0,0 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// 2 outer corner
// 4
// 6
// 8 TX out
// 10 RX in
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern unsigned int GETPC ( void );
extern void BRANCHTO ( unsigned int );
extern void dummy ( unsigned int );
extern void uart_init ( void );
extern unsigned int uart_lcr ( void );
extern void uart_flush ( void );
extern void uart_send ( unsigned int );
extern unsigned int uart_recv ( void );
extern unsigned int uart_check ( void );
extern void hexstring ( unsigned int );
extern void hexstrings ( unsigned int );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int state;
unsigned int byte_count;
unsigned int address;
unsigned int record_type;
unsigned int segment;
unsigned int data;
unsigned int sum;
unsigned int ra;
uart_init();
hexstring(0x12345678);
hexstring(GETPC());
uart_send('I');
uart_send('H');
uart_send('E');
uart_send('X');
uart_send(0x0D);
uart_send(0x0A);
state=0;
segment=0;
sum=0;
data=0;
record_type=0;
address=0;
byte_count=0;
while(1)
{
ra=uart_recv();
if(ra==':')
{
state=1;
continue;
}
if(ra==0x0D)
{
state=0;
continue;
}
if(ra==0x0A)
{
state=0;
continue;
}
if((ra=='g')||(ra=='G'))
{
uart_send(0x0D);
uart_send('-');
uart_send('-');
uart_send(0x0D);
uart_send(0x0A);
uart_send(0x0A);
BRANCHTO(0x8000);
state=0;
break;
}
switch(state)
{
case 0:
{
break;
}
case 1:
case 2:
{
byte_count<<=4;
if(ra>0x39) ra-=7;
byte_count|=(ra&0xF);
byte_count&=0xFF;
state++;
break;
}
case 3:
case 4:
case 5:
case 6:
{
address<<=4;
if(ra>0x39) ra-=7;
address|=(ra&0xF);
address&=0xFFFF;
address|=segment;
state++;
break;
}
case 7:
{
record_type<<=4;
if(ra>0x39) ra-=7;
record_type|=(ra&0xF);
record_type&=0xFF;
state++;
break;
}
case 8:
{
record_type<<=4;
if(ra>0x39) ra-=7;
record_type|=(ra&0xF);
record_type&=0xFF;
switch(record_type)
{
case 0x00:
{
state=14;
break;
}
case 0x01:
{
hexstring(sum);
state=0;
break;
}
case 0x02:
{
state=9;
break;
}
default:
{
state=0;
break;
}
}
break;
}
case 9:
case 10:
case 11:
case 12:
{
segment<<=4;
if(ra>0x39) ra-=7;
segment|=(ra&0xF);
segment&=0xFFFF;
state++;
break;
}
case 13:
{
segment<<=4;
state=0;
break;
}
case 14:
case 15:
case 16:
case 17:
case 18:
case 19:
case 20:
case 21:
{
data<<=4;
if(ra>0x39) ra-=7;
data|=(ra&0xF);
if(state==21)
{
ra=(data>>24)|(data<<24);
ra|=(data>>8)&0x0000FF00;
ra|=(data<<8)&0x00FF0000;
data=ra;
PUT32(address,data);
sum+=address;
sum+=data;
address+=4;
state=14;
}
else
{
state++;
}
break;
}
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2014 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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aarch64/bootloader07/bootloader07.o
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aarch64/bootloader07/bootloader07_rpi2.elf
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aarch64/bootloader07/bootloader07_rpi2.hex
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394
aarch64/bootloader07/bootloader07_rpi2.list
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@@ -1,394 +0,0 @@
bootloader07_rpi2.elf: file format elf64-littleaarch64
Disassembly of section .text:
0000000000000000 <_start>:
0: 14080000 b 200000 <skip>
...
0000000000200000 <skip>:
200000: d53800a0 mrs x0, mpidr_el1
200004: d2b82001 mov x1, #0xc1000000 // #3238002688
200008: 8a210000 bic x0, x0, x1
20000c: b4000040 cbz x0, 200014 <master>
200010: 14000003 b 20001c <hang>
0000000000200014 <master>:
200014: b26503ff mov sp, #0x8000000 // #134217728
200018: 940000b2 bl 2002e0 <notmain>
000000000020001c <hang>:
20001c: 14000000 b 20001c <hang>
0000000000200020 <PUT32>:
200020: b9000001 str w1, [x0]
200024: d65f03c0 ret
0000000000200028 <GET32>:
200028: b9400000 ldr w0, [x0]
20002c: d65f03c0 ret
0000000000200030 <GETPC>:
200030: aa1e03e0 mov x0, x30
200034: d65f03c0 ret
0000000000200038 <BRANCHTO>:
200038: 2a0003fe mov w30, w0
20003c: d65f03c0 ret
0000000000200040 <dummy>:
200040: d65f03c0 ret
200044: 00000000 .inst 0x00000000 ; undefined
0000000000200048 <uart_lcr>:
200048: 528a0a80 mov w0, #0x5054 // #20564
20004c: 72a7e420 movk w0, #0x3f21, lsl #16
200050: 17fffff6 b 200028 <GET32>
200054: d503201f nop
0000000000200058 <uart_recv>:
200058: a9bf7bfd stp x29, x30, [sp,#-16]!
20005c: 910003fd mov x29, sp
200060: 528a0a80 mov w0, #0x5054 // #20564
200064: 72a7e420 movk w0, #0x3f21, lsl #16
200068: 97fffff0 bl 200028 <GET32>
20006c: 3607ffa0 tbz w0, #0, 200060 <uart_recv+0x8>
200070: 528a0800 mov w0, #0x5040 // #20544
200074: 72a7e420 movk w0, #0x3f21, lsl #16
200078: 97ffffec bl 200028 <GET32>
20007c: 53001c00 uxtb w0, w0
200080: a8c17bfd ldp x29, x30, [sp],#16
200084: d65f03c0 ret
0000000000200088 <uart_check>:
200088: a9bf7bfd stp x29, x30, [sp,#-16]!
20008c: 528a0a80 mov w0, #0x5054 // #20564
200090: 910003fd mov x29, sp
200094: 72a7e420 movk w0, #0x3f21, lsl #16
200098: 97ffffe4 bl 200028 <GET32>
20009c: 12000000 and w0, w0, #0x1
2000a0: a8c17bfd ldp x29, x30, [sp],#16
2000a4: d65f03c0 ret
00000000002000a8 <uart_send>:
2000a8: a9be7bfd stp x29, x30, [sp,#-32]!
2000ac: 910003fd mov x29, sp
2000b0: f9000bf3 str x19, [sp,#16]
2000b4: 2a0003f3 mov w19, w0
2000b8: 528a0a80 mov w0, #0x5054 // #20564
2000bc: 72a7e420 movk w0, #0x3f21, lsl #16
2000c0: 97ffffda bl 200028 <GET32>
2000c4: 362fffa0 tbz w0, #5, 2000b8 <uart_send+0x10>
2000c8: 2a1303e1 mov w1, w19
2000cc: 528a0800 mov w0, #0x5040 // #20544
2000d0: f9400bf3 ldr x19, [sp,#16]
2000d4: 72a7e420 movk w0, #0x3f21, lsl #16
2000d8: a8c27bfd ldp x29, x30, [sp],#32
2000dc: 17ffffd1 b 200020 <PUT32>
00000000002000e0 <uart_flush>:
2000e0: a9bf7bfd stp x29, x30, [sp,#-16]!
2000e4: 910003fd mov x29, sp
2000e8: 528a0a80 mov w0, #0x5054 // #20564
2000ec: 72a7e420 movk w0, #0x3f21, lsl #16
2000f0: 97ffffce bl 200028 <GET32>
2000f4: 3747ffa0 tbnz w0, #8, 2000e8 <uart_flush+0x8>
2000f8: a8c17bfd ldp x29, x30, [sp],#16
2000fc: d65f03c0 ret
0000000000200100 <hexstrings>:
200100: a9be7bfd stp x29, x30, [sp,#-32]!
200104: 910003fd mov x29, sp
200108: a90153f3 stp x19, x20, [sp,#16]
20010c: 2a0003f4 mov w20, w0
200110: 52800413 mov w19, #0x20 // #32
200114: 51001273 sub w19, w19, #0x4
200118: 1ad32681 lsr w1, w20, w19
20011c: 12000c21 and w1, w1, #0xf
200120: 1100dc20 add w0, w1, #0x37
200124: 1100c022 add w2, w1, #0x30
200128: 7100283f cmp w1, #0xa
20012c: 1a803040 csel w0, w2, w0, cc
200130: 97ffffde bl 2000a8 <uart_send>
200134: 35ffff13 cbnz w19, 200114 <hexstrings+0x14>
200138: a94153f3 ldp x19, x20, [sp,#16]
20013c: a8c27bfd ldp x29, x30, [sp],#32
200140: 52800400 mov w0, #0x20 // #32
200144: 17ffffd9 b 2000a8 <uart_send>
0000000000200148 <hexstring>:
200148: a9bf7bfd stp x29, x30, [sp,#-16]!
20014c: 910003fd mov x29, sp
200150: 97ffffec bl 200100 <hexstrings>
200154: 528001a0 mov w0, #0xd // #13
200158: 97ffffd4 bl 2000a8 <uart_send>
20015c: a8c17bfd ldp x29, x30, [sp],#16
200160: 52800140 mov w0, #0xa // #10
200164: 17ffffd1 b 2000a8 <uart_send>
0000000000200168 <uart_init>:
200168: a9be7bfd stp x29, x30, [sp,#-32]!
20016c: 528a0080 mov w0, #0x5004 // #20484
200170: 52800021 mov w1, #0x1 // #1
200174: 910003fd mov x29, sp
200178: 72a7e420 movk w0, #0x3f21, lsl #16
20017c: f9000bf3 str x19, [sp,#16]
200180: 97ffffa8 bl 200020 <PUT32>
200184: 528a0880 mov w0, #0x5044 // #20548
200188: 52800001 mov w1, #0x0 // #0
20018c: 72a7e420 movk w0, #0x3f21, lsl #16
200190: 52800013 mov w19, #0x0 // #0
200194: 97ffffa3 bl 200020 <PUT32>
200198: 528a0c00 mov w0, #0x5060 // #20576
20019c: 52800001 mov w1, #0x0 // #0
2001a0: 72a7e420 movk w0, #0x3f21, lsl #16
2001a4: 97ffff9f bl 200020 <PUT32>
2001a8: 528a0980 mov w0, #0x504c // #20556
2001ac: 52800061 mov w1, #0x3 // #3
2001b0: 72a7e420 movk w0, #0x3f21, lsl #16
2001b4: 97ffff9b bl 200020 <PUT32>
2001b8: 528a0a00 mov w0, #0x5050 // #20560
2001bc: 52800001 mov w1, #0x0 // #0
2001c0: 72a7e420 movk w0, #0x3f21, lsl #16
2001c4: 97ffff97 bl 200020 <PUT32>
2001c8: 528a0880 mov w0, #0x5044 // #20548
2001cc: 52800001 mov w1, #0x0 // #0
2001d0: 72a7e420 movk w0, #0x3f21, lsl #16
2001d4: 97ffff93 bl 200020 <PUT32>
2001d8: 528a0900 mov w0, #0x5048 // #20552
2001dc: 528018c1 mov w1, #0xc6 // #198
2001e0: 72a7e420 movk w0, #0x3f21, lsl #16
2001e4: 97ffff8f bl 200020 <PUT32>
2001e8: 528a0d00 mov w0, #0x5068 // #20584
2001ec: 528021c1 mov w1, #0x10e // #270
2001f0: 72a7e420 movk w0, #0x3f21, lsl #16
2001f4: 97ffff8b bl 200020 <PUT32>
2001f8: 52800080 mov w0, #0x4 // #4
2001fc: 72a7e400 movk w0, #0x3f20, lsl #16
200200: 97ffff8a bl 200028 <GET32>
200204: 120e6402 and w2, w0, #0xfffc0fff
200208: 52840001 mov w1, #0x2000 // #8192
20020c: 52800080 mov w0, #0x4 // #4
200210: 72a00021 movk w1, #0x1, lsl #16
200214: 72a7e400 movk w0, #0x3f20, lsl #16
200218: 2a010041 orr w1, w2, w1
20021c: 97ffff81 bl 200020 <PUT32>
200220: 52801280 mov w0, #0x94 // #148
200224: 52800001 mov w1, #0x0 // #0
200228: 72a7e400 movk w0, #0x3f20, lsl #16
20022c: 97ffff7d bl 200020 <PUT32>
200230: 2a1303e0 mov w0, w19
200234: 11000673 add w19, w19, #0x1
200238: 97ffff82 bl 200040 <dummy>
20023c: 71025a7f cmp w19, #0x96
200240: 54ffff81 b.ne 200230 <uart_init+0xc8>
200244: 52801300 mov w0, #0x98 // #152
200248: 52980001 mov w1, #0xc000 // #49152
20024c: 72a7e400 movk w0, #0x3f20, lsl #16
200250: 52800013 mov w19, #0x0 // #0
200254: 97ffff73 bl 200020 <PUT32>
200258: 2a1303e0 mov w0, w19
20025c: 11000673 add w19, w19, #0x1
200260: 97ffff78 bl 200040 <dummy>
200264: 71025a7f cmp w19, #0x96
200268: 54ffff81 b.ne 200258 <uart_init+0xf0>
20026c: 52801300 mov w0, #0x98 // #152
200270: 52800001 mov w1, #0x0 // #0
200274: 72a7e400 movk w0, #0x3f20, lsl #16
200278: 97ffff6a bl 200020 <PUT32>
20027c: f9400bf3 ldr x19, [sp,#16]
200280: 528a0c00 mov w0, #0x5060 // #20576
200284: 52800061 mov w1, #0x3 // #3
200288: a8c27bfd ldp x29, x30, [sp],#32
20028c: 72a7e420 movk w0, #0x3f21, lsl #16
200290: 17ffff64 b 200020 <PUT32>
200294: d503201f nop
0000000000200298 <timer_init>:
200298: a9be7bfd stp x29, x30, [sp,#-32]!
20029c: 52a01f21 mov w1, #0xf90000 // #16318464
2002a0: 910003fd mov x29, sp
2002a4: f9000bf3 str x19, [sp,#16]
2002a8: 52968113 mov w19, #0xb408 // #46088
2002ac: 72a7e013 movk w19, #0x3f00, lsl #16
2002b0: 2a1303e0 mov w0, w19
2002b4: 97ffff5b bl 200020 <PUT32>
2002b8: 2a1303e0 mov w0, w19
2002bc: 52804001 mov w1, #0x200 // #512
2002c0: f9400bf3 ldr x19, [sp,#16]
2002c4: 72a01f21 movk w1, #0xf9, lsl #16
2002c8: a8c27bfd ldp x29, x30, [sp],#32
2002cc: 17ffff55 b 200020 <PUT32>
00000000002002d0 <timer_tick>:
2002d0: 52968400 mov w0, #0xb420 // #46112
2002d4: 72a7e000 movk w0, #0x3f00, lsl #16
2002d8: 17ffff54 b 200028 <GET32>
2002dc: d503201f nop
00000000002002e0 <notmain>:
2002e0: a9bb7bfd stp x29, x30, [sp,#-80]!
2002e4: 910003fd mov x29, sp
2002e8: a90153f3 stp x19, x20, [sp,#16]
2002ec: a9025bf5 stp x21, x22, [sp,#32]
2002f0: a90363f7 stp x23, x24, [sp,#48]
2002f4: a9046bf9 stp x25, x26, [sp,#64]
2002f8: 97ffff9c bl 200168 <uart_init>
2002fc: 90000015 adrp x21, 200000 <skip>
200300: 528acf00 mov w0, #0x5678 // #22136
200304: 52800018 mov w24, #0x0 // #0
200308: 72a24680 movk w0, #0x1234, lsl #16
20030c: 52800017 mov w23, #0x0 // #0
200310: 5280001a mov w26, #0x0 // #0
200314: 52800014 mov w20, #0x0 // #0
200318: 97ffff8c bl 200148 <hexstring>
20031c: 52800016 mov w22, #0x0 // #0
200320: 97ffff44 bl 200030 <GETPC>
200324: 52800013 mov w19, #0x0 // #0
200328: 97ffff88 bl 200148 <hexstring>
20032c: 52800139 mov w25, #0x9 // #9
200330: 52800920 mov w0, #0x49 // #73
200334: 911482b5 add x21, x21, #0x520
200338: 97ffff5c bl 2000a8 <uart_send>
20033c: 52800900 mov w0, #0x48 // #72
200340: 97ffff5a bl 2000a8 <uart_send>
200344: 528008a0 mov w0, #0x45 // #69
200348: 97ffff58 bl 2000a8 <uart_send>
20034c: 52800b00 mov w0, #0x58 // #88
200350: 97ffff56 bl 2000a8 <uart_send>
200354: 528001a0 mov w0, #0xd // #13
200358: 97ffff54 bl 2000a8 <uart_send>
20035c: 52800140 mov w0, #0xa // #10
200360: 97ffff52 bl 2000a8 <uart_send>
200364: 97ffff3d bl 200058 <uart_recv>
200368: 7100e81f cmp w0, #0x3a
20036c: 54000340 b.eq 2003d4 <notmain+0xf4>
200370: 7100281f cmp w0, #0xa
200374: 7a4d1804 ccmp w0, #0xd, #0x4, ne
200378: 54000360 b.eq 2003e4 <notmain+0x104>
20037c: 121a7801 and w1, w0, #0xffffffdf
200380: 71011c3f cmp w1, #0x47
200384: 54000820 b.eq 200488 <notmain+0x1a8>
200388: 51000661 sub w1, w19, #0x1
20038c: 7100503f cmp w1, #0x14
200390: 54fffea8 b.hi 200364 <notmain+0x84>
200394: 38614aa1 ldrb w1, [x21,w1,uxtw]
200398: 10000062 adr x2, 2003a4 <notmain+0xc4>
20039c: 8b218841 add x1, x2, w1, sxtb #2
2003a0: d61f0020 br x1
2003a4: d503201f nop
2003a8: 7100e81f cmp w0, #0x3a
2003ac: 51001c01 sub w1, w0, #0x7
2003b0: 1a802020 csel w0, w1, w0, cs
2003b4: 7100567f cmp w19, #0x15
2003b8: 12000c00 and w0, w0, #0xf
2003bc: 2a171017 orr w23, w0, w23, lsl #4
2003c0: 540009c0 b.eq 2004f8 <notmain+0x218>
2003c4: 97ffff25 bl 200058 <uart_recv>
2003c8: 7100e81f cmp w0, #0x3a
2003cc: 11000673 add w19, w19, #0x1
2003d0: 54fffd01 b.ne 200370 <notmain+0x90>
2003d4: 52800033 mov w19, #0x1 // #1
2003d8: 17ffffe3 b 200364 <notmain+0x84>
2003dc: d503201f nop
2003e0: 531c6f5a lsl w26, w26, #4
2003e4: 52800013 mov w19, #0x0 // #0
2003e8: 17ffffdf b 200364 <notmain+0x84>
2003ec: d503201f nop
2003f0: 51001c01 sub w1, w0, #0x7
2003f4: 7100e81f cmp w0, #0x3a
2003f8: 1a802020 csel w0, w1, w0, cs
2003fc: 11000673 add w19, w19, #0x1
200400: 12000c00 and w0, w0, #0xf
200404: 2a1a1000 orr w0, w0, w26, lsl #4
200408: 12003c1a and w26, w0, #0xffff
20040c: 17ffffd6 b 200364 <notmain+0x84>
200410: 7100e81f cmp w0, #0x3a
200414: 51001c01 sub w1, w0, #0x7
200418: 1a802020 csel w0, w1, w0, cs
20041c: 12000c00 and w0, w0, #0xf
200420: 2a141014 orr w20, w0, w20, lsl #4
200424: 12001e94 and w20, w20, #0xff
200428: 7100069f cmp w20, #0x1
20042c: 540005e0 b.eq 2004e8 <notmain+0x208>
200430: 34000594 cbz w20, 2004e0 <notmain+0x200>
200434: 71000a9f cmp w20, #0x2
200438: 1a9f0333 csel w19, w25, wzr, eq
20043c: 17ffffca b 200364 <notmain+0x84>
200440: 51001c01 sub w1, w0, #0x7
200444: 7100e81f cmp w0, #0x3a
200448: 1a802020 csel w0, w1, w0, cs
20044c: 52800113 mov w19, #0x8 // #8
200450: 12000c00 and w0, w0, #0xf
200454: 2a141014 orr w20, w0, w20, lsl #4
200458: 12001e94 and w20, w20, #0xff
20045c: 17ffffc2 b 200364 <notmain+0x84>
200460: 51001c01 sub w1, w0, #0x7
200464: 7100e81f cmp w0, #0x3a
200468: 1a802020 csel w0, w1, w0, cs
20046c: 11000673 add w19, w19, #0x1
200470: 12000c00 and w0, w0, #0xf
200474: 2a161016 orr w22, w0, w22, lsl #4
200478: 12003ed6 and w22, w22, #0xffff
20047c: 2a160356 orr w22, w26, w22
200480: 17ffffb9 b 200364 <notmain+0x84>
200484: d503201f nop
200488: 528001a0 mov w0, #0xd // #13
20048c: 97ffff07 bl 2000a8 <uart_send>
200490: 528005a0 mov w0, #0x2d // #45
200494: 97ffff05 bl 2000a8 <uart_send>
200498: 528005a0 mov w0, #0x2d // #45
20049c: 97ffff03 bl 2000a8 <uart_send>
2004a0: 528001a0 mov w0, #0xd // #13
2004a4: 97ffff01 bl 2000a8 <uart_send>
2004a8: 52800140 mov w0, #0xa // #10
2004ac: 97fffeff bl 2000a8 <uart_send>
2004b0: 52800140 mov w0, #0xa // #10
2004b4: 97fffefd bl 2000a8 <uart_send>
2004b8: 52900000 mov w0, #0x8000 // #32768
2004bc: 97fffedf bl 200038 <BRANCHTO>
2004c0: 52800000 mov w0, #0x0 // #0
2004c4: a94153f3 ldp x19, x20, [sp,#16]
2004c8: a9425bf5 ldp x21, x22, [sp,#32]
2004cc: a94363f7 ldp x23, x24, [sp,#48]
2004d0: a9446bf9 ldp x25, x26, [sp,#64]
2004d4: a8c57bfd ldp x29, x30, [sp],#80
2004d8: d65f03c0 ret
2004dc: d503201f nop
2004e0: 528001d3 mov w19, #0xe // #14
2004e4: 17ffffa0 b 200364 <notmain+0x84>
2004e8: 2a1803e0 mov w0, w24
2004ec: 52800013 mov w19, #0x0 // #0
2004f0: 97ffff16 bl 200148 <hexstring>
2004f4: 17ffff9c b 200364 <notmain+0x84>
2004f8: 5ac00af7 rev w23, w23
2004fc: 2a1603e0 mov w0, w22
200500: 2a1703e1 mov w1, w23
200504: 0b1802d8 add w24, w22, w24
200508: 528001d3 mov w19, #0xe // #14
20050c: 0b1802f8 add w24, w23, w24
200510: 97fffec4 bl 200020 <PUT32>
200514: 110012d6 add w22, w22, #0x4
200518: 17ffff93 b 200364 <notmain+0x84>
20051c: d503201f nop
Disassembly of section .rodata:
0000000000200520 <.rodata>:
200520: 2f2f0808 .word 0x2f2f0808
200524: 1b272f2f .word 0x1b272f2f
200528: 13131313 .word 0x13131313
20052c: 0101010f .word 0x0101010f
200530: 01010101 .word 0x01010101
200534: 00000001 .word 0x00000001
Disassembly of section .comment:
0000000000000000 <.comment>:
0: 3a434347 ccmn w26, w3, #0x7, mi
4: 4e472820 trn1 v0.8h, v1.8h, v7.8h
8: 35202955 cbnz w21, 40530 <_start+0x40530>
c: 302e332e adr x14, 5c671 <_start+0x5c671>
...

2
aarch64/bootloader07/config.txt
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arm_control=0x200
kernel_old=1

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aarch64/bootloader07/kernel7.img
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12
aarch64/bootloader07/loader
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@@ -1,12 +0,0 @@
MEMORY
{
ram : ORIGIN = 0x0000, LENGTH = 0x1000000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

150
aarch64/bootloader07/periph.c
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@@ -1,150 +0,0 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#define PBASE 0x3F000000
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_CTL (PBASE+0x0000B408)
#define ARM_TIMER_CNT (PBASE+0x0000B420)
#define GPFSEL1 (PBASE+0x00200004)
#define GPSET0 (PBASE+0x0020001C)
#define GPCLR0 (PBASE+0x00200028)
#define GPPUD (PBASE+0x00200094)
#define GPPUDCLK0 (PBASE+0x00200098)
#define AUX_ENABLES (PBASE+0x00215004)
#define AUX_MU_IO_REG (PBASE+0x00215040)
#define AUX_MU_IER_REG (PBASE+0x00215044)
#define AUX_MU_IIR_REG (PBASE+0x00215048)
#define AUX_MU_LCR_REG (PBASE+0x0021504C)
#define AUX_MU_MCR_REG (PBASE+0x00215050)
#define AUX_MU_LSR_REG (PBASE+0x00215054)
#define AUX_MU_MSR_REG (PBASE+0x00215058)
#define AUX_MU_SCRATCH (PBASE+0x0021505C)
#define AUX_MU_CNTL_REG (PBASE+0x00215060)
#define AUX_MU_STAT_REG (PBASE+0x00215064)
#define AUX_MU_BAUD_REG (PBASE+0x00215068)
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//------------------------------------------------------------------------
unsigned int uart_lcr ( void )
{
return(GET32(AUX_MU_LSR_REG));
}
//------------------------------------------------------------------------
unsigned int uart_recv ( void )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
return(GET32(AUX_MU_IO_REG)&0xFF);
}
//------------------------------------------------------------------------
unsigned int uart_check ( void )
{
if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
return(0);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_send(rc);
if(rb==0) break;
}
uart_send(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_send(0x0D);
uart_send(0x0A);
}
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
void timer_init ( void )
{
//0xF9+1 = 250
//250MHz/250 = 1MHz
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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aarch64/bootloader07/periph7.o
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aarch64/bootloader07/vectors.o
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62
aarch64/bootloader07/vectors.s
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@@ -1,62 +0,0 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
.globl _start
_start:
b skip
.space 0x200000-0x0004,0
skip:
mrs x0,mpidr_el1
mov x1,#0xC1000000
bic x0,x0,x1
cbz x0,master
b hang
master:
mov sp,#0x08000000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str w1,[x0]
ret
.globl GET32
GET32:
ldr w0,[x0]
ret
.globl GETPC
GETPC:
mov x0,x30
ret
.globl BRANCHTO
BRANCHTO:
mov w30,w0
ret
.globl dummy
dummy:
ret
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

40
aarch64/uart02/Makefile
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@@ -1,40 +0,0 @@
ARMGNU ?= aarch64-none-elf
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : uart02.hex uart02.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
uart02.o : uart02.c
$(ARMGNU)-gcc $(COPS) -c uart02.c -o uart02.o
uart02.elf : memmap vectors.o uart02.o
$(ARMGNU)-ld vectors.o uart02.o -T memmap -o uart02.elf
$(ARMGNU)-objdump -D uart02.elf > uart02.list
uart02.bin : uart02.elf
$(ARMGNU)-objcopy uart02.elf -O binary uart02.bin
uart02.hex : uart02.elf
$(ARMGNU)-objcopy uart02.elf -O ihex uart02.hex

21
aarch64/uart02/README
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@@ -1,21 +0,0 @@
See the top level README for information on where to find the
schematic and programmers reference manual for the ARM processor
on the raspberry pi. Also find information on how to load and run
these programs.
Based on uart01, this one enables the uart rxd1 receiver (gpio15).
It starts by printing 12345678 then whatever you type on the terminal
is echoed back.
See the top level README file for information on how to connect the
raspi uart to your host computer.
Using a dumb terminal (minicom) 115200 board No parity 8 bits 1 stop
bit, no flow control (might have to exit minicom and start again for
the flow control setting to take). What you type on the dumb terminal
comes back.
This is an aarch64 example. It is meant to be loaded using the
bootloader07 (64bit) bootloader. It is specifically for the
raspberry pi 3.

12
aarch64/uart02/memmap
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@@ -1,12 +0,0 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

159
aarch64/uart02/uart02.c
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@@ -1,159 +0,0 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define GPFSEL1 0x3F200004
#define GPSET0 0x3F20001C
#define GPCLR0 0x3F200028
#define GPPUD 0x3F200094
#define GPPUDCLK0 0x3F200098
#define AUX_ENABLES 0x3F215004
#define AUX_MU_IO_REG 0x3F215040
#define AUX_MU_IER_REG 0x3F215044
#define AUX_MU_IIR_REG 0x3F215048
#define AUX_MU_LCR_REG 0x3F21504C
#define AUX_MU_MCR_REG 0x3F215050
#define AUX_MU_LSR_REG 0x3F215054
#define AUX_MU_MSR_REG 0x3F215058
#define AUX_MU_SCRATCH 0x3F21505C
#define AUX_MU_CNTL_REG 0x3F215060
#define AUX_MU_STAT_REG 0x3F215064
#define AUX_MU_BAUD_REG 0x3F215068
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//alt function 5 for uart1
//alt function 0 for uart0
//((250,000,000/115200)/8)-1 = 270
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//------------------------------------------------------------------------
unsigned int uart_lcr ( void )
{
return(GET32(AUX_MU_LSR_REG));
}
//------------------------------------------------------------------------
unsigned int uart_recv ( void )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
return(GET32(AUX_MU_IO_REG)&0xFF);
}
//------------------------------------------------------------------------
unsigned int uart_check ( void )
{
if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
return(0);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_send(rc);
if(rb==0) break;
}
uart_send(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_send(0x0D);
uart_send(0x0A);
}
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
int notmain ( unsigned int pc )
{
unsigned int ra;
uart_init();
hexstring(0x12345678);
hexstring(0x87654321);
hexstring(pc);
while(1)
{
ra=uart_recv();
if(ra==0x0D) uart_send(0x0A);
uart_send(ra);
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

43
aarch64/uart02/vectors.s
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@@ -1,43 +0,0 @@
.globl _start
_start:
mrs x0,mpidr_el1
mov x1,#0xC1000000
bic x0,x0,x1
cbz x0,master
b hang
master:
mov sp,#0x8000
bl skip
skip:
mov x0,x30
bl notmain
hang: b hang
.globl PUT32
PUT32:
str w1,[x0]
ret
.globl GET32
GET32:
ldr w0,[x0]
ret
.globl dummy
dummy:
ret
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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blinker02/blinker02.bin
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blinker02/blinker02.clang.bc
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blinker02/blinker02.clang.bin
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11
blinker02/blinker02.clang.hex
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@@ -1,11 +0,0 @@
:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
:1080200010482DE954409FE504B08DE20400A0E122
:10803000F7FFFFEB0707C0E3011780E30400A0E1AF
:10804000F1FFFFEB38009FE50118A0E3EEFFFFEB27
:1080500030009FE5EEFFFFEB010510E3FBFFFF0A99
:1080600024009FE50118A0E3E7FFFFEB14009FE564
:10807000E7FFFFEB010510E3FBFFFF1AF0FFFFEA4C
:10808000040020201C002020043000202800202094
:040000030000800079
:00000001FF

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86
blinker02/blinker02.clang.opt.list
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@@ -1,86 +0,0 @@
blinker02.clang.opt.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e3a0d902 mov sp, #32768 ; 0x8000
8004: eb000005 bl 8020 <notmain>
00008008 <hang>:
8008: eafffffe b 8008 <hang>
0000800c <PUT32>:
800c: e5801000 str r1, [r0]
8010: e12fff1e bx lr
00008014 <GET32>:
8014: e5900000 ldr r0, [r0]
8018: e12fff1e bx lr
0000801c <dummy>:
801c: e12fff1e bx lr
00008020 <notmain>:
8020: e92d4810 push {r4, fp, lr}
8024: e59f4054 ldr r4, [pc, #84] ; 8080 <notmain+0x60>
8028: e28db004 add fp, sp, #4
802c: e1a00004 mov r0, r4
8030: ebfffff7 bl 8014 <GET32>
8034: e3c00707 bic r0, r0, #1835008 ; 0x1c0000
8038: e3801701 orr r1, r0, #262144 ; 0x40000
803c: e1a00004 mov r0, r4
8040: ebfffff1 bl 800c <PUT32>
8044: e59f0038 ldr r0, [pc, #56] ; 8084 <notmain+0x64>
8048: e3a01801 mov r1, #65536 ; 0x10000
804c: ebffffee bl 800c <PUT32>
8050: e59f0030 ldr r0, [pc, #48] ; 8088 <notmain+0x68>
8054: ebffffee bl 8014 <GET32>
8058: e3100501 tst r0, #4194304 ; 0x400000
805c: 0afffffb beq 8050 <notmain+0x30>
8060: e59f0024 ldr r0, [pc, #36] ; 808c <notmain+0x6c>
8064: e3a01801 mov r1, #65536 ; 0x10000
8068: ebffffe7 bl 800c <PUT32>
806c: e59f0014 ldr r0, [pc, #20] ; 8088 <notmain+0x68>
8070: ebffffe7 bl 8014 <GET32>
8074: e3100501 tst r0, #4194304 ; 0x400000
8078: 1afffffb bne 806c <notmain+0x4c>
807c: eafffff0 b 8044 <notmain+0x24>
8080: 20200004 eorcs r0, r0, r4
8084: 2020001c eorcs r0, r0, ip, lsl r0
8088: 20003004 andcs r3, r0, r4
808c: 20200028 eorcs r0, r0, r8, lsr #32
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002f41 andeq r2, r0, r1, asr #30
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000025 andeq r0, r0, r5, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 36373131 ; <UNDEFINED> instruction: 0x36373131
18: 2d465a4a vstrcs s11, [r6, #-296] ; 0xfffffed8
1c: 06060053 ; <UNDEFINED> instruction: 0x06060053
20: 01090108 tsteq r9, r8, lsl #2
24: 0114020a tsteq r4, sl, lsl #4
28: 03170115 tsteq r7, #1073741829 ; 0x40000005
2c: 01440118 cmpeq r4, r8, lsl r1
Disassembly of section .comment:
00000000 <.comment>:
0: 6e616c63 cdpvs 12, 6, cr6, cr1, cr3, {3}
4: 65762067 ldrbvs r2, [r6, #-103]! ; 0x67
8: 6f697372 svcvs 0x00697372
c: 2e33206e cdpcs 0, 3, cr2, cr3, cr14, {3}
10: 62282034 eorvs r2, r8, #52 ; 0x34
14: 636e6172 cmnvs lr, #-2147483620 ; 0x8000001c
18: 2f736568 svccs 0x00736568
1c: 656c6572 strbvs r6, [ip, #-1394]! ; 0x572
20: 5f657361 svcpl 0x00657361
24: 32203433 eorcc r3, r0, #855638016 ; 0x33000000
28: 36303130 ; <UNDEFINED> instruction: 0x36303130
2c: Address 0x000000000000002c is out of bounds.

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blinker02/blinker02.clang.opt.s
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@@ -1,68 +0,0 @@
.syntax unified
.cpu arm1176jzf-s
.eabi_attribute 6, 6
.eabi_attribute 8, 1
.fpu vfpv2
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.file "blinker02.clang.opt.bc"
.text
.globl notmain
.align 2
.type notmain,%function
notmain: @ @notmain
@ BB#0: @ %entry
push {r4, r11, lr}
ldr r4, .LCPI0_0
add r11, sp, #4
mov r0, r4
bl GET32
bic r0, r0, #1835008
orr r1, r0, #262144
mov r0, r4
bl PUT32
.LBB0_1: @ %while.body
@ =>This Loop Header: Depth=1
@ Child Loop BB0_2 Depth 2
@ Child Loop BB0_4 Depth 2
ldr r0, .LCPI0_1
mov r1, #65536
bl PUT32
.LBB0_2: @ %while.body2
@ Parent Loop BB0_1 Depth=1
@ => This Inner Loop Header: Depth=2
ldr r0, .LCPI0_2
bl GET32
tst r0, #4194304
beq .LBB0_2
@ BB#3: @ %while.end
@ in Loop: Header=BB0_1 Depth=1
ldr r0, .LCPI0_3
mov r1, #65536
bl PUT32
.LBB0_4: @ %while.body6
@ Parent Loop BB0_1 Depth=1
@ => This Inner Loop Header: Depth=2
ldr r0, .LCPI0_2
bl GET32
tst r0, #4194304
bne .LBB0_4
b .LBB0_1
.align 2
@ BB#5:
.LCPI0_0:
.long 538968068 @ 0x20200004
.LCPI0_1:
.long 538968092 @ 0x2020001c
.LCPI0_2:
.long 536883204 @ 0x20003004
.LCPI0_3:
.long 538968104 @ 0x20200028
.Ltmp0:
.size notmain, .Ltmp0-notmain
.ident "clang version 3.4 (branches/release_34 201060)"

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blinker02/blinker02.hex
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:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
:1080200008402DE94C009FE5F9FFFFEB0717C0E37F
:10803000011781E33C009FE5F3FFFFEB38009FE56C
:108040000118A0E3F0FFFFEB30009FE5F0FFFFEB2E
:10805000010510E3FBFFFF0A24009FE50118A0E3E0
:10806000E9FFFFEB14009FE5E9FFFFEB010510E3DB
:10807000FBFFFF1AF0FFFFEA040020201C00202075
:0880800004300020280020203C
:040000030000800079
:00000001FF

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blinker02/blinker02.list
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blinker02.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e3a0d902 mov sp, #32768 ; 0x8000
8004: eb000005 bl 8020 <notmain>
00008008 <hang>:
8008: eafffffe b 8008 <hang>
0000800c <PUT32>:
800c: e5801000 str r1, [r0]
8010: e12fff1e bx lr
00008014 <GET32>:
8014: e5900000 ldr r0, [r0]
8018: e12fff1e bx lr
0000801c <dummy>:
801c: e12fff1e bx lr
00008020 <notmain>:
8020: e92d4008 push {r3, lr}
8024: e59f004c ldr r0, [pc, #76] ; 8078 <notmain+0x58>
8028: ebfffff9 bl 8014 <GET32>
802c: e3c01707 bic r1, r0, #1835008 ; 0x1c0000
8030: e3811701 orr r1, r1, #262144 ; 0x40000
8034: e59f003c ldr r0, [pc, #60] ; 8078 <notmain+0x58>
8038: ebfffff3 bl 800c <PUT32>
803c: e59f0038 ldr r0, [pc, #56] ; 807c <notmain+0x5c>
8040: e3a01801 mov r1, #65536 ; 0x10000
8044: ebfffff0 bl 800c <PUT32>
8048: e59f0030 ldr r0, [pc, #48] ; 8080 <notmain+0x60>
804c: ebfffff0 bl 8014 <GET32>
8050: e3100501 tst r0, #4194304 ; 0x400000
8054: 0afffffb beq 8048 <notmain+0x28>
8058: e59f0024 ldr r0, [pc, #36] ; 8084 <notmain+0x64>
805c: e3a01801 mov r1, #65536 ; 0x10000
8060: ebffffe9 bl 800c <PUT32>
8064: e59f0014 ldr r0, [pc, #20] ; 8080 <notmain+0x60>
8068: ebffffe9 bl 8014 <GET32>
806c: e3100501 tst r0, #4194304 ; 0x400000
8070: 1afffffb bne 8064 <notmain+0x44>
8074: eafffff0 b 803c <notmain+0x1c>
8078: 20200004 eorcs r0, r0, r4
807c: 2020001c eorcs r0, r0, ip, lsl r0
8080: 20003004 andcs r3, r0, r4
8084: 20200028 eorcs r0, r0, r8, lsr #32
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002a41 andeq r2, r0, r1, asr #20
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0x620
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0x404
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0x10c8d04>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 34202955 strtcc r2, [r0], #-2389 ; 0x955
c: 322e382e eorcc r3, lr, #3014656 ; 0x2e0000
...

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blinker03/Makefile
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@@ -44,7 +44,8 @@ LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
#OOPS = -std-compile-opts
OOPS = -std-link-opts
clang : blinker03.clang.hex blinker03.clang.bin

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:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
:10802000F0402DE9A4409FE50400A0E1F8FFFFEB3C
:108030000707C0E3011780E30400A0E1F2FFFFEBB4
:108040008C409FE5F918A0E30400A0E1EEFFFFEBF0
:10805000021CA0E3F91881E30400A0E1EAFFFFEBB2
:1080600070009FE5EAFFFFEB095CA0E3126CA0E360
:108070000040A0E13D5885E37A6886E3000000EA0D
:10808000064084E050009FE50118A0E3DEFFFFEB0F
:1080900040009FE5DEFFFFEB040040E0050050E1FB
:1080A000FAFFFF3A34009FE50118A0E3D6FFFFEB8B
:1080B0002C009FE5047040E018009FE5D4FFFFEB23
:1080C000000087E0050050E1FAFFFF3AEBFFFFEA0E
:1080D0000400202008B4002020B400201C00202030
:0880E0002800202000F7C2FF78
:040000030000800079
:00000001FF

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blinker03/blinker03.clang.opt.list
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blinker03.clang.opt.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e3a0d902 mov sp, #32768 ; 0x8000
8004: eb000005 bl 8020 <notmain>
00008008 <hang>:
8008: eafffffe b 8008 <hang>
0000800c <PUT32>:
800c: e5801000 str r1, [r0]
8010: e12fff1e bx lr
00008014 <GET32>:
8014: e5900000 ldr r0, [r0]
8018: e12fff1e bx lr
0000801c <dummy>:
801c: e12fff1e bx lr
00008020 <notmain>:
8020: e92d40f0 push {r4, r5, r6, r7, lr}
8024: e59f40a4 ldr r4, [pc, #164] ; 80d0 <notmain+0xb0>
8028: e1a00004 mov r0, r4
802c: ebfffff8 bl 8014 <GET32>
8030: e3c00707 bic r0, r0, #1835008 ; 0x1c0000
8034: e3801701 orr r1, r0, #262144 ; 0x40000
8038: e1a00004 mov r0, r4
803c: ebfffff2 bl 800c <PUT32>
8040: e59f408c ldr r4, [pc, #140] ; 80d4 <notmain+0xb4>
8044: e3a018f9 mov r1, #16318464 ; 0xf90000
8048: e1a00004 mov r0, r4
804c: ebffffee bl 800c <PUT32>
8050: e3a01c02 mov r1, #512 ; 0x200
8054: e38118f9 orr r1, r1, #16318464 ; 0xf90000
8058: e1a00004 mov r0, r4
805c: ebffffea bl 800c <PUT32>
8060: e59f0070 ldr r0, [pc, #112] ; 80d8 <notmain+0xb8>
8064: ebffffea bl 8014 <GET32>
8068: e3a05c09 mov r5, #2304 ; 0x900
806c: e3a06c12 mov r6, #4608 ; 0x1200
8070: e1a04000 mov r4, r0
8074: e385583d orr r5, r5, #3997696 ; 0x3d0000
8078: e386687a orr r6, r6, #7995392 ; 0x7a0000
807c: ea000000 b 8084 <notmain+0x64>
8080: e0844006 add r4, r4, r6
8084: e59f0050 ldr r0, [pc, #80] ; 80dc <notmain+0xbc>
8088: e3a01801 mov r1, #65536 ; 0x10000
808c: ebffffde bl 800c <PUT32>
8090: e59f0040 ldr r0, [pc, #64] ; 80d8 <notmain+0xb8>
8094: ebffffde bl 8014 <GET32>
8098: e0400004 sub r0, r0, r4
809c: e1500005 cmp r0, r5
80a0: 3afffffa bcc 8090 <notmain+0x70>
80a4: e59f0034 ldr r0, [pc, #52] ; 80e0 <notmain+0xc0>
80a8: e3a01801 mov r1, #65536 ; 0x10000
80ac: ebffffd6 bl 800c <PUT32>
80b0: e59f002c ldr r0, [pc, #44] ; 80e4 <notmain+0xc4>
80b4: e0407004 sub r7, r0, r4
80b8: e59f0018 ldr r0, [pc, #24] ; 80d8 <notmain+0xb8>
80bc: ebffffd4 bl 8014 <GET32>
80c0: e0870000 add r0, r7, r0
80c4: e1500005 cmp r0, r5
80c8: 3afffffa bcc 80b8 <notmain+0x98>
80cc: eaffffeb b 8080 <notmain+0x60>
80d0: 20200004 eorcs r0, r0, r4
80d4: 2000b408 andcs fp, r0, r8, lsl #8
80d8: 2000b420 andcs fp, r0, r0, lsr #8
80dc: 2020001c eorcs r0, r0, ip, lsl r0
80e0: 20200028 eorcs r0, r0, r8, lsr #32
80e4: ffc2f700 ; <UNDEFINED> instruction: 0xffc2f700
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002141 andeq r2, r0, r1, asr #2
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000017 andeq r0, r0, r7, lsl r0
10: 01080206 tsteq r8, r6, lsl #4
14: 020a0109 andeq r0, sl, #1073741826 ; 0x40000002
18: 01150114 tsteq r5, r4, lsl r1
1c: 01180317 tsteq r8, r7, lsl r3
20: Address 0x00000020 is out of bounds.

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blinker03/blinker03.clang.opt.s
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.syntax unified
.eabi_attribute 10, 2
.fpu vfpv2
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.file "blinker03.clang.opt.bc"
.text
.globl notmain
.align 2
.type notmain,%function
notmain: @ @notmain
@ BB#0: @ %entry
push {r4, r5, r6, r7, lr}
ldr r4, .LCPI0_0
mov r0, r4
bl GET32
bic r0, r0, #1835008
orr r1, r0, #262144
mov r0, r4
bl PUT32
ldr r4, .LCPI0_1
mov r1, #16318464
mov r0, r4
bl PUT32
mov r1, #512
orr r1, r1, #16318464
mov r0, r4
bl PUT32
ldr r0, .LCPI0_2
bl GET32
mov r5, #2304
mov r6, #4608
mov r4, r0
orr r5, r5, #3997696
orr r6, r6, #7995392
b .LBB0_2
.LBB0_1: @ %while.end12
@ in Loop: Header=BB0_2 Depth=1
add r4, r4, r6
.LBB0_2: @ %while.body
@ =>This Loop Header: Depth=1
@ Child Loop BB0_5 Depth 2
@ Child Loop BB0_3 Depth 2
ldr r0, .LCPI0_3
mov r1, #65536
bl PUT32
.LBB0_3: @ %while.body3
@ Parent Loop BB0_2 Depth=1
@ => This Inner Loop Header: Depth=2
ldr r0, .LCPI0_2
bl GET32
sub r0, r0, r4
cmp r0, r5
blo .LBB0_3
@ BB#4: @ %while.end
@ in Loop: Header=BB0_2 Depth=1
ldr r0, .LCPI0_4
mov r1, #65536
bl PUT32
ldr r0, .LCPI0_5
sub r7, r0, r4
.LBB0_5: @ %while.body6
@ Parent Loop BB0_2 Depth=1
@ => This Inner Loop Header: Depth=2
ldr r0, .LCPI0_2
bl GET32
add r0, r7, r0
cmp r0, r5
blo .LBB0_5
b .LBB0_1
.align 2
@ BB#6:
.LCPI0_0:
.long 538968068 @ 0x20200004
.LCPI0_1:
.long 536917000 @ 0x2000b408
.LCPI0_2:
.long 536917024 @ 0x2000b420
.LCPI0_3:
.long 538968092 @ 0x2020001c
.LCPI0_4:
.long 538968104 @ 0x20200028
.LCPI0_5:
.long 4290967296 @ 0xffc2f700
.Ltmp0:
.size notmain, .Ltmp0-notmain

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:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
:1080200070402DE98C009FE5F9FFFFEB0717C0E3D7
:10803000011781E37C009FE5F3FFFFEB78009FE5EC
:10804000F918A0E3F0FFFFEB6C009FE56C109FE5D3
:10805000EDFFFFEB68009FE5EDFFFFEB64409FE560
:108060000050A0E160009FE50118A0E3E6FFFFEBF0
:108070004C009FE5E6FFFFEB000065E0040050E1E7
:10808000FAFFFF9A3D6885E240009FE50118A0E3F2
:10809000096C86E2DCFFFFEB24009FE5DCFFFFEBD1
:1080A000002066E0040052E1FAFFFF9A7A5885E268
:1080B000125C85E2EAFFFFEA0400202008B40020F9
:1080C0000002F90020B40020FF083D001C00202021
:0480D0002800202044
:040000030000800079
:00000001FF

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blinker03/blinker03.list
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blinker03.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e3a0d902 mov sp, #32768 ; 0x8000
8004: eb000005 bl 8020 <notmain>
00008008 <hang>:
8008: eafffffe b 8008 <hang>
0000800c <PUT32>:
800c: e5801000 str r1, [r0]
8010: e12fff1e bx lr
00008014 <GET32>:
8014: e5900000 ldr r0, [r0]
8018: e12fff1e bx lr
0000801c <dummy>:
801c: e12fff1e bx lr
00008020 <notmain>:
8020: e92d4070 push {r4, r5, r6, lr}
8024: e59f008c ldr r0, [pc, #140] ; 80b8 <notmain+0x98>
8028: ebfffff9 bl 8014 <GET32>
802c: e3c01707 bic r1, r0, #1835008 ; 0x1c0000
8030: e3811701 orr r1, r1, #262144 ; 0x40000
8034: e59f007c ldr r0, [pc, #124] ; 80b8 <notmain+0x98>
8038: ebfffff3 bl 800c <PUT32>
803c: e59f0078 ldr r0, [pc, #120] ; 80bc <notmain+0x9c>
8040: e3a018f9 mov r1, #16318464 ; 0xf90000
8044: ebfffff0 bl 800c <PUT32>
8048: e59f006c ldr r0, [pc, #108] ; 80bc <notmain+0x9c>
804c: e59f106c ldr r1, [pc, #108] ; 80c0 <notmain+0xa0>
8050: ebffffed bl 800c <PUT32>
8054: e59f0068 ldr r0, [pc, #104] ; 80c4 <notmain+0xa4>
8058: ebffffed bl 8014 <GET32>
805c: e59f4064 ldr r4, [pc, #100] ; 80c8 <notmain+0xa8>
8060: e1a05000 mov r5, r0
8064: e59f0060 ldr r0, [pc, #96] ; 80cc <notmain+0xac>
8068: e3a01801 mov r1, #65536 ; 0x10000
806c: ebffffe6 bl 800c <PUT32>
8070: e59f004c ldr r0, [pc, #76] ; 80c4 <notmain+0xa4>
8074: ebffffe6 bl 8014 <GET32>
8078: e0650000 rsb r0, r5, r0
807c: e1500004 cmp r0, r4
8080: 9afffffa bls 8070 <notmain+0x50>
8084: e285683d add r6, r5, #3997696 ; 0x3d0000
8088: e59f0040 ldr r0, [pc, #64] ; 80d0 <notmain+0xb0>
808c: e3a01801 mov r1, #65536 ; 0x10000
8090: e2866c09 add r6, r6, #2304 ; 0x900
8094: ebffffdc bl 800c <PUT32>
8098: e59f0024 ldr r0, [pc, #36] ; 80c4 <notmain+0xa4>
809c: ebffffdc bl 8014 <GET32>
80a0: e0662000 rsb r2, r6, r0
80a4: e1520004 cmp r2, r4
80a8: 9afffffa bls 8098 <notmain+0x78>
80ac: e285587a add r5, r5, #7995392 ; 0x7a0000
80b0: e2855c12 add r5, r5, #4608 ; 0x1200
80b4: eaffffea b 8064 <notmain+0x44>
80b8: 20200004 eorcs r0, r0, r4
80bc: 2000b408 andcs fp, r0, r8, lsl #8
80c0: 00f90200 rscseq r0, r9, r0, lsl #4
80c4: 2000b420 andcs fp, r0, r0, lsr #8
80c8: 003d08ff ldrshteq r0, [sp], -pc
80cc: 2020001c eorcs r0, r0, ip, lsl r0
80d0: 20200028 eorcs r0, r0, r8, lsr #32
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002c41 andeq r2, r0, r1, asr #24
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000022 andeq r0, r0, r2, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0x620
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0x404
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: 2c011a01 stccs 10, cr1, [r1], {1}
2c: Address 0x000000000000002c is out of bounds.
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0x10c8d04>
4: 6f532820 svcvs 0x00532820
8: 65637275 strbvs r7, [r3, #-629]! ; 0x275
c: 43207972 teqmi r0, #1867776 ; 0x1c8000
10: 4265646f rsbmi r6, r5, #1862270976 ; 0x6f000000
14: 68636e65 stmdavs r3!, {r0, r2, r5, r6, r9, sl, fp, sp, lr}^
18: 74694c20 strbtvc r4, [r9], #-3104 ; 0xc20
1c: 30322065 eorscc r2, r2, r5, rrx
20: 302e3131 eorcc r3, lr, r1, lsr r1
24: 39362d39 ldmdbcc r6!, {r0, r3, r4, r5, r8, sl, fp, sp}
28: 2e342029 cdpcs 0, 3, cr2, cr4, cr9, {1}
2c: 00312e36 eorseq r2, r1, r6, lsr lr

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11
boards/pi2/HYP/README
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@@ -1,4 +1,9 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
will write more on this. As of this time the GPU based bootstrap leaves
the ARM in HYP mode when we get control at address 0x8000. These
examples leave the arm in that mode.
These examples are for the pi2, see other directories for other
flavors of raspberry pi. Specifically these examples are for running
in HYP mode. As of this writing the GPU planted bootstrap places
the ARM in HYP mode. These examples assume the ARM is in this mode
as it affects how you do things compared to SVC mode.

63
boards/pi2/HYP/bootloader07/Makefile
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@@ -1,63 +0,0 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : kernel7.img
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
bootloader07.o : bootloader07.c
$(ARMGNU)-gcc $(COPS) -c bootloader07.c -o bootloader07.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
kernel7.img : loader vectors.o periph.o bootloader07.o
$(ARMGNU)-ld vectors.o periph.o bootloader07.o -T loader -o bootloader07_rpi1.elf
$(ARMGNU)-objdump -D bootloader07_rpi1.elf > bootloader07_rpi1.list
$(ARMGNU)-objcopy bootloader07_rpi1.elf -O ihex bootloader07_rpi1.hex
$(ARMGNU)-objcopy bootloader07_rpi1.elf -O binary kernel7.img
LOPS = -Wall -m32 -emit-llvm
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
LLCOPS = $(LLCOPS1)
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPSx = -std-compile-opts
OOPS = -std-link-opts
clang : bootloader07.clang.bin
bootloader07.bc : bootloader07.c
clang $(LOPS) -c bootloader07.c -o bootloader07.bc
periph.bc : periph.c
clang $(LOPS) -c periph.c -o periph.bc
bootloader07.clang.elf : loader vectors.o bootloader07.bc periph.bc
llvm-link periph.bc bootloader07.bc -o bootloader07.nopt.bc
opt $(OOPS) bootloader07.nopt.bc -o bootloader07.opt.bc
llc $(LLCOPS) bootloader07.opt.bc -o bootloader07.clang.s
$(ARMGNU)-as bootloader07.clang.s -o bootloader07.clang.o
$(ARMGNU)-ld -o bootloader07.clang.elf -T loader vectors.o bootloader07.clang.o
$(ARMGNU)-objdump -D bootloader07.clang.elf > bootloader07.clang.list
bootloader07.clang.bin : bootloader07.clang.elf
$(ARMGNU)-objcopy bootloader07.clang.elf bootloader07.clang.bin -O binary

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10
boards/pi2/README
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@@ -14,8 +14,8 @@ Cortex A7. Quad core. The peripherals for the pi1 boards were in the
ARM address space starting at 0x20xxxxxx, but to allow for more room
to have more ram they moved the peripherals to 0x3Fxxxxxx.
My preferred way to run examples is to use my bootloader07 kernel.img on
the board with an ftdi usb to uart board or cable. I also solder a
My preferred way to run examples is to use my bootloader07 kernel7.img
on the board with an ftdi usb to uart board or cable. I also solder a
momentary pushbutton on the RUN pins, which is basically a board reset.
There are ways to do this without soldering, pins you can push in rather
than solder.
@@ -24,10 +24,10 @@ Once the sd card is in with bootloader07, press reset, download the
intel hex (.hex) version of the program I want to run. Press 'g' to go.
Repeat as necessary.
Or you can copy the blinker01.bin file to the kernel7.img file on your
sd card, replace the sd card and turn the power on.
Or you can copy the .bin file to the kernel7.img file on your sd card,
replace the sd card and turn the power on.
In late 2015 the standard GPU bootloader would put the ARM in HYP mode
In 2015 the standard GPU bootloader would put the ARM in HYP mode
on its way to running kernel7.img. As of this writing that is still
the case. I now see how to switch back to SVC. So there is a directory
of examples for staying in HYP mode and a directory for switching

82
boards/pi2/SVC/README
View File

@@ -1,3 +1,81 @@
need to work on this readme. This directory puts the pi2 in svc mode
it boots as of this writing in HYP mode.
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
These examples are for the pi2, see other directories for other
flavors of raspberry pi. Specifically these examples are for running
in SVC mode. As of this writing the GPU planted bootstrap places
the ARM in HYP mode. For the moment I am using the code below to return
the ARM to SVC and secure mode. At least until it breaks.
The bootloader is one level up and shared for both SVC and HYP as I
want the applications loaded to make the changes not the bootloader.
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,hyp_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word smc
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
irq_handler: .word hang
fiq_handler: .word hang
reset:
;@ b skip
mrs r0,cpsr
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0
eret
skip:
mrc p15, 0, r1, c12, c0, 0 ;@ get vbar
mov r0,#0x8000
;@ mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
smc #0
mrc p15,0,r2,c1,c0,0
bic r2,#0x1000
bic r2,#0x0004
mcr p15,0,r2,c1,c0,0
mov sp,#0x8000
mov r0,pc
bl notmain
hang: b hang
smc:
mrc p15, 0, r1, c1, c1, 0
bic r1, r1, #1
mcr p15, 0, r1, c1, c1, 0
movs pc, lr

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44
boards/pi2/SVC/blinker01/blinker01.hex
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@@ -1,19 +1,29 @@
:1080000000000FE11F1000E21A0051E30500001A02
:108010001F00C0E3130080E300F06FE104008FE273
:1080200000F32EE16E0060E102D9A0E30F00A0E1B1
:10803000070000EBFEFFFFEA001080E51EFF2FE1C6
:10804000000090E51EFF2FE11EFF2FE100000FE171
:108050001EFF2FE170402DE9A0009FE5F7FFFFEB29
:108060000E16C0E3021681E390009FE5F1FFFFEBDF
:108070008C009FE5F1FFFFEB0E19C0E3021981E3CD
:108080007C009FE5EBFFFFEBEFFFFFEB1F0000E243
:108090001A0050E30258A0030158A0130219A0E3EC
:1080A00060009FE5E3FFFFEB0810A0E358009FE5A9
:1080B000E0FFFFEB0040A0E30400A0E1014084E208
:1080C000E0FFFFEB040055E1FAFFFF1A0219A0E3FD
:1080D00034009FE5D7FFFFEB0810A0E324009FE5E5
:1080E000D4FFFFEB0040A0E30400A0E1014084E2E4
:1080F000D4FFFFEB040055E1FAFFFF1AE6FFFFEAA9
:108100001000203F0C00203F2000203F2C00203F8B
:1080000018F09FE518F09FE518F09FE518F09FE540
:1080100018F09FE518F09FE518F09FE518F09FE530
:1080200040800000B8800000BC800000B8800000E4
:10803000B8800000B8800000B8800000B880000060
:1080400000000FE11F00C0E3130080E300F06FE1C8
:1080500004008FE200F32EE16E0060E1101F1CEEC1
:108060000209A0E3FC03B0E8FC03A1E8FC03B0E8CC
:10807000FC03A1E800C0A0E33ACF07EE4FF07FF584
:1080800000C0A0E315CF07EE00C0A0E3D5CF07EEF8
:108090004FF07FF56FF07FF5700060E1102F11EE6B
:1080A000012AC2E30420C2E3102F01EE02D9A0E3AB
:1080B0000F00A0E10B0000EBFEFFFFEA111F11EE25
:1080C0000110C1E3111F01EE0EF0B0E1001080E5D8
:1080D0001EFF2FE1000090E51EFF2FE11EFF2FE1A4
:1080E00000000FE11EFF2FE170402DE9A0009FE589
:1080F000F7FFFFEB0E16C0E3021681E390009FE549
:10810000F1FFFFEB8C009FE5F1FFFFEB0E19C0E3E1
:10811000021981E37C009FE5EBFFFFEBEFFFFFEB34
:108120001F0000E21A0050E30258A0030158A013F8
:108130000219A0E360009FE5E3FFFFEB0810A0E356
:1081400058009FE5E0FFFFEB0040A0E30400A0E142
:10815000014084E2E0FFFFEB040055E1FAFFFF1A63
:108160000219A0E334009FE5D7FFFFEB0810A0E35E
:1081700024009FE5D4FFFFEB0040A0E30400A0E152
:10818000014084E2D4FFFFEB040055E1FAFFFF1A3F
:10819000E6FFFFEA1000203F0C00203F2000203FB8
:0481A0002C00203F50
:040000030000800079
:00000001FF

211
boards/pi2/SVC/blinker01/blinker01.list
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@@ -5,88 +5,145 @@ blinker01.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e10f0000 mrs r0, CPSR
8004: e200101f and r1, r0, #31
8008: e351001a cmp r1, #26
800c: 1a000005 bne 8028 <skip>
8010: e3c0001f bic r0, r0, #31
8014: e3800013 orr r0, r0, #19
8018: e16ff000 msr SPSR_fsxc, r0
801c: e28f0004 add r0, pc, #4
8020: e12ef300 msr ELR_hyp, r0
8024: e160006e eret
8000: e59ff018 ldr pc, [pc, #24] ; 8020 <reset_handler>
8004: e59ff018 ldr pc, [pc, #24] ; 8024 <undefined_handler>
8008: e59ff018 ldr pc, [pc, #24] ; 8028 <swi_handler>
800c: e59ff018 ldr pc, [pc, #24] ; 802c <prefetch_handler>
8010: e59ff018 ldr pc, [pc, #24] ; 8030 <data_handler>
8014: e59ff018 ldr pc, [pc, #24] ; 8034 <hyp_handler>
8018: e59ff018 ldr pc, [pc, #24] ; 8038 <irq_handler>
801c: e59ff018 ldr pc, [pc, #24] ; 803c <fiq_handler>
00008028 <skip>:
8028: e3a0d902 mov sp, #32768 ; 0x8000
802c: e1a0000f mov r0, pc
8030: eb000007 bl 8054 <notmain>
00008020 <reset_handler>:
8020: 00008040 andeq r8, r0, r0, asr #32
00008034 <hang>:
8034: eafffffe b 8034 <hang>
00008024 <undefined_handler>:
8024: 000080b8 strheq r8, [r0], -r8 ; <UNPREDICTABLE>
00008038 <PUT32>:
8038: e5801000 str r1, [r0]
803c: e12fff1e bx lr
00008028 <swi_handler>:
8028: 000080bc strheq r8, [r0], -ip
00008040 <GET32>:
8040: e5900000 ldr r0, [r0]
8044: e12fff1e bx lr
0000802c <prefetch_handler>:
802c: 000080b8 strheq r8, [r0], -r8 ; <UNPREDICTABLE>
00008048 <dummy>:
8048: e12fff1e bx lr
00008030 <data_handler>:
8030: 000080b8 strheq r8, [r0], -r8 ; <UNPREDICTABLE>
0000804c <GETCPSR>:
804c: e10f0000 mrs r0, CPSR
8050: e12fff1e bx lr
00008034 <hyp_handler>:
8034: 000080b8 strheq r8, [r0], -r8 ; <UNPREDICTABLE>
00008054 <notmain>:
8054: e92d4070 push {r4, r5, r6, lr}
8058: e59f00a0 ldr r0, [pc, #160] ; 8100 <notmain+0xac>
805c: ebfffff7 bl 8040 <GET32>
8060: e3c0160e bic r1, r0, #14680064 ; 0xe00000
8064: e3811602 orr r1, r1, #2097152 ; 0x200000
8068: e59f0090 ldr r0, [pc, #144] ; 8100 <notmain+0xac>
806c: ebfffff1 bl 8038 <PUT32>
8070: e59f008c ldr r0, [pc, #140] ; 8104 <notmain+0xb0>
8074: ebfffff1 bl 8040 <GET32>
8078: e3c0190e bic r1, r0, #229376 ; 0x38000
807c: e3811902 orr r1, r1, #32768 ; 0x8000
8080: e59f007c ldr r0, [pc, #124] ; 8104 <notmain+0xb0>
8084: ebffffeb bl 8038 <PUT32>
8088: ebffffef bl 804c <GETCPSR>
808c: e200001f and r0, r0, #31
8090: e350001a cmp r0, #26
8094: 03a05802 moveq r5, #131072 ; 0x20000
8098: 13a05801 movne r5, #65536 ; 0x10000
809c: e3a01902 mov r1, #32768 ; 0x8000
80a0: e59f0060 ldr r0, [pc, #96] ; 8108 <notmain+0xb4>
80a4: ebffffe3 bl 8038 <PUT32>
80a8: e3a01008 mov r1, #8
80ac: e59f0058 ldr r0, [pc, #88] ; 810c <notmain+0xb8>
80b0: ebffffe0 bl 8038 <PUT32>
80b4: e3a04000 mov r4, #0
80b8: e1a00004 mov r0, r4
80bc: e2844001 add r4, r4, #1
80c0: ebffffe0 bl 8048 <dummy>
80c4: e1550004 cmp r5, r4
80c8: 1afffffa bne 80b8 <notmain+0x64>
80cc: e3a01902 mov r1, #32768 ; 0x8000
80d0: e59f0034 ldr r0, [pc, #52] ; 810c <notmain+0xb8>
80d4: ebffffd7 bl 8038 <PUT32>
80d8: e3a01008 mov r1, #8
80dc: e59f0024 ldr r0, [pc, #36] ; 8108 <notmain+0xb4>
80e0: ebffffd4 bl 8038 <PUT32>
80e4: e3a04000 mov r4, #0
80e8: e1a00004 mov r0, r4
80ec: e2844001 add r4, r4, #1
80f0: ebffffd4 bl 8048 <dummy>
80f4: e1550004 cmp r5, r4
80f8: 1afffffa bne 80e8 <notmain+0x94>
80fc: eaffffe6 b 809c <notmain+0x48>
8100: 3f200010 svccc 0x00200010
8104: 3f20000c svccc 0x0020000c
8108: 3f200020 svccc 0x00200020
810c: 3f20002c svccc 0x0020002c
00008038 <irq_handler>:
8038: 000080b8 strheq r8, [r0], -r8 ; <UNPREDICTABLE>
0000803c <fiq_handler>:
803c: 000080b8 strheq r8, [r0], -r8 ; <UNPREDICTABLE>
00008040 <reset>:
8040: e10f0000 mrs r0, CPSR
8044: e3c0001f bic r0, r0, #31
8048: e3800013 orr r0, r0, #19
804c: e16ff000 msr SPSR_fsxc, r0
8050: e28f0004 add r0, pc, #4
8054: e12ef300 msr ELR_hyp, r0
8058: e160006e eret
0000805c <skip>:
805c: ee1c1f10 mrc 15, 0, r1, cr12, cr0, {0}
8060: e3a00902 mov r0, #32768 ; 0x8000
8064: e8b003fc ldm r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
8068: e8a103fc stmia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
806c: e8b003fc ldm r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
8070: e8a103fc stmia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
8074: e3a0c000 mov ip, #0
8078: ee07cf3a mcr 15, 0, ip, cr7, cr10, {1}
807c: f57ff04f dsb sy
8080: e3a0c000 mov ip, #0
8084: ee07cf15 mcr 15, 0, ip, cr7, cr5, {0}
8088: e3a0c000 mov ip, #0
808c: ee07cfd5 mcr 15, 0, ip, cr7, cr5, {6}
8090: f57ff04f dsb sy
8094: f57ff06f isb sy
8098: e1600070 smc 0
809c: ee112f10 mrc 15, 0, r2, cr1, cr0, {0}
80a0: e3c22a01 bic r2, r2, #4096 ; 0x1000
80a4: e3c22004 bic r2, r2, #4
80a8: ee012f10 mcr 15, 0, r2, cr1, cr0, {0}
80ac: e3a0d902 mov sp, #32768 ; 0x8000
80b0: e1a0000f mov r0, pc
80b4: eb00000b bl 80e8 <notmain>
000080b8 <hang>:
80b8: eafffffe b 80b8 <hang>
000080bc <smc>:
80bc: ee111f11 mrc 15, 0, r1, cr1, cr1, {0}
80c0: e3c11001 bic r1, r1, #1
80c4: ee011f11 mcr 15, 0, r1, cr1, cr1, {0}
80c8: e1b0f00e movs pc, lr
000080cc <PUT32>:
80cc: e5801000 str r1, [r0]
80d0: e12fff1e bx lr
000080d4 <GET32>:
80d4: e5900000 ldr r0, [r0]
80d8: e12fff1e bx lr
000080dc <dummy>:
80dc: e12fff1e bx lr
000080e0 <GETCPSR>:
80e0: e10f0000 mrs r0, CPSR
80e4: e12fff1e bx lr
000080e8 <notmain>:
80e8: e92d4070 push {r4, r5, r6, lr}
80ec: e59f00a0 ldr r0, [pc, #160] ; 8194 <notmain+0xac>
80f0: ebfffff7 bl 80d4 <GET32>
80f4: e3c0160e bic r1, r0, #14680064 ; 0xe00000
80f8: e3811602 orr r1, r1, #2097152 ; 0x200000
80fc: e59f0090 ldr r0, [pc, #144] ; 8194 <notmain+0xac>
8100: ebfffff1 bl 80cc <PUT32>
8104: e59f008c ldr r0, [pc, #140] ; 8198 <notmain+0xb0>
8108: ebfffff1 bl 80d4 <GET32>
810c: e3c0190e bic r1, r0, #229376 ; 0x38000
8110: e3811902 orr r1, r1, #32768 ; 0x8000
8114: e59f007c ldr r0, [pc, #124] ; 8198 <notmain+0xb0>
8118: ebffffeb bl 80cc <PUT32>
811c: ebffffef bl 80e0 <GETCPSR>
8120: e200001f and r0, r0, #31
8124: e350001a cmp r0, #26
8128: 03a05802 moveq r5, #131072 ; 0x20000
812c: 13a05801 movne r5, #65536 ; 0x10000
8130: e3a01902 mov r1, #32768 ; 0x8000
8134: e59f0060 ldr r0, [pc, #96] ; 819c <notmain+0xb4>
8138: ebffffe3 bl 80cc <PUT32>
813c: e3a01008 mov r1, #8
8140: e59f0058 ldr r0, [pc, #88] ; 81a0 <notmain+0xb8>
8144: ebffffe0 bl 80cc <PUT32>
8148: e3a04000 mov r4, #0
814c: e1a00004 mov r0, r4
8150: e2844001 add r4, r4, #1
8154: ebffffe0 bl 80dc <dummy>
8158: e1550004 cmp r5, r4
815c: 1afffffa bne 814c <notmain+0x64>
8160: e3a01902 mov r1, #32768 ; 0x8000
8164: e59f0034 ldr r0, [pc, #52] ; 81a0 <notmain+0xb8>
8168: ebffffd7 bl 80cc <PUT32>
816c: e3a01008 mov r1, #8
8170: e59f0024 ldr r0, [pc, #36] ; 819c <notmain+0xb4>
8174: ebffffd4 bl 80cc <PUT32>
8178: e3a04000 mov r4, #0
817c: e1a00004 mov r0, r4
8180: e2844001 add r4, r4, #1
8184: ebffffd4 bl 80dc <dummy>
8188: e1550004 cmp r5, r4
818c: 1afffffa bne 817c <notmain+0x94>
8190: eaffffe6 b 8130 <notmain+0x48>
8194: 3f200010 svccc 0x00200010
8198: 3f20000c svccc 0x0020000c
819c: 3f200020 svccc 0x00200020
81a0: 3f20002c svccc 0x0020002c
Disassembly of section .ARM.attributes:
@@ -101,12 +158,12 @@ Disassembly of section .ARM.attributes:
1c: 04120109 ldreq r0, [r2], #-265 ; 0xfffffef7
20: 01150114 tsteq r5, r4, lsl r1
24: 01180317 tsteq r8, r7, lsl r3
28: 0244011a subeq r0, r4, #-2147483642 ; 0x80000006
28: 0344011a movteq r0, #16666 ; 0x411a
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0x10c8cd0>
0: 3a434347 bcc 10d0d24 <notmain+0x10c8c3c>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6

BIN
boards/pi2/SVC/blinker01/vectors.o
View File

Binary file not shown.

57
boards/pi2/SVC/blinker01/vectors.s
View File

@@ -5,23 +5,70 @@
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,hyp_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word smc
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
irq_handler: .word hang
fiq_handler: .word hang
reset:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
msr ELR_hyp,r0
eret
skip:
mrc p15, 0, r1, c12, c0, 0 ;@ get vbar
mov r0,#0x8000
;@ mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
smc #0
mrc p15,0,r2,c1,c0,0
bic r2,#0x1000
bic r2,#0x0004
mcr p15,0,r2,c1,c0,0
mov sp,#0x8000
mov r0,pc
bl notmain
hang: b hang
smc:
mrc p15, 0, r1, c1, c1, 0
bic r1, r1, #1
mcr p15, 0, r1, c1, c1, 0
movs pc, lr
.globl PUT32
PUT32:
str r1,[r0]

58
boards/pi2/SVC/blinker02/vectors.s
View File

@@ -5,22 +5,70 @@
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,hyp_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word smc
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
irq_handler: .word hang
fiq_handler: .word hang
reset:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
msr ELR_hyp,r0
eret
skip:
mrc p15, 0, r1, c12, c0, 0 ;@ get vbar
mov r0,#0x8000
;@ mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
smc #0
mrc p15,0,r2,c1,c0,0
bic r2,#0x1000
bic r2,#0x0004
mcr p15,0,r2,c1,c0,0
mov sp,#0x8000
mov r0,pc
bl notmain
hang: b hang
smc:
mrc p15, 0, r1, c1, c1, 0
bic r1, r1, #1
mcr p15, 0, r1, c1, c1, 0
movs pc, lr
.globl PUT32
PUT32:
str r1,[r0]

56
boards/pi2/SVC/blinker03/vectors.s
View File

@@ -4,24 +4,70 @@
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,hyp_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word smc
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
irq_handler: .word hang
fiq_handler: .word hang
reset:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
msr ELR_hyp,r0
eret
skip:
mrc p15, 0, r1, c12, c0, 0 ;@ get vbar
mov r0,#0x8000
;@ mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
smc #0
mrc p15,0,r2,c1,c0,0
bic r2,#0x1000
bic r2,#0x0004
mcr p15,0,r2,c1,c0,0
mov sp,#0x8000
mov r0,pc
bl notmain
hang: b hang
smc:
mrc p15, 0, r1, c1, c1, 0
bic r1, r1, #1
mcr p15, 0, r1, c1, c1, 0
movs pc, lr
.globl PUT32
PUT32:
str r1,[r0]

57
boards/pi2/SVC/blinker04/vectors.s
View File

@@ -2,26 +2,73 @@
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,hyp_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word smc
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
irq_handler: .word hang
fiq_handler: .word hang
reset:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
msr ELR_hyp,r0
eret
skip:
mrc p15, 0, r1, c12, c0, 0 ;@ get vbar
mov r0,#0x8000
;@ mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
smc #0
mrc p15,0,r2,c1,c0,0
bic r2,#0x1000
bic r2,#0x0004
mcr p15,0,r2,c1,c0,0
mov sp,#0x8000
mov r0,pc
bl notmain
hang: b hang
smc:
mrc p15, 0, r1, c1, c1, 0
bic r1, r1, #1
mcr p15, 0, r1, c1, c1, 0
movs pc, lr
.globl PUT32
PUT32:
str r1,[r0]

6
boards/pi2/SVC/blinker05/README
View File

@@ -15,6 +15,6 @@ sd card to ram is kernel7.img the older raspberry pis still use
kernel.img.
So I have code that switches back to SVC mode, but still more work
to do on this. In theory all I have to do is change the VBAR, but
that hangs. So doing it the old fashioned way like I do with the
ARM11 based pis and setting up the exception table at address 0x000
to do on this. I had the wrong instruction, so now it does change
the VBAR rather than have to write stuff to 0x0000 to setup a new
exception table.

45
boards/pi2/SVC/blinker05/vectors.s
View File

@@ -14,7 +14,7 @@ _start:
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word hang
swi_handler: .word smc
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
@@ -25,24 +25,49 @@ reset:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
msr ELR_hyp,r0
eret
skip:
mrc p15, 0, r1, c12, c0, 0 ;@ get vbar
mov r0,#0x8000
mov r1,#0x0000
;@ mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
smc #0
mrc p15,0,r2,c1,c0,0
bic r2,#0x1000
bic r2,#0x0004
mcr p15,0,r2,c1,c0,0
mov r0,#0x8000
mcr p15, 0, r0, c12, c0, 0
;@ mov r0,#0x8000
;@ mov r1,#0x0000
;@ ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ (PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD2
msr cpsr_c,r0
@@ -61,6 +86,12 @@ skip:
bl notmain
hang: b hang
smc:
mrc p15, 0, r1, c1, c1, 0
bic r1, r1, #1
mcr p15, 0, r1, c1, c1, 0
movs pc, lr
.globl PUT32
PUT32:
str r1,[r0]

34
boards/pi2/bootloader07/Makefile Normal file
View File

@@ -0,0 +1,34 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
all : kernel7.img
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
bootloader07.o : bootloader07.c
$(ARMGNU)-gcc $(COPS) -c bootloader07.c -o bootloader07.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
kernel7.img : loader vectors.o periph.o bootloader07.o
$(ARMGNU)-ld vectors.o periph.o bootloader07.o -T loader -o bootloader07.elf
$(ARMGNU)-objdump -D bootloader07.elf > bootloader07.list
$(ARMGNU)-objcopy bootloader07.elf -O ihex bootloader07.hex
$(ARMGNU)-objcopy bootloader07.elf -O binary kernel7.img

5
boards/pi2/HYP/bootloader07/README → boards/pi2/bootloader07/README
View File

@@ -47,4 +47,7 @@ will reset the board, and released allow it to boot again. Then you
can use this bootloader and simply press the button to try another
program.
Wow, forgot that the GPU planted bootstrap turns on the caches. And
I was seeing the cache coherency problems with doing that. In theory
I have that fixed, it invalidates I and D and branch prediction
before launching the downloaded code.

12
boards/pi2/HYP/bootloader07/bootloader07.c → boards/pi2/bootloader07/bootloader07.c
View File

@@ -13,6 +13,8 @@ extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern unsigned int GETPC ( void );
extern unsigned int GETCPSR ( void );
extern unsigned int GETSCTLR ( void );
extern void BRANCHTO ( unsigned int );
extern void dummy ( unsigned int );
@@ -48,6 +50,8 @@ int notmain ( void )
uart_init();
hexstring(0x12345678);
hexstring(GETPC());
hexstring(GETCPSR());
hexstring(GETSCTLR());
uart_send('I');
uart_send('H');
@@ -146,7 +150,15 @@ int notmain ( void )
}
case 0x01:
{
for(ra=0;ra<20;ra++)
hexstring(sum);
segment=0;
sum=0;
data=0;
record_type=0;
address=0;
byte_count=0;
state=0;
break;
}

BIN
bootloader07/bootloader07.elf → boards/pi2/bootloader07/bootloader07.elf
View File

Binary file not shown.

169
bootloader07/bootloader07.hex → boards/pi2/bootloader07/bootloader07.hex
View File

@@ -129055,85 +129055,98 @@
:10FFE0000000000000000000000000000000000011
:10FFF0000000000000000000000000000000000001
:020000040020DA
:1000000002D3A0E3A60000EBFEFFFFEA001080E5AC
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:1000C000D1FFFFEB1040BDE81EFF2FE1545021206F
:1000D0004050212008402DE910009FE5D0FFFFEBA4
:1000E000010C10E3FBFFFF1A0840BDE81EFF2FE1E3
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:100120001EFF2FE15450213F70402DE90050A0E107
:100130002040A0E3044044E23504A0E10F0000E2C7
:10014000090050E33700808230008092E0FFFFEB2F
:10015000000054E3F6FFFF1A2000A0E37040BDE862
:10016000DBFFFFEA10402DE9EEFFFFEB0D00A0E3FF
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:1001800010402DE90110A0E3D4009FE59EFFFFEB96
:100190000010A0E3CC009FE59BFFFFEB0010A0E365
:1001A000C4009FE598FFFFEB0310A0E3BC009FE5B0
:1001B00095FFFFEB0010A0E3B4009FE592FFFFEB7B
:1001C0000010A0E39C009FE58FFFFFEBC610A0E3AB
:1001D000A0009FE58CFFFFEB9C109FE59C009FE536
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:1001F000121A81E388009FE583FFFFEB0010A0E364
:1002000080009FE580FFFFEB0040A0E30400A0E139
:10021000014084E290FFFFEB960054E3FAFFFF1ADF
:100220000319A0E360009FE577FFFFEB0040A0E328
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:10024000FAFFFF1A0010A0E33C009FE56EFFFFEBF2
:100250000310A0E310009FE56BFFFFEB1040BDE82B
:100260001EFF2FE10450213F4450213F6050213FA9
:100270004C50213F5050213F4850213F0E0100007B
:100280006850213F0400203F9400203F9800203F09
:1002900010402DE91C409FE5F918A0E30400A0E1FF
:1002A00059FFFFEB0400A0E10C109FE556FFFFEBA8
:1002B0001040BDE81EFF2FE108B4003F0002F90026
:1002C00010402DE908009FE555FFFFEB1040BDE809
:1002D0001EFF2FE120B4003F70402DE954409FE500
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:1002F000021681E30400A0E143FFFFEB0500A0E14B
:1003000047FFFFEB0E19C0E31C4084E20500A0E1AB
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:100330007040BDE81EFF2FE11000203F0C00203F61
:10034000F0472DE90070A0E3E2FFFFEB8BFFFFEB2E
:100350006C029FE582FFFFEB33FFFFEB80FFFFEBBB
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:1003A0000760A0E10750A0E10780A0E10740A0E1BD
:1003B00047FFFFEB33FFFFEB3A0050E32B00000A4F
:1003C0000A0050E30D00501301A0A00300A0A013E9
:1003D0002900000A2030C0E3470053E35000000A20
:1003E000013044E2140053E303F19F97F0FFFFEA6A
:1003F00060042000600420000005200000052000AB
:100400000005200000052000E0042000A8042000D2
:10041000840420008404200084042000840420003C
:1004200078042000440420004404200044042000F8
:10043000440420004404200044042000440420001C
:1004400044042000390050E3070040820992A0E1F3
:100450000F0000E2150054E3099080E14C00000A0F
:1004600008FFFFEB3A0050E3014084E2D3FFFF1A9C
:100470000140A0E3CEFFFFEA0662A0E10040A0E356
:10048000CBFFFFEA390050E3070040820662A0E19B
:100490000F0000E2066080E10668A0E12668A0E1A6
:1004A000014084E2C2FFFFEA390050E307004082C6
:1004B0000552A0E10F0000E2055080E1FF5005E287
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:10050000390050E3070040820882A0E10F0000E2BA
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:100580000490A0E10460A0E10450A0E10480A0E197
:1005900087FFFFEA693829E02334A0E1FF3CC3E389
:1005A000699423E00800A0E1077088E00910A0E149
:1005B00095FEFFEB077089E0048088E20E40A0E31F
:0805C0007BFFFFEA78563412BC
:040000030000800079
:00000001FF

450
boards/pi2/bootloader07/bootloader07.list Normal file
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@@ -0,0 +1,450 @@
bootloader07.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: ea07dffe b 200000 <skip>
...
00200000 <skip>:
200000: e3a0d302 mov sp, #134217728 ; 0x8000000
200004: eb0000cd bl 200340 <notmain>
00200008 <hang>:
200008: eafffffe b 200008 <hang>
0020000c <PUT32>:
20000c: e5801000 str r1, [r0]
200010: e12fff1e bx lr
00200014 <PUT16>:
200014: e1c010b0 strh r1, [r0]
200018: e12fff1e bx lr
0020001c <PUT8>:
20001c: e5c01000 strb r1, [r0]
200020: e12fff1e bx lr
00200024 <GET32>:
200024: e5900000 ldr r0, [r0]
200028: e12fff1e bx lr
0020002c <GETPC>:
20002c: e1a0000e mov r0, lr
200030: e12fff1e bx lr
00200034 <BRANCHTO>:
200034: e3a0c000 mov ip, #0
200038: ee07cf3a mcr 15, 0, ip, cr7, cr10, {1}
20003c: f57ff04f dsb sy
200040: e3a0c000 mov ip, #0
200044: ee07cf15 mcr 15, 0, ip, cr7, cr5, {0}
200048: e3a0c000 mov ip, #0
20004c: ee07cfd5 mcr 15, 0, ip, cr7, cr5, {6}
200050: f57ff04f dsb sy
200054: f57ff06f isb sy
200058: e12fff10 bx r0
0020005c <dummy>:
20005c: e12fff1e bx lr
00200060 <GETCPSR>:
200060: e10f0000 mrs r0, CPSR
200064: e12fff1e bx lr
00200068 <GETSCTLR>:
200068: ee110f10 mrc 15, 0, r0, cr1, cr0, {0}
20006c: e12fff1e bx lr
00200070 <uart_lcr>:
200070: e92d4010 push {r4, lr}
200074: e59f0008 ldr r0, [pc, #8] ; 200084 <uart_lcr+0x14>
200078: ebffffe9 bl 200024 <GET32>
20007c: e8bd4010 pop {r4, lr}
200080: e12fff1e bx lr
200084: 3f215054 svccc 0x00215054
00200088 <uart_recv>:
200088: e92d4010 push {r4, lr}
20008c: e59f001c ldr r0, [pc, #28] ; 2000b0 <uart_recv+0x28>
200090: ebffffe3 bl 200024 <GET32>
200094: e3100001 tst r0, #1
200098: 0afffffb beq 20008c <uart_recv+0x4>
20009c: e59f0010 ldr r0, [pc, #16] ; 2000b4 <uart_recv+0x2c>
2000a0: ebffffdf bl 200024 <GET32>
2000a4: e8bd4010 pop {r4, lr}
2000a8: e20000ff and r0, r0, #255 ; 0xff
2000ac: e12fff1e bx lr
2000b0: 3f215054 svccc 0x00215054
2000b4: 3f215040 svccc 0x00215040
002000b8 <uart_check>:
2000b8: e92d4010 push {r4, lr}
2000bc: e59f000c ldr r0, [pc, #12] ; 2000d0 <uart_check+0x18>
2000c0: ebffffd7 bl 200024 <GET32>
2000c4: e8bd4010 pop {r4, lr}
2000c8: e2000001 and r0, r0, #1
2000cc: e12fff1e bx lr
2000d0: 3f215054 svccc 0x00215054
002000d4 <uart_send>:
2000d4: e92d4010 push {r4, lr}
2000d8: e1a04000 mov r4, r0
2000dc: e59f001c ldr r0, [pc, #28] ; 200100 <uart_send+0x2c>
2000e0: ebffffcf bl 200024 <GET32>
2000e4: e3100020 tst r0, #32
2000e8: 0afffffb beq 2000dc <uart_send+0x8>
2000ec: e1a01004 mov r1, r4
2000f0: e59f000c ldr r0, [pc, #12] ; 200104 <uart_send+0x30>
2000f4: ebffffc4 bl 20000c <PUT32>
2000f8: e8bd4010 pop {r4, lr}
2000fc: e12fff1e bx lr
200100: 3f215054 svccc 0x00215054
200104: 3f215040 svccc 0x00215040
00200108 <uart_flush>:
200108: e92d4010 push {r4, lr}
20010c: e59f0010 ldr r0, [pc, #16] ; 200124 <uart_flush+0x1c>
200110: ebffffc3 bl 200024 <GET32>
200114: e3100c01 tst r0, #256 ; 0x100
200118: 1afffffb bne 20010c <uart_flush+0x4>
20011c: e8bd4010 pop {r4, lr}
200120: e12fff1e bx lr
200124: 3f215054 svccc 0x00215054
00200128 <hexstrings>:
200128: e92d4070 push {r4, r5, r6, lr}
20012c: e1a05000 mov r5, r0
200130: e3a04020 mov r4, #32
200134: e2444004 sub r4, r4, #4
200138: e1a00435 lsr r0, r5, r4
20013c: e200000f and r0, r0, #15
200140: e3500009 cmp r0, #9
200144: 82800037 addhi r0, r0, #55 ; 0x37
200148: 92800030 addls r0, r0, #48 ; 0x30
20014c: ebffffe0 bl 2000d4 <uart_send>
200150: e3540000 cmp r4, #0
200154: 1afffff6 bne 200134 <hexstrings+0xc>
200158: e3a00020 mov r0, #32
20015c: e8bd4070 pop {r4, r5, r6, lr}
200160: eaffffdb b 2000d4 <uart_send>
00200164 <hexstring>:
200164: e92d4010 push {r4, lr}
200168: ebffffee bl 200128 <hexstrings>
20016c: e3a0000d mov r0, #13
200170: ebffffd7 bl 2000d4 <uart_send>
200174: e3a0000a mov r0, #10
200178: e8bd4010 pop {r4, lr}
20017c: eaffffd4 b 2000d4 <uart_send>
00200180 <uart_init>:
200180: e92d4010 push {r4, lr}
200184: e3a01001 mov r1, #1
200188: e59f00d4 ldr r0, [pc, #212] ; 200264 <uart_init+0xe4>
20018c: ebffff9e bl 20000c <PUT32>
200190: e3a01000 mov r1, #0
200194: e59f00cc ldr r0, [pc, #204] ; 200268 <uart_init+0xe8>
200198: ebffff9b bl 20000c <PUT32>
20019c: e3a01000 mov r1, #0
2001a0: e59f00c4 ldr r0, [pc, #196] ; 20026c <uart_init+0xec>
2001a4: ebffff98 bl 20000c <PUT32>
2001a8: e3a01003 mov r1, #3
2001ac: e59f00bc ldr r0, [pc, #188] ; 200270 <uart_init+0xf0>
2001b0: ebffff95 bl 20000c <PUT32>
2001b4: e3a01000 mov r1, #0
2001b8: e59f00b4 ldr r0, [pc, #180] ; 200274 <uart_init+0xf4>
2001bc: ebffff92 bl 20000c <PUT32>
2001c0: e3a01000 mov r1, #0
2001c4: e59f009c ldr r0, [pc, #156] ; 200268 <uart_init+0xe8>
2001c8: ebffff8f bl 20000c <PUT32>
2001cc: e3a010c6 mov r1, #198 ; 0xc6
2001d0: e59f00a0 ldr r0, [pc, #160] ; 200278 <uart_init+0xf8>
2001d4: ebffff8c bl 20000c <PUT32>
2001d8: e59f109c ldr r1, [pc, #156] ; 20027c <uart_init+0xfc>
2001dc: e59f009c ldr r0, [pc, #156] ; 200280 <uart_init+0x100>
2001e0: ebffff89 bl 20000c <PUT32>
2001e4: e59f0098 ldr r0, [pc, #152] ; 200284 <uart_init+0x104>
2001e8: ebffff8d bl 200024 <GET32>
2001ec: e3c01a3f bic r1, r0, #258048 ; 0x3f000
2001f0: e3811a12 orr r1, r1, #73728 ; 0x12000
2001f4: e59f0088 ldr r0, [pc, #136] ; 200284 <uart_init+0x104>
2001f8: ebffff83 bl 20000c <PUT32>
2001fc: e3a01000 mov r1, #0
200200: e59f0080 ldr r0, [pc, #128] ; 200288 <uart_init+0x108>
200204: ebffff80 bl 20000c <PUT32>
200208: e3a04000 mov r4, #0
20020c: e1a00004 mov r0, r4
200210: e2844001 add r4, r4, #1
200214: ebffff90 bl 20005c <dummy>
200218: e3540096 cmp r4, #150 ; 0x96
20021c: 1afffffa bne 20020c <uart_init+0x8c>
200220: e3a01903 mov r1, #49152 ; 0xc000
200224: e59f0060 ldr r0, [pc, #96] ; 20028c <uart_init+0x10c>
200228: ebffff77 bl 20000c <PUT32>
20022c: e3a04000 mov r4, #0
200230: e1a00004 mov r0, r4
200234: e2844001 add r4, r4, #1
200238: ebffff87 bl 20005c <dummy>
20023c: e3540096 cmp r4, #150 ; 0x96
200240: 1afffffa bne 200230 <uart_init+0xb0>
200244: e3a01000 mov r1, #0
200248: e59f003c ldr r0, [pc, #60] ; 20028c <uart_init+0x10c>
20024c: ebffff6e bl 20000c <PUT32>
200250: e3a01003 mov r1, #3
200254: e59f0010 ldr r0, [pc, #16] ; 20026c <uart_init+0xec>
200258: ebffff6b bl 20000c <PUT32>
20025c: e8bd4010 pop {r4, lr}
200260: e12fff1e bx lr
200264: 3f215004 svccc 0x00215004
200268: 3f215044 svccc 0x00215044
20026c: 3f215060 svccc 0x00215060
200270: 3f21504c svccc 0x0021504c
200274: 3f215050 svccc 0x00215050
200278: 3f215048 svccc 0x00215048
20027c: 0000010e andeq r0, r0, lr, lsl #2
200280: 3f215068 svccc 0x00215068
200284: 3f200004 svccc 0x00200004
200288: 3f200094 svccc 0x00200094
20028c: 3f200098 svccc 0x00200098
00200290 <timer_init>:
200290: e92d4010 push {r4, lr}
200294: e59f401c ldr r4, [pc, #28] ; 2002b8 <timer_init+0x28>
200298: e3a018f9 mov r1, #16318464 ; 0xf90000
20029c: e1a00004 mov r0, r4
2002a0: ebffff59 bl 20000c <PUT32>
2002a4: e1a00004 mov r0, r4
2002a8: e59f100c ldr r1, [pc, #12] ; 2002bc <timer_init+0x2c>
2002ac: ebffff56 bl 20000c <PUT32>
2002b0: e8bd4010 pop {r4, lr}
2002b4: e12fff1e bx lr
2002b8: 3f00b408 svccc 0x0000b408
2002bc: 00f90200 rscseq r0, r9, r0, lsl #4
002002c0 <timer_tick>:
2002c0: e92d4010 push {r4, lr}
2002c4: e59f0008 ldr r0, [pc, #8] ; 2002d4 <timer_tick+0x14>
2002c8: ebffff55 bl 200024 <GET32>
2002cc: e8bd4010 pop {r4, lr}
2002d0: e12fff1e bx lr
2002d4: 3f00b420 svccc 0x0000b420
002002d8 <leds_off>:
2002d8: e92d4070 push {r4, r5, r6, lr}
2002dc: e59f4054 ldr r4, [pc, #84] ; 200338 <leds_off+0x60>
2002e0: e1a00004 mov r0, r4
2002e4: ebffff4e bl 200024 <GET32>
2002e8: e59f504c ldr r5, [pc, #76] ; 20033c <leds_off+0x64>
2002ec: e3c0160e bic r1, r0, #14680064 ; 0xe00000
2002f0: e3811602 orr r1, r1, #2097152 ; 0x200000
2002f4: e1a00004 mov r0, r4
2002f8: ebffff43 bl 20000c <PUT32>
2002fc: e1a00005 mov r0, r5
200300: ebffff47 bl 200024 <GET32>
200304: e3c0190e bic r1, r0, #229376 ; 0x38000
200308: e284401c add r4, r4, #28
20030c: e1a00005 mov r0, r5
200310: e3811902 orr r1, r1, #32768 ; 0x8000
200314: ebffff3c bl 20000c <PUT32>
200318: e1a00004 mov r0, r4
20031c: e3a01902 mov r1, #32768 ; 0x8000
200320: ebffff39 bl 20000c <PUT32>
200324: e1a00004 mov r0, r4
200328: e3a01008 mov r1, #8
20032c: ebffff36 bl 20000c <PUT32>
200330: e8bd4070 pop {r4, r5, r6, lr}
200334: e12fff1e bx lr
200338: 3f200010 svccc 0x00200010
20033c: 3f20000c svccc 0x0020000c
00200340 <notmain>:
200340: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
200344: e3a07000 mov r7, #0
200348: ebffffe2 bl 2002d8 <leds_off>
20034c: ebffff8b bl 200180 <uart_init>
200350: e59f026c ldr r0, [pc, #620] ; 2005c4 <notmain+0x284>
200354: ebffff82 bl 200164 <hexstring>
200358: ebffff33 bl 20002c <GETPC>
20035c: ebffff80 bl 200164 <hexstring>
200360: ebffff3e bl 200060 <GETCPSR>
200364: ebffff7e bl 200164 <hexstring>
200368: ebffff3e bl 200068 <GETSCTLR>
20036c: ebffff7c bl 200164 <hexstring>
200370: e3a00049 mov r0, #73 ; 0x49
200374: ebffff56 bl 2000d4 <uart_send>
200378: e3a00048 mov r0, #72 ; 0x48
20037c: ebffff54 bl 2000d4 <uart_send>
200380: e3a00045 mov r0, #69 ; 0x45
200384: ebffff52 bl 2000d4 <uart_send>
200388: e3a00058 mov r0, #88 ; 0x58
20038c: ebffff50 bl 2000d4 <uart_send>
200390: e3a0000d mov r0, #13
200394: ebffff4e bl 2000d4 <uart_send>
200398: e3a0000a mov r0, #10
20039c: e1a09007 mov r9, r7
2003a0: e1a06007 mov r6, r7
2003a4: e1a05007 mov r5, r7
2003a8: e1a08007 mov r8, r7
2003ac: e1a04007 mov r4, r7
2003b0: ebffff47 bl 2000d4 <uart_send>
2003b4: ebffff33 bl 200088 <uart_recv>
2003b8: e350003a cmp r0, #58 ; 0x3a
2003bc: 0a00002b beq 200470 <notmain+0x130>
2003c0: e350000a cmp r0, #10
2003c4: 1350000d cmpne r0, #13
2003c8: 03a0a001 moveq sl, #1
2003cc: 13a0a000 movne sl, #0
2003d0: 0a000029 beq 20047c <notmain+0x13c>
2003d4: e3c03020 bic r3, r0, #32
2003d8: e3530047 cmp r3, #71 ; 0x47
2003dc: 0a000050 beq 200524 <notmain+0x1e4>
2003e0: e2443001 sub r3, r4, #1
2003e4: e3530014 cmp r3, #20
2003e8: 979ff103 ldrls pc, [pc, r3, lsl #2]
2003ec: eafffff0 b 2003b4 <notmain+0x74>
2003f0: 00200460 eoreq r0, r0, r0, ror #8
2003f4: 00200460 eoreq r0, r0, r0, ror #8
2003f8: 00200500 eoreq r0, r0, r0, lsl #10
2003fc: 00200500 eoreq r0, r0, r0, lsl #10
200400: 00200500 eoreq r0, r0, r0, lsl #10
200404: 00200500 eoreq r0, r0, r0, lsl #10
200408: 002004e0 eoreq r0, r0, r0, ror #9
20040c: 002004a8 eoreq r0, r0, r8, lsr #9
200410: 00200484 eoreq r0, r0, r4, lsl #9
200414: 00200484 eoreq r0, r0, r4, lsl #9
200418: 00200484 eoreq r0, r0, r4, lsl #9
20041c: 00200484 eoreq r0, r0, r4, lsl #9
200420: 00200478 eoreq r0, r0, r8, ror r4
200424: 00200444 eoreq r0, r0, r4, asr #8
200428: 00200444 eoreq r0, r0, r4, asr #8
20042c: 00200444 eoreq r0, r0, r4, asr #8
200430: 00200444 eoreq r0, r0, r4, asr #8
200434: 00200444 eoreq r0, r0, r4, asr #8
200438: 00200444 eoreq r0, r0, r4, asr #8
20043c: 00200444 eoreq r0, r0, r4, asr #8
200440: 00200444 eoreq r0, r0, r4, asr #8
200444: e3500039 cmp r0, #57 ; 0x39
200448: 82400007 subhi r0, r0, #7
20044c: e1a09209 lsl r9, r9, #4
200450: e200000f and r0, r0, #15
200454: e3540015 cmp r4, #21
200458: e1809009 orr r9, r0, r9
20045c: 0a00004c beq 200594 <notmain+0x254>
200460: ebffff08 bl 200088 <uart_recv>
200464: e350003a cmp r0, #58 ; 0x3a
200468: e2844001 add r4, r4, #1
20046c: 1affffd3 bne 2003c0 <notmain+0x80>
200470: e3a04001 mov r4, #1
200474: eaffffce b 2003b4 <notmain+0x74>
200478: e1a06206 lsl r6, r6, #4
20047c: e3a04000 mov r4, #0
200480: eaffffcb b 2003b4 <notmain+0x74>
200484: e3500039 cmp r0, #57 ; 0x39
200488: 82400007 subhi r0, r0, #7
20048c: e1a06206 lsl r6, r6, #4
200490: e200000f and r0, r0, #15
200494: e1806006 orr r6, r0, r6
200498: e1a06806 lsl r6, r6, #16
20049c: e1a06826 lsr r6, r6, #16
2004a0: e2844001 add r4, r4, #1
2004a4: eaffffc2 b 2003b4 <notmain+0x74>
2004a8: e3500039 cmp r0, #57 ; 0x39
2004ac: 82400007 subhi r0, r0, #7
2004b0: e1a05205 lsl r5, r5, #4
2004b4: e200000f and r0, r0, #15
2004b8: e1805005 orr r5, r0, r5
2004bc: e20550ff and r5, r5, #255 ; 0xff
2004c0: e3550001 cmp r5, #1
2004c4: 0a000027 beq 200568 <notmain+0x228>
2004c8: 33a0400e movcc r4, #14
2004cc: 3affffb8 bcc 2003b4 <notmain+0x74>
2004d0: e3550002 cmp r5, #2
2004d4: 03a04009 moveq r4, #9
2004d8: 13a04000 movne r4, #0
2004dc: eaffffb4 b 2003b4 <notmain+0x74>
2004e0: e3500039 cmp r0, #57 ; 0x39
2004e4: 82400007 subhi r0, r0, #7
2004e8: e1a05205 lsl r5, r5, #4
2004ec: e200000f and r0, r0, #15
2004f0: e1805005 orr r5, r0, r5
2004f4: e20550ff and r5, r5, #255 ; 0xff
2004f8: e3a04008 mov r4, #8
2004fc: eaffffac b 2003b4 <notmain+0x74>
200500: e3500039 cmp r0, #57 ; 0x39
200504: 82400007 subhi r0, r0, #7
200508: e1a08208 lsl r8, r8, #4
20050c: e200000f and r0, r0, #15
200510: e1808008 orr r8, r0, r8
200514: e1a08808 lsl r8, r8, #16
200518: e1868828 orr r8, r6, r8, lsr #16
20051c: e2844001 add r4, r4, #1
200520: eaffffa3 b 2003b4 <notmain+0x74>
200524: e3a0000d mov r0, #13
200528: ebfffee9 bl 2000d4 <uart_send>
20052c: e3a0002d mov r0, #45 ; 0x2d
200530: ebfffee7 bl 2000d4 <uart_send>
200534: e3a0002d mov r0, #45 ; 0x2d
200538: ebfffee5 bl 2000d4 <uart_send>
20053c: e3a0000d mov r0, #13
200540: ebfffee3 bl 2000d4 <uart_send>
200544: e3a0000a mov r0, #10
200548: ebfffee1 bl 2000d4 <uart_send>
20054c: e3a0000a mov r0, #10
200550: ebfffedf bl 2000d4 <uart_send>
200554: e3a00902 mov r0, #32768 ; 0x8000
200558: ebfffeb5 bl 200034 <BRANCHTO>
20055c: e1a0000a mov r0, sl
200560: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
200564: e12fff1e bx lr
200568: e3a04014 mov r4, #20
20056c: e1a00007 mov r0, r7
200570: ebfffefb bl 200164 <hexstring>
200574: e2544001 subs r4, r4, #1
200578: 1afffffb bne 20056c <notmain+0x22c>
20057c: e1a07004 mov r7, r4
200580: e1a09004 mov r9, r4
200584: e1a06004 mov r6, r4
200588: e1a05004 mov r5, r4
20058c: e1a08004 mov r8, r4
200590: eaffff87 b 2003b4 <notmain+0x74>
200594: e0293869 eor r3, r9, r9, ror #16
200598: e1a03423 lsr r3, r3, #8
20059c: e3c33cff bic r3, r3, #65280 ; 0xff00
2005a0: e0239469 eor r9, r3, r9, ror #8
2005a4: e1a00008 mov r0, r8
2005a8: e0887007 add r7, r8, r7
2005ac: e1a01009 mov r1, r9
2005b0: ebfffe95 bl 20000c <PUT32>
2005b4: e0897007 add r7, r9, r7
2005b8: e2888004 add r8, r8, #4
2005bc: e3a0400e mov r4, #14
2005c0: eaffff7b b 2003b4 <notmain+0x74>
2005c4: 12345678 eorsne r5, r4, #120, 12 ; 0x7800000
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002a41 andeq r2, r0, r1, asr #20
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 4b367620 blmi d9d89c <notmain+0xb9d55c>
18: 08090600 stmdaeq r9, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0xed09e4>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6
...

BIN
boards/pi2/bootloader07/bootloader07.o Normal file
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BIN
boards/pi2/HYP/bootloader07/kernel7.img → boards/pi2/bootloader07/kernel7.img
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0
boards/pi2/HYP/bootloader07/loader → boards/pi2/bootloader07/loader
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0
boards/pi2/HYP/bootloader07/periph.c → boards/pi2/bootloader07/periph.c
View File

0
boards/pi2/HYP/bootloader07/periph.o → boards/pi2/bootloader07/periph.o
View File

BIN
bootloader07/bootloader07.clang.bin → boards/pi2/bootloader07/vectors.o Executable file → Normal file
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27
boards/pi2/HYP/bootloader07/vectors.s → boards/pi2/bootloader07/vectors.s
View File

@@ -9,6 +9,13 @@ _start:
.space 0x200000-0x8004,0
skip:
;@ stop caching !!!
;@ mrc p15,0,r2,c1,c0,0
;@ bic r2,#0x1000
;@ bic r2,#0x0004
;@ mcr p15,0,r2,c1,c0,0
mov sp,#0x08000000
bl notmain
hang: b hang
@@ -40,12 +47,32 @@ GETPC:
.globl BRANCHTO
BRANCHTO:
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
bx r0
.globl dummy
dummy:
bx lr
.globl GETCPSR
GETCPSR:
mrs r0,cpsr
bx lr
.globl GETSCTLR
GETSCTLR:
mrc p15,0,r0,c1,c0,0
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------

4
boards/pi3/README
View File

@@ -19,8 +19,8 @@ compatibility mode which runs the legacy 32 bit instruction set. See
the aarch32 directory for legacy 32 bit mode, and aarch64 for the
64 bit mode.
My preferred way to run examples is to use my bootloader07 kernel.img on
the board with an ftdi usb to uart board or cable. I also solder a
My preferred way to run examples is to use my bootloader07 kernel7.img
on the board with an ftdi usb to uart board or cable. I also solder a
momentary pushbutton on the RUN pins, which is basically a board reset.
There are ways to do this without soldering, pins you can push in rather
than solder.

3
bootloader07/Makefile
View File

@@ -71,7 +71,8 @@ LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
LLCOPS = $(LLCOPS1)
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
#OOPS = -std-compile-opts
OOPS = -std-link-opts
clang : bootloader07.clang.bin

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bootloader07/blinker.elf
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10
bootloader07/blinker.hex
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@@ -1,12 +1,12 @@
:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
:1080200070402DE98C009FE5F9FFFFEB0717C0E3D7
:10803000011781E37C009FE5F3FFFFEB78009FE5EC
:10804000F918A0E3F0FFFFEB6C009FE56C109FE5D3
:10805000EDFFFFEB68009FE5EDFFFFEB64409FE560
:108060000050A0E160009FE50118A0E3E6FFFFEBF0
:10803000011781E37C009FE5F3FFFFEBF918A0E354
:1080400074009FE5F0FFFFEB70109FE568009FE56F
:10805000EDFFFFEB68009FE5EDFFFFEB0050A0E1B7
:1080600060409FE50118A0E35C009FE5E6FFFFEBA1
:108070004C009FE5E6FFFFEB000065E0040050E1E7
:10808000FAFFFF9A3D6985E240009FE50118A0E3F1
:10808000FAFFFF9A3D6985E20118A0E33C009FE5F5
:10809000096D86E2DCFFFFEB24009FE5DCFFFFEBD0
:1080A000000066E0040050E1FAFFFF9A7A5985E289
:1080B000125D85E2EAFFFFEA0400202008B40020F8

28
bootloader07/blinker.list
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@@ -30,18 +30,18 @@ Disassembly of section .text:
8030: e3811701 orr r1, r1, #262144 ; 0x40000
8034: e59f007c ldr r0, [pc, #124] ; 80b8 <notmain+0x98>
8038: ebfffff3 bl 800c <PUT32>
803c: e59f0078 ldr r0, [pc, #120] ; 80bc <notmain+0x9c>
8040: e3a018f9 mov r1, #16318464 ; 0xf90000
803c: e3a018f9 mov r1, #16318464 ; 0xf90000
8040: e59f0074 ldr r0, [pc, #116] ; 80bc <notmain+0x9c>
8044: ebfffff0 bl 800c <PUT32>
8048: e59f006c ldr r0, [pc, #108] ; 80bc <notmain+0x9c>
804c: e59f106c ldr r1, [pc, #108] ; 80c0 <notmain+0xa0>
8048: e59f1070 ldr r1, [pc, #112] ; 80c0 <notmain+0xa0>
804c: e59f0068 ldr r0, [pc, #104] ; 80bc <notmain+0x9c>
8050: ebffffed bl 800c <PUT32>
8054: e59f0068 ldr r0, [pc, #104] ; 80c4 <notmain+0xa4>
8058: ebffffed bl 8014 <GET32>
805c: e59f4064 ldr r4, [pc, #100] ; 80c8 <notmain+0xa8>
8060: e1a05000 mov r5, r0
8064: e59f0060 ldr r0, [pc, #96] ; 80cc <notmain+0xac>
8068: e3a01801 mov r1, #65536 ; 0x10000
805c: e1a05000 mov r5, r0
8060: e59f4060 ldr r4, [pc, #96] ; 80c8 <notmain+0xa8>
8064: e3a01801 mov r1, #65536 ; 0x10000
8068: e59f005c ldr r0, [pc, #92] ; 80cc <notmain+0xac>
806c: ebffffe6 bl 800c <PUT32>
8070: e59f004c ldr r0, [pc, #76] ; 80c4 <notmain+0xa4>
8074: ebffffe6 bl 8014 <GET32>
@@ -49,8 +49,8 @@ Disassembly of section .text:
807c: e1500004 cmp r0, r4
8080: 9afffffa bls 8070 <notmain+0x50>
8084: e285693d add r6, r5, #999424 ; 0xf4000
8088: e59f0040 ldr r0, [pc, #64] ; 80d0 <notmain+0xb0>
808c: e3a01801 mov r1, #65536 ; 0x10000
8088: e3a01801 mov r1, #65536 ; 0x10000
808c: e59f003c ldr r0, [pc, #60] ; 80d0 <notmain+0xb0>
8090: e2866d09 add r6, r6, #576 ; 0x240
8094: ebffffdc bl 800c <PUT32>
8098: e59f0024 ldr r0, [pc, #36] ; 80c4 <notmain+0xa4>
@@ -77,10 +77,10 @@ Disassembly of section .ARM.attributes:
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0x620
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0xfffff9e0
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0x404
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
@@ -90,6 +90,6 @@ Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0x10c8d04>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 34202955 strtcc r2, [r0], #-2389 ; 0x955
c: 332e382e teqcc lr, #3014656 ; 0x2e0000
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6
...

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bootloader07/blinker.o Normal file
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bootloader07/blinker7.elf
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12
bootloader07/blinker7.hex
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@@ -3,13 +3,13 @@
:1080200070402DE9BC009FE5F9FFFFEB0E16C0E3A1
:10803000021681E3AC009FE5F3FFFFEBA8009FE58C
:10804000F3FFFFEB0E19C0E3021981E398009FE5EF
:10805000EDFFFFEB94009FE5F918A0E3EAFFFFEBCB
:1080600088009FE588109FE5E7FFFFEB84009FE510
:10807000E7FFFFEB80409FE50050A0E17C009FE51B
:108080000219A0E3E0FFFFEB74009FE50810A0E3F6
:10805000EDFFFFEBF918A0E390009FE5EAFFFFEBCF
:108060008C109FE584009FE5E7FFFFEB84009FE510
:10807000E7FFFFEB0050A0E17C409FE50219A0E381
:1080800078009FE5E0FFFFEB0810A0E370009FE59C
:10809000DDFFFFEB5C009FE5DDFFFFEB000065E02F
:1080A000040050E1FAFFFF9A54009FE50219A0E393
:1080B000D5FFFFEB3D6985E240009FE50810A0E396
:1080A000040050E1FAFFFF9A0219A0E350009FE597
:1080B000D5FFFFEB3D6985E20810A0E33C009FE59A
:1080C000096D86E2D0FFFFEB28009FE5D0FFFFEBB4
:1080D000000066E0040050E1FAFFFF9A7A5985E259
:1080E000125D85E2E4FFFFEA1000203F0C00203F14

108
bootloader07/blinker7.list Normal file
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@@ -0,0 +1,108 @@
blinker7.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e3a0d902 mov sp, #32768 ; 0x8000
8004: eb000005 bl 8020 <notmain>
00008008 <hang>:
8008: eafffffe b 8008 <hang>
0000800c <PUT32>:
800c: e5801000 str r1, [r0]
8010: e12fff1e bx lr
00008014 <GET32>:
8014: e5900000 ldr r0, [r0]
8018: e12fff1e bx lr
0000801c <dummy>:
801c: e12fff1e bx lr
00008020 <notmain>:
8020: e92d4070 push {r4, r5, r6, lr}
8024: e59f00bc ldr r0, [pc, #188] ; 80e8 <notmain+0xc8>
8028: ebfffff9 bl 8014 <GET32>
802c: e3c0160e bic r1, r0, #14680064 ; 0xe00000
8030: e3811602 orr r1, r1, #2097152 ; 0x200000
8034: e59f00ac ldr r0, [pc, #172] ; 80e8 <notmain+0xc8>
8038: ebfffff3 bl 800c <PUT32>
803c: e59f00a8 ldr r0, [pc, #168] ; 80ec <notmain+0xcc>
8040: ebfffff3 bl 8014 <GET32>
8044: e3c0190e bic r1, r0, #229376 ; 0x38000
8048: e3811902 orr r1, r1, #32768 ; 0x8000
804c: e59f0098 ldr r0, [pc, #152] ; 80ec <notmain+0xcc>
8050: ebffffed bl 800c <PUT32>
8054: e3a018f9 mov r1, #16318464 ; 0xf90000
8058: e59f0090 ldr r0, [pc, #144] ; 80f0 <notmain+0xd0>
805c: ebffffea bl 800c <PUT32>
8060: e59f108c ldr r1, [pc, #140] ; 80f4 <notmain+0xd4>
8064: e59f0084 ldr r0, [pc, #132] ; 80f0 <notmain+0xd0>
8068: ebffffe7 bl 800c <PUT32>
806c: e59f0084 ldr r0, [pc, #132] ; 80f8 <notmain+0xd8>
8070: ebffffe7 bl 8014 <GET32>
8074: e1a05000 mov r5, r0
8078: e59f407c ldr r4, [pc, #124] ; 80fc <notmain+0xdc>
807c: e3a01902 mov r1, #32768 ; 0x8000
8080: e59f0078 ldr r0, [pc, #120] ; 8100 <notmain+0xe0>
8084: ebffffe0 bl 800c <PUT32>
8088: e3a01008 mov r1, #8
808c: e59f0070 ldr r0, [pc, #112] ; 8104 <notmain+0xe4>
8090: ebffffdd bl 800c <PUT32>
8094: e59f005c ldr r0, [pc, #92] ; 80f8 <notmain+0xd8>
8098: ebffffdd bl 8014 <GET32>
809c: e0650000 rsb r0, r5, r0
80a0: e1500004 cmp r0, r4
80a4: 9afffffa bls 8094 <notmain+0x74>
80a8: e3a01902 mov r1, #32768 ; 0x8000
80ac: e59f0050 ldr r0, [pc, #80] ; 8104 <notmain+0xe4>
80b0: ebffffd5 bl 800c <PUT32>
80b4: e285693d add r6, r5, #999424 ; 0xf4000
80b8: e3a01008 mov r1, #8
80bc: e59f003c ldr r0, [pc, #60] ; 8100 <notmain+0xe0>
80c0: e2866d09 add r6, r6, #576 ; 0x240
80c4: ebffffd0 bl 800c <PUT32>
80c8: e59f0028 ldr r0, [pc, #40] ; 80f8 <notmain+0xd8>
80cc: ebffffd0 bl 8014 <GET32>
80d0: e0660000 rsb r0, r6, r0
80d4: e1500004 cmp r0, r4
80d8: 9afffffa bls 80c8 <notmain+0xa8>
80dc: e285597a add r5, r5, #1998848 ; 0x1e8000
80e0: e2855d12 add r5, r5, #1152 ; 0x480
80e4: eaffffe4 b 807c <notmain+0x5c>
80e8: 3f200010 svccc 0x00200010
80ec: 3f20000c svccc 0x0020000c
80f0: 3f00b408 svccc 0x0000b408
80f4: 00f90200 rscseq r0, r9, r0, lsl #4
80f8: 3f00b420 svccc 0x0000b420
80fc: 000f423f andeq r4, pc, pc, lsr r2 ; <UNPREDICTABLE>
8100: 3f200020 svccc 0x00200020
8104: 3f20002c svccc 0x0020002c
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002a41 andeq r2, r0, r1, asr #20
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0xfffff9e0
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0x10c8d04>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6
...

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bootloader07/blinker7.o Normal file
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bootloader07/bootloader07.clang.elf
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bootloader07/bootloader07.o Normal file
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122
bootloader07/bootloader07_rpi1.hex
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@@ -129058,82 +129058,82 @@
:1000000002D3A0E3A60000EBFEFFFFEA001080E5AC
:100010001EFF2FE1B010C0E11EFF2FE10010C0E570
:100020001EFF2FE1000090E51EFF2FE10E00A0E172
:100030001EFF2FE110FF2FE11EFF2FE108402DE9E9
:1000400008009FE5F6FFFFEB0840BDE81EFF2FE12B
:100050005450212008402DE91C009FE5F0FFFFEBE4
:100030001EFF2FE110FF2FE11EFF2FE110402DE9E1
:1000400008009FE5F6FFFFEB1040BDE81EFF2FE123
:100050005450212010402DE91C009FE5F0FFFFEBDC
:10006000010010E3FBFFFF0A10009FE5ECFFFFEB30
:100070000840BDE8FF0000E21EFF2FE154502120A0
:100080004050212008402DE90C009FE5E4FFFFEBE4
:100090000840BDE8010000E21EFF2FE1545021207E
:100070001040BDE8FF0000E21EFF2FE15450212098
:100080004050212010402DE90C009FE5E4FFFFEBDC
:100090001040BDE8010000E21EFF2FE15450212076
:1000A00010402DE90040A0E11C009FE5DCFFFFEBC4
:1000B000200010E3FBFFFF0A0410A0E10C009FE505
:1000C000D1FFFFEB1040BDE81EFF2FE1545021206F
:1000D0004050212008402DE910009FE5D0FFFFEBA4
:1000E000010C10E3FBFFFF1A0840BDE81EFF2FE1E3
:1000F0005450212038402DE90050A0E12040A0E3D9
:10010000044044E23534A0E10F3003E2090053E338
:100110003700838230008392E0FFFFEB000054E35E
:10012000F6FFFF1A2000A0E33840BDE8DBFFFFEA3E
:1001300008402DE9EEFFFFEB0D00A0E3D7FFFFEB3A
:100140000A00A0E30840BDE8D4FFFFEA10402DE913
:10015000D8009FE50110A0E3ABFFFFEBD0009FE5C7
:100160000010A0E3A8FFFFEBC8009FE50010A0E38C
:10017000A5FFFFEBC0009FE50310A0E3A2FFFFEB8C
:10018000B8009FE50010A0E39FFFFFEBA0009FE5F4
:100190000010A0E39CFFFFEBA4009FE5C610A0E3C6
:1000D0004050212010402DE910009FE5D0FFFFEB9C
:1000E000010C10E3FBFFFF1A1040BDE81EFF2FE1DB
:1000F0005450212070402DE90050A0E12040A0E3A1
:10010000044044E23504A0E10F0000E2090050E39E
:100110003700808230008092E0FFFFEB000054E364
:10012000F6FFFF1A2000A0E37040BDE8DBFFFFEA06
:1001300010402DE9EEFFFFEB0D00A0E3D7FFFFEB32
:100140000A00A0E31040BDE8D4FFFFEA10402DE90B
:100150000110A0E3D4009FE5ABFFFFEB0010A0E38C
:10016000CC009FE5A8FFFFEB0010A0E3C4009FE5D3
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:100180000010A0E3B4009FE59FFFFFEB0010A0E389
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:1001C00088009FE590FFFFEB0010A0E380009FE513
:1001D0008DFFFFEB0040A0E30400A0E1014084E2BA
:1001E00094FFFFEB960054E3FAFFFF1A64009FE5CB
:1001F0000319A0E384FFFFEB0040A0E30400A0E1AB
:1001E00094FFFFEB960054E3FAFFFF1A0319A0E314
:1001F00060009FE584FFFFEB0040A0E30400A0E166
:10020000014084E28BFFFFEB960054E3FAFFFF1AF4
:1002100040009FE50010A0E37BFFFFEB14009FE58B
:100220000310A0E378FFFFEB1040BDE81EFF2FE1B5
:100210000010A0E33C009FE57BFFFFEB0310A0E391
:1002200010009FE578FFFFEB1040BDE81EFF2FE1B7
:100230000450212044502120605021204C50212086
:1002400050502120485021200E01000068502120EC
:1002500004002020940020209800202010402DE948
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:100280001EFF2FE108B400200002F90008402DE90C
:1002900008009FE562FFFFEB0840BDE81EFF2FE16D
:1002A00020B40020F8432DE9A7FFFFEB44029FE5AF
:1002B0009EFFFFEB5CFFFFEB9CFFFFEB4900A0E321
:1002C00076FFFFEB4800A0E374FFFFEB4500A0E3DF
:1002D00072FFFFEB5800A0E370FFFFEB0D00A0E3FF
:1002E0006EFFFFEB0A00A0E36CFFFFEB0070A0E3E2
:1002F0000780A0E10760A0E10750A0E10790A0E11E
:100300000740A0E152FFFFEB3A0050E32A00000A49
:100310000D0050E35400000A0A0050E35200000AA6
:100320002030C0E3470053E35100000A013044E2AB
:10033000140053E303F19F97F1FFFFEAAC032000A1
:10034000AC0320004804200048042000480420009A
:100350004804200028042000F4032000D0032000DB
:10036000D0032000D0032000D0032000C4032000CD
:1003700090032000900320009003200090032000B1
:1003800090032000900320009003200090032000A1
:10039000390050E3070040820882A0E10F0000E22C
:1003A000150054E3088080E14200000A28FFFFEBBB
:1003B0003A0050E3014084E2D4FFFF1A0140A0E379
:1003C000CFFFFFEA0662A0E10040A0E3CCFFFFEA16
:1003D000390050E3070040820662A0E10F0000E20E
:1003E000066080E10668A0E12668A0E1014084E2A1
:1003F000C3FFFFEA390050E3070040820552A0E145
:100400000F0000E2055080E1FF5005E2010055E3D6
:100410003400000A3100003A020055E30940A0030D
:100420000040A013B6FFFFEA390050E30700408206
:100430000552A0E10F0000E2055080E1FF5005E207
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:100450000992A0E10F0000E2099080E10998A0E173
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:100280001EFF2FE108B400200002F90010402DE904
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:1002A00020B40020F0472DE90080A0E3A6FFFFEB7B
:1002B00040029FE59DFFFFEB5BFFFFEB9BFFFFEB2A
:1002C0004900A0E375FFFFEB4800A0E373FFFFEBDD
:1002D0004500A0E371FFFFEB5800A0E36FFFFFEBC9
:1002E0000D00A0E36DFFFFEB0A00A0E30890A0E182
:1002F0000860A0E10850A0E10870A0E10840A0E17A
:1003000066FFFFEB52FFFFEB3A0050E32B00000AC1
:100310000D0050E30A00501301A0A00300A0A01399
:100320002900000A2030C0E3470053E35000000AD0
:10033000013044E2140053E303F19F97F0FFFFEA1A
:10034000B0032000B003200050042000500420001F
:10035000500420005004200030042000F803200046
:10036000D4032000D4032000D4032000D4032000B1
:10037000C80320009403200094032000940320006D
:100380009403200094032000940320009403200091
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:1003A0000F0000E2150054E3099080E14500000AC7
:1003B00027FFFFEB3A0050E3014084E2D3FFFF1A2E
:1003C0000140A0E3CEFFFFEA0662A0E10040A0E307
:1003D000CBFFFFEA390050E3070040820662A0E14C
:1003E0000F0000E2066080E10668A0E12668A0E157
:1003F000014084E2C2FFFFEA390050E30700408277
:100400000552A0E10F0000E2055080E1FF5005E237
:10041000010055E32700000A0E40A033B8FFFF3A61
:10042000020055E30940A0030040A013B4FFFFEA17
:10043000390050E3070040820552A0E10F0000E2BE
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:1004A000FEFEFFEB0209A0E3E1FEFFEB0000A0E38C
:1004B000F843BDE81EFF2FE1683828E02334A0E1AF
:1004C000FF3CC3E3688423E00900A0E10810A0E139
:1004D000CDFEFFEB097087E0087087E0049089E2A9
:1004E0000E40A0E386FFFFEA0700A0E10FFFFFEB4D
:0C04F0000040A0E382FFFFEA78563412BF
:1004A000FEFEFFEB0209A0E3E1FEFFEB0A00A0E184
:1004B000F047BDE81EFF2FE10800A0E11BFFFFEBA6
:1004C0000040A0E38EFFFFEA693829E02334A0E171
:1004D000FF3CC3E3699423E00700A0E1088087E0C4
:1004E0000910A0E1C8FEFFEB088089E0047087E2F4
:0C04F0000E40A0E382FFFFEA78563412B1
:040000030000800079
:00000001FF

350
bootloader07/bootloader07.list → bootloader07/bootloader07_rpi1.list
View File

@@ -1,5 +1,5 @@
bootloader07.elf: file format elf32-littlearm
bootloader07_rpi1.elf: file format elf32-littlearm
Disassembly of section .text:
@@ -42,32 +42,32 @@ Disassembly of section .text:
200038: e12fff1e bx lr
0020003c <uart_lcr>:
20003c: e92d4008 push {r3, lr}
20003c: e92d4010 push {r4, lr}
200040: e59f0008 ldr r0, [pc, #8] ; 200050 <uart_lcr+0x14>
200044: ebfffff6 bl 200024 <GET32>
200048: e8bd4008 pop {r3, lr}
200048: e8bd4010 pop {r4, lr}
20004c: e12fff1e bx lr
200050: 20215054 eorcs r5, r1, r4, asr r0
00200054 <uart_recv>:
200054: e92d4008 push {r3, lr}
200054: e92d4010 push {r4, lr}
200058: e59f001c ldr r0, [pc, #28] ; 20007c <uart_recv+0x28>
20005c: ebfffff0 bl 200024 <GET32>
200060: e3100001 tst r0, #1
200064: 0afffffb beq 200058 <uart_recv+0x4>
200068: e59f0010 ldr r0, [pc, #16] ; 200080 <uart_recv+0x2c>
20006c: ebffffec bl 200024 <GET32>
200070: e8bd4008 pop {r3, lr}
200070: e8bd4010 pop {r4, lr}
200074: e20000ff and r0, r0, #255 ; 0xff
200078: e12fff1e bx lr
20007c: 20215054 eorcs r5, r1, r4, asr r0
200080: 20215040 eorcs r5, r1, r0, asr #32
00200084 <uart_check>:
200084: e92d4008 push {r3, lr}
200084: e92d4010 push {r4, lr}
200088: e59f000c ldr r0, [pc, #12] ; 20009c <uart_check+0x18>
20008c: ebffffe4 bl 200024 <GET32>
200090: e8bd4008 pop {r3, lr}
200090: e8bd4010 pop {r4, lr}
200094: e2000001 and r0, r0, #1
200098: e12fff1e bx lr
20009c: 20215054 eorcs r5, r1, r4, asr r0
@@ -88,63 +88,63 @@ Disassembly of section .text:
2000d0: 20215040 eorcs r5, r1, r0, asr #32
002000d4 <uart_flush>:
2000d4: e92d4008 push {r3, lr}
2000d4: e92d4010 push {r4, lr}
2000d8: e59f0010 ldr r0, [pc, #16] ; 2000f0 <uart_flush+0x1c>
2000dc: ebffffd0 bl 200024 <GET32>
2000e0: e3100c01 tst r0, #256 ; 0x100
2000e4: 1afffffb bne 2000d8 <uart_flush+0x4>
2000e8: e8bd4008 pop {r3, lr}
2000e8: e8bd4010 pop {r4, lr}
2000ec: e12fff1e bx lr
2000f0: 20215054 eorcs r5, r1, r4, asr r0
002000f4 <hexstrings>:
2000f4: e92d4038 push {r3, r4, r5, lr}
2000f4: e92d4070 push {r4, r5, r6, lr}
2000f8: e1a05000 mov r5, r0
2000fc: e3a04020 mov r4, #32
200100: e2444004 sub r4, r4, #4
200104: e1a03435 lsr r3, r5, r4
200108: e203300f and r3, r3, #15
20010c: e3530009 cmp r3, #9
200110: 82830037 addhi r0, r3, #55 ; 0x37
200114: 92830030 addls r0, r3, #48 ; 0x30
200104: e1a00435 lsr r0, r5, r4
200108: e200000f and r0, r0, #15
20010c: e3500009 cmp r0, #9
200110: 82800037 addhi r0, r0, #55 ; 0x37
200114: 92800030 addls r0, r0, #48 ; 0x30
200118: ebffffe0 bl 2000a0 <uart_send>
20011c: e3540000 cmp r4, #0
200120: 1afffff6 bne 200100 <hexstrings+0xc>
200124: e3a00020 mov r0, #32
200128: e8bd4038 pop {r3, r4, r5, lr}
200128: e8bd4070 pop {r4, r5, r6, lr}
20012c: eaffffdb b 2000a0 <uart_send>
00200130 <hexstring>:
200130: e92d4008 push {r3, lr}
200130: e92d4010 push {r4, lr}
200134: ebffffee bl 2000f4 <hexstrings>
200138: e3a0000d mov r0, #13
20013c: ebffffd7 bl 2000a0 <uart_send>
200140: e3a0000a mov r0, #10
200144: e8bd4008 pop {r3, lr}
200144: e8bd4010 pop {r4, lr}
200148: eaffffd4 b 2000a0 <uart_send>
0020014c <uart_init>:
20014c: e92d4010 push {r4, lr}
200150: e59f00d8 ldr r0, [pc, #216] ; 200230 <uart_init+0xe4>
200154: e3a01001 mov r1, #1
200150: e3a01001 mov r1, #1
200154: e59f00d4 ldr r0, [pc, #212] ; 200230 <uart_init+0xe4>
200158: ebffffab bl 20000c <PUT32>
20015c: e59f00d0 ldr r0, [pc, #208] ; 200234 <uart_init+0xe8>
200160: e3a01000 mov r1, #0
20015c: e3a01000 mov r1, #0
200160: e59f00cc ldr r0, [pc, #204] ; 200234 <uart_init+0xe8>
200164: ebffffa8 bl 20000c <PUT32>
200168: e59f00c8 ldr r0, [pc, #200] ; 200238 <uart_init+0xec>
20016c: e3a01000 mov r1, #0
200168: e3a01000 mov r1, #0
20016c: e59f00c4 ldr r0, [pc, #196] ; 200238 <uart_init+0xec>
200170: ebffffa5 bl 20000c <PUT32>
200174: e59f00c0 ldr r0, [pc, #192] ; 20023c <uart_init+0xf0>
200178: e3a01003 mov r1, #3
200174: e3a01003 mov r1, #3
200178: e59f00bc ldr r0, [pc, #188] ; 20023c <uart_init+0xf0>
20017c: ebffffa2 bl 20000c <PUT32>
200180: e59f00b8 ldr r0, [pc, #184] ; 200240 <uart_init+0xf4>
200184: e3a01000 mov r1, #0
200180: e3a01000 mov r1, #0
200184: e59f00b4 ldr r0, [pc, #180] ; 200240 <uart_init+0xf4>
200188: ebffff9f bl 20000c <PUT32>
20018c: e59f00a0 ldr r0, [pc, #160] ; 200234 <uart_init+0xe8>
200190: e3a01000 mov r1, #0
20018c: e3a01000 mov r1, #0
200190: e59f009c ldr r0, [pc, #156] ; 200234 <uart_init+0xe8>
200194: ebffff9c bl 20000c <PUT32>
200198: e59f00a4 ldr r0, [pc, #164] ; 200244 <uart_init+0xf8>
20019c: e3a010c6 mov r1, #198 ; 0xc6
200198: e3a010c6 mov r1, #198 ; 0xc6
20019c: e59f00a0 ldr r0, [pc, #160] ; 200244 <uart_init+0xf8>
2001a0: ebffff99 bl 20000c <PUT32>
2001a4: e59f109c ldr r1, [pc, #156] ; 200248 <uart_init+0xfc>
2001a8: e59f009c ldr r0, [pc, #156] ; 20024c <uart_init+0x100>
@@ -155,8 +155,8 @@ Disassembly of section .text:
2001bc: e3811a12 orr r1, r1, #73728 ; 0x12000
2001c0: e59f0088 ldr r0, [pc, #136] ; 200250 <uart_init+0x104>
2001c4: ebffff90 bl 20000c <PUT32>
2001c8: e59f0084 ldr r0, [pc, #132] ; 200254 <uart_init+0x108>
2001cc: e3a01000 mov r1, #0
2001c8: e3a01000 mov r1, #0
2001cc: e59f0080 ldr r0, [pc, #128] ; 200254 <uart_init+0x108>
2001d0: ebffff8d bl 20000c <PUT32>
2001d4: e3a04000 mov r4, #0
2001d8: e1a00004 mov r0, r4
@@ -164,8 +164,8 @@ Disassembly of section .text:
2001e0: ebffff94 bl 200038 <dummy>
2001e4: e3540096 cmp r4, #150 ; 0x96
2001e8: 1afffffa bne 2001d8 <uart_init+0x8c>
2001ec: e59f0064 ldr r0, [pc, #100] ; 200258 <uart_init+0x10c>
2001f0: e3a01903 mov r1, #49152 ; 0xc000
2001ec: e3a01903 mov r1, #49152 ; 0xc000
2001f0: e59f0060 ldr r0, [pc, #96] ; 200258 <uart_init+0x10c>
2001f4: ebffff84 bl 20000c <PUT32>
2001f8: e3a04000 mov r4, #0
2001fc: e1a00004 mov r0, r4
@@ -173,11 +173,11 @@ Disassembly of section .text:
200204: ebffff8b bl 200038 <dummy>
200208: e3540096 cmp r4, #150 ; 0x96
20020c: 1afffffa bne 2001fc <uart_init+0xb0>
200210: e59f0040 ldr r0, [pc, #64] ; 200258 <uart_init+0x10c>
200214: e3a01000 mov r1, #0
200210: e3a01000 mov r1, #0
200214: e59f003c ldr r0, [pc, #60] ; 200258 <uart_init+0x10c>
200218: ebffff7b bl 20000c <PUT32>
20021c: e59f0014 ldr r0, [pc, #20] ; 200238 <uart_init+0xec>
200220: e3a01003 mov r1, #3
20021c: e3a01003 mov r1, #3
200220: e59f0010 ldr r0, [pc, #16] ; 200238 <uart_init+0xec>
200224: ebffff78 bl 20000c <PUT32>
200228: e8bd4010 pop {r4, lr}
20022c: e12fff1e bx lr
@@ -208,129 +208,129 @@ Disassembly of section .text:
200288: 00f90200 rscseq r0, r9, r0, lsl #4
0020028c <timer_tick>:
20028c: e92d4008 push {r3, lr}
20028c: e92d4010 push {r4, lr}
200290: e59f0008 ldr r0, [pc, #8] ; 2002a0 <timer_tick+0x14>
200294: ebffff62 bl 200024 <GET32>
200298: e8bd4008 pop {r3, lr}
200298: e8bd4010 pop {r4, lr}
20029c: e12fff1e bx lr
2002a0: 2000b420 andcs fp, r0, r0, lsr #8
002002a4 <notmain>:
2002a4: e92d43f8 push {r3, r4, r5, r6, r7, r8, r9, lr}
2002a8: ebffffa7 bl 20014c <uart_init>
2002ac: e59f0244 ldr r0, [pc, #580] ; 2004f8 <notmain+0x254>
2002b0: ebffff9e bl 200130 <hexstring>
2002b4: ebffff5c bl 20002c <GETPC>
2002b8: ebffff9c bl 200130 <hexstring>
2002bc: e3a00049 mov r0, #73 ; 0x49
2002c0: ebffff76 bl 2000a0 <uart_send>
2002c4: e3a00048 mov r0, #72 ; 0x48
2002c8: ebffff74 bl 2000a0 <uart_send>
2002cc: e3a00045 mov r0, #69 ; 0x45
2002d0: ebffff72 bl 2000a0 <uart_send>
2002d4: e3a00058 mov r0, #88 ; 0x58
2002d8: ebffff70 bl 2000a0 <uart_send>
2002dc: e3a0000d mov r0, #13
2002e0: ebffff6e bl 2000a0 <uart_send>
2002e4: e3a0000a mov r0, #10
2002e8: ebffff6c bl 2000a0 <uart_send>
2002ec: e3a07000 mov r7, #0
2002f0: e1a08007 mov r8, r7
2002f4: e1a06007 mov r6, r7
2002f8: e1a05007 mov r5, r7
2002fc: e1a09007 mov r9, r7
200300: e1a04007 mov r4, r7
2002a4: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
2002a8: e3a08000 mov r8, #0
2002ac: ebffffa6 bl 20014c <uart_init>
2002b0: e59f0240 ldr r0, [pc, #576] ; 2004f8 <notmain+0x254>
2002b4: ebffff9d bl 200130 <hexstring>
2002b8: ebffff5b bl 20002c <GETPC>
2002bc: ebffff9b bl 200130 <hexstring>
2002c0: e3a00049 mov r0, #73 ; 0x49
2002c4: ebffff75 bl 2000a0 <uart_send>
2002c8: e3a00048 mov r0, #72 ; 0x48
2002cc: ebffff73 bl 2000a0 <uart_send>
2002d0: e3a00045 mov r0, #69 ; 0x45
2002d4: ebffff71 bl 2000a0 <uart_send>
2002d8: e3a00058 mov r0, #88 ; 0x58
2002dc: ebffff6f bl 2000a0 <uart_send>
2002e0: e3a0000d mov r0, #13
2002e4: ebffff6d bl 2000a0 <uart_send>
2002e8: e3a0000a mov r0, #10
2002ec: e1a09008 mov r9, r8
2002f0: e1a06008 mov r6, r8
2002f4: e1a05008 mov r5, r8
2002f8: e1a07008 mov r7, r8
2002fc: e1a04008 mov r4, r8
200300: ebffff66 bl 2000a0 <uart_send>
200304: ebffff52 bl 200054 <uart_recv>
200308: e350003a cmp r0, #58 ; 0x3a
20030c: 0a00002a beq 2003bc <notmain+0x118>
20030c: 0a00002b beq 2003c0 <notmain+0x11c>
200310: e350000d cmp r0, #13
200314: 0a000054 beq 20046c <notmain+0x1c8>
200318: e350000a cmp r0, #10
20031c: 0a000052 beq 20046c <notmain+0x1c8>
200320: e3c03020 bic r3, r0, #32
200324: e3530047 cmp r3, #71 ; 0x47
200328: 0a000051 beq 200474 <notmain+0x1d0>
20032c: e2443001 sub r3, r4, #1
200330: e3530014 cmp r3, #20
200334: 979ff103 ldrls pc, [pc, r3, lsl #2]
200338: eafffff1 b 200304 <notmain+0x60>
20033c: 002003ac eoreq r0, r0, ip, lsr #7
200340: 002003ac eoreq r0, r0, ip, lsr #7
200344: 00200448 eoreq r0, r0, r8, asr #8
200348: 00200448 eoreq r0, r0, r8, asr #8
20034c: 00200448 eoreq r0, r0, r8, asr #8
200350: 00200448 eoreq r0, r0, r8, asr #8
200354: 00200428 eoreq r0, r0, r8, lsr #8
200358: 002003f4 strdeq r0, [r0], -r4 ; <UNPREDICTABLE>
20035c: 002003d0 ldrdeq r0, [r0], -r0 ; <UNPREDICTABLE>
200360: 002003d0 ldrdeq r0, [r0], -r0 ; <UNPREDICTABLE>
200364: 002003d0 ldrdeq r0, [r0], -r0 ; <UNPREDICTABLE>
200368: 002003d0 ldrdeq r0, [r0], -r0 ; <UNPREDICTABLE>
20036c: 002003c4 eoreq r0, r0, r4, asr #7
200370: 00200390 mlaeq r0, r0, r3, r0
200374: 00200390 mlaeq r0, r0, r3, r0
200378: 00200390 mlaeq r0, r0, r3, r0
20037c: 00200390 mlaeq r0, r0, r3, r0
200380: 00200390 mlaeq r0, r0, r3, r0
200384: 00200390 mlaeq r0, r0, r3, r0
200388: 00200390 mlaeq r0, r0, r3, r0
20038c: 00200390 mlaeq r0, r0, r3, r0
200390: e3500039 cmp r0, #57 ; 0x39
200394: 82400007 subhi r0, r0, #7
200398: e1a08208 lsl r8, r8, #4
20039c: e200000f and r0, r0, #15
2003a0: e3540015 cmp r4, #21
2003a4: e1808008 orr r8, r0, r8
2003a8: 0a000042 beq 2004b8 <notmain+0x214>
2003ac: ebffff28 bl 200054 <uart_recv>
2003b0: e350003a cmp r0, #58 ; 0x3a
2003b4: e2844001 add r4, r4, #1
2003b8: 1affffd4 bne 200310 <notmain+0x6c>
2003bc: e3a04001 mov r4, #1
2003c0: eaffffcf b 200304 <notmain+0x60>
2003c4: e1a06206 lsl r6, r6, #4
2003c8: e3a04000 mov r4, #0
2003cc: eaffffcc b 200304 <notmain+0x60>
2003d0: e3500039 cmp r0, #57 ; 0x39
2003d4: 82400007 subhi r0, r0, #7
2003d8: e1a06206 lsl r6, r6, #4
2003dc: e200000f and r0, r0, #15
2003e0: e1806006 orr r6, r0, r6
2003e4: e1a06806 lsl r6, r6, #16
2003e8: e1a06826 lsr r6, r6, #16
2003ec: e2844001 add r4, r4, #1
2003f0: eaffffc3 b 200304 <notmain+0x60>
2003f4: e3500039 cmp r0, #57 ; 0x39
2003f8: 82400007 subhi r0, r0, #7
2003fc: e1a05205 lsl r5, r5, #4
200400: e200000f and r0, r0, #15
200404: e1805005 orr r5, r0, r5
200408: e20550ff and r5, r5, #255 ; 0xff
20040c: e3550001 cmp r5, #1
200410: 0a000034 beq 2004e8 <notmain+0x244>
200414: 3a000031 bcc 2004e0 <notmain+0x23c>
200418: e3550002 cmp r5, #2
20041c: 03a04009 moveq r4, #9
200420: 13a04000 movne r4, #0
200424: eaffffb6 b 200304 <notmain+0x60>
200428: e3500039 cmp r0, #57 ; 0x39
20042c: 82400007 subhi r0, r0, #7
200430: e1a05205 lsl r5, r5, #4
200434: e200000f and r0, r0, #15
200438: e1805005 orr r5, r0, r5
20043c: e20550ff and r5, r5, #255 ; 0xff
200440: e3a04008 mov r4, #8
200444: eaffffae b 200304 <notmain+0x60>
200448: e3500039 cmp r0, #57 ; 0x39
20044c: 82400007 subhi r0, r0, #7
200450: e1a09209 lsl r9, r9, #4
200454: e200000f and r0, r0, #15
200458: e1809009 orr r9, r0, r9
20045c: e1a09809 lsl r9, r9, #16
200460: e1869829 orr r9, r6, r9, lsr #16
200464: e2844001 add r4, r4, #1
200468: eaffffa5 b 200304 <notmain+0x60>
20046c: e3a04000 mov r4, #0
200314: 1350000a cmpne r0, #10
200318: 03a0a001 moveq sl, #1
20031c: 13a0a000 movne sl, #0
200320: 0a000029 beq 2003cc <notmain+0x128>
200324: e3c03020 bic r3, r0, #32
200328: e3530047 cmp r3, #71 ; 0x47
20032c: 0a000050 beq 200474 <notmain+0x1d0>
200330: e2443001 sub r3, r4, #1
200334: e3530014 cmp r3, #20
200338: 979ff103 ldrls pc, [pc, r3, lsl #2]
20033c: eafffff0 b 200304 <notmain+0x60>
200340: 002003b0 strhteq r0, [r0], -r0
200344: 002003b0 strhteq r0, [r0], -r0
200348: 00200450 eoreq r0, r0, r0, asr r4
20034c: 00200450 eoreq r0, r0, r0, asr r4
200350: 00200450 eoreq r0, r0, r0, asr r4
200354: 00200450 eoreq r0, r0, r0, asr r4
200358: 00200430 eoreq r0, r0, r0, lsr r4
20035c: 002003f8 strdeq r0, [r0], -r8 ; <UNPREDICTABLE>
200360: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200364: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200368: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
20036c: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200370: 002003c8 eoreq r0, r0, r8, asr #7
200374: 00200394 mlaeq r0, r4, r3, r0
200378: 00200394 mlaeq r0, r4, r3, r0
20037c: 00200394 mlaeq r0, r4, r3, r0
200380: 00200394 mlaeq r0, r4, r3, r0
200384: 00200394 mlaeq r0, r4, r3, r0
200388: 00200394 mlaeq r0, r4, r3, r0
20038c: 00200394 mlaeq r0, r4, r3, r0
200390: 00200394 mlaeq r0, r4, r3, r0
200394: e3500039 cmp r0, #57 ; 0x39
200398: 82400007 subhi r0, r0, #7
20039c: e1a09209 lsl r9, r9, #4
2003a0: e200000f and r0, r0, #15
2003a4: e3540015 cmp r4, #21
2003a8: e1809009 orr r9, r0, r9
2003ac: 0a000045 beq 2004c8 <notmain+0x224>
2003b0: ebffff27 bl 200054 <uart_recv>
2003b4: e350003a cmp r0, #58 ; 0x3a
2003b8: e2844001 add r4, r4, #1
2003bc: 1affffd3 bne 200310 <notmain+0x6c>
2003c0: e3a04001 mov r4, #1
2003c4: eaffffce b 200304 <notmain+0x60>
2003c8: e1a06206 lsl r6, r6, #4
2003cc: e3a04000 mov r4, #0
2003d0: eaffffcb b 200304 <notmain+0x60>
2003d4: e3500039 cmp r0, #57 ; 0x39
2003d8: 82400007 subhi r0, r0, #7
2003dc: e1a06206 lsl r6, r6, #4
2003e0: e200000f and r0, r0, #15
2003e4: e1806006 orr r6, r0, r6
2003e8: e1a06806 lsl r6, r6, #16
2003ec: e1a06826 lsr r6, r6, #16
2003f0: e2844001 add r4, r4, #1
2003f4: eaffffc2 b 200304 <notmain+0x60>
2003f8: e3500039 cmp r0, #57 ; 0x39
2003fc: 82400007 subhi r0, r0, #7
200400: e1a05205 lsl r5, r5, #4
200404: e200000f and r0, r0, #15
200408: e1805005 orr r5, r0, r5
20040c: e20550ff and r5, r5, #255 ; 0xff
200410: e3550001 cmp r5, #1
200414: 0a000027 beq 2004b8 <notmain+0x214>
200418: 33a0400e movcc r4, #14
20041c: 3affffb8 bcc 200304 <notmain+0x60>
200420: e3550002 cmp r5, #2
200424: 03a04009 moveq r4, #9
200428: 13a04000 movne r4, #0
20042c: eaffffb4 b 200304 <notmain+0x60>
200430: e3500039 cmp r0, #57 ; 0x39
200434: 82400007 subhi r0, r0, #7
200438: e1a05205 lsl r5, r5, #4
20043c: e200000f and r0, r0, #15
200440: e1805005 orr r5, r0, r5
200444: e20550ff and r5, r5, #255 ; 0xff
200448: e3a04008 mov r4, #8
20044c: eaffffac b 200304 <notmain+0x60>
200450: e3500039 cmp r0, #57 ; 0x39
200454: 82400007 subhi r0, r0, #7
200458: e1a07207 lsl r7, r7, #4
20045c: e200000f and r0, r0, #15
200460: e1807007 orr r7, r0, r7
200464: e1a07807 lsl r7, r7, #16
200468: e1867827 orr r7, r6, r7, lsr #16
20046c: e2844001 add r4, r4, #1
200470: eaffffa3 b 200304 <notmain+0x60>
200474: e3a0000d mov r0, #13
200478: ebffff08 bl 2000a0 <uart_send>
@@ -346,24 +346,24 @@ Disassembly of section .text:
2004a0: ebfffefe bl 2000a0 <uart_send>
2004a4: e3a00902 mov r0, #32768 ; 0x8000
2004a8: ebfffee1 bl 200034 <BRANCHTO>
2004ac: e3a00000 mov r0, #0
2004b0: e8bd43f8 pop {r3, r4, r5, r6, r7, r8, r9, lr}
2004ac: e1a0000a mov r0, sl
2004b0: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
2004b4: e12fff1e bx lr
2004b8: e0283868 eor r3, r8, r8, ror #16
2004bc: e1a03423 lsr r3, r3, #8
2004c0: e3c33cff bic r3, r3, #65280 ; 0xff00
2004c4: e0238468 eor r8, r3, r8, ror #8
2004c8: e1a00009 mov r0, r9
2004cc: e1a01008 mov r1, r8
2004d0: ebfffecd bl 20000c <PUT32>
2004d4: e0877009 add r7, r7, r9
2004d8: e0877008 add r7, r7, r8
2004dc: e2899004 add r9, r9, #4
2004e0: e3a0400e mov r4, #14
2004e4: eaffff86 b 200304 <notmain+0x60>
2004e8: e1a00007 mov r0, r7
2004ec: ebffff0f bl 200130 <hexstring>
2004f0: e3a04000 mov r4, #0
2004b8: e1a00008 mov r0, r8
2004bc: ebffff1b bl 200130 <hexstring>
2004c0: e3a04000 mov r4, #0
2004c4: eaffff8e b 200304 <notmain+0x60>
2004c8: e0293869 eor r3, r9, r9, ror #16
2004cc: e1a03423 lsr r3, r3, #8
2004d0: e3c33cff bic r3, r3, #65280 ; 0xff00
2004d4: e0239469 eor r9, r3, r9, ror #8
2004d8: e1a00007 mov r0, r7
2004dc: e0878008 add r8, r7, r8
2004e0: e1a01009 mov r1, r9
2004e4: ebfffec8 bl 20000c <PUT32>
2004e8: e0898008 add r8, r9, r8
2004ec: e2877004 add r7, r7, #4
2004f0: e3a0400e mov r4, #14
2004f4: eaffff82 b 200304 <notmain+0x60>
2004f8: 12345678 eorsne r5, r4, #120, 12 ; 0x7800000
@@ -375,10 +375,10 @@ Disassembly of section .ARM.attributes:
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0x620
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0xfffff9e0
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0x404
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
@@ -388,6 +388,6 @@ Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0xed0a80>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 34202955 strtcc r2, [r0], #-2389 ; 0x955
c: 332e382e teqcc lr, #3014656 ; 0x2e0000
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6
...

BIN
bootloader07/bootloader07_rpi2.elf
View File

Binary file not shown.

122
bootloader07/bootloader07_rpi2.hex
View File

@@ -129058,82 +129058,82 @@
:1000000002D3A0E3A60000EBFEFFFFEA001080E5AC
:100010001EFF2FE1B010C0E11EFF2FE10010C0E570
:100020001EFF2FE1000090E51EFF2FE10E00A0E172
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:00000001FF

337
boards/pi2/HYP/bootloader07/bootloader07_rpi1.list → bootloader07/bootloader07_rpi2.list
View File

@@ -1,5 +1,5 @@
bootloader07_rpi1.elf: file format elf32-littlearm
bootloader07_rpi2.elf: file format elf32-littlearm
Disassembly of section .text:
@@ -10,7 +10,7 @@ Disassembly of section .text:
00200000 <skip>:
200000: e3a0d302 mov sp, #134217728 ; 0x8000000
200004: eb0000c0 bl 20030c <notmain>
200004: eb0000a6 bl 2002a4 <notmain>
00200008 <hang>:
200008: eafffffe b 200008 <hang>
@@ -215,186 +215,157 @@ Disassembly of section .text:
20029c: e12fff1e bx lr
2002a0: 3f00b420 svccc 0x0000b420
002002a4 <leds_off>:
2002a4: e92d4070 push {r4, r5, r6, lr}
2002a8: e59f4054 ldr r4, [pc, #84] ; 200304 <leds_off+0x60>
2002ac: e1a00004 mov r0, r4
2002b0: ebffff5b bl 200024 <GET32>
2002b4: e59f504c ldr r5, [pc, #76] ; 200308 <leds_off+0x64>
2002b8: e3c0160e bic r1, r0, #14680064 ; 0xe00000
2002bc: e3811602 orr r1, r1, #2097152 ; 0x200000
2002c0: e1a00004 mov r0, r4
2002c4: ebffff50 bl 20000c <PUT32>
2002c8: e1a00005 mov r0, r5
2002cc: ebffff54 bl 200024 <GET32>
2002d0: e3c0190e bic r1, r0, #229376 ; 0x38000
2002d4: e284401c add r4, r4, #28
2002d8: e1a00005 mov r0, r5
2002dc: e3811902 orr r1, r1, #32768 ; 0x8000
2002e0: ebffff49 bl 20000c <PUT32>
2002e4: e1a00004 mov r0, r4
2002e8: e3a01902 mov r1, #32768 ; 0x8000
2002ec: ebffff46 bl 20000c <PUT32>
2002f0: e1a00004 mov r0, r4
2002f4: e3a01008 mov r1, #8
2002f8: ebffff43 bl 20000c <PUT32>
2002fc: e8bd4070 pop {r4, r5, r6, lr}
200300: e12fff1e bx lr
200304: 3f200010 svccc 0x00200010
200308: 3f20000c svccc 0x0020000c
0020030c <notmain>:
20030c: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
200310: e3a08000 mov r8, #0
200314: ebffffe2 bl 2002a4 <leds_off>
200318: ebffff8b bl 20014c <uart_init>
20031c: e59f0240 ldr r0, [pc, #576] ; 200564 <notmain+0x258>
200320: ebffff82 bl 200130 <hexstring>
200324: ebffff40 bl 20002c <GETPC>
200328: ebffff80 bl 200130 <hexstring>
20032c: e3a00049 mov r0, #73 ; 0x49
200330: ebffff5a bl 2000a0 <uart_send>
200334: e3a00048 mov r0, #72 ; 0x48
200338: ebffff58 bl 2000a0 <uart_send>
20033c: e3a00045 mov r0, #69 ; 0x45
200340: ebffff56 bl 2000a0 <uart_send>
200344: e3a00058 mov r0, #88 ; 0x58
200348: ebffff54 bl 2000a0 <uart_send>
20034c: e3a0000d mov r0, #13
200350: ebffff52 bl 2000a0 <uart_send>
200354: e3a0000a mov r0, #10
200358: e1a09008 mov r9, r8
20035c: e1a06008 mov r6, r8
200360: e1a05008 mov r5, r8
200364: e1a07008 mov r7, r8
200368: e1a04008 mov r4, r8
20036c: ebffff4b bl 2000a0 <uart_send>
200370: ebffff37 bl 200054 <uart_recv>
200374: e350003a cmp r0, #58 ; 0x3a
200378: 0a00002b beq 20042c <notmain+0x120>
20037c: e350000d cmp r0, #13
200380: 1350000a cmpne r0, #10
200384: 03a0a001 moveq sl, #1
200388: 13a0a000 movne sl, #0
20038c: 0a000029 beq 200438 <notmain+0x12c>
200390: e3c03020 bic r3, r0, #32
200394: e3530047 cmp r3, #71 ; 0x47
200398: 0a000050 beq 2004e0 <notmain+0x1d4>
20039c: e2443001 sub r3, r4, #1
2003a0: e3530014 cmp r3, #20
2003a4: 979ff103 ldrls pc, [pc, r3, lsl #2]
2003a8: eafffff0 b 200370 <notmain+0x64>
2003ac: 0020041c eoreq r0, r0, ip, lsl r4
2003b0: 0020041c eoreq r0, r0, ip, lsl r4
2003b4: 002004bc strhteq r0, [r0], -ip
2003b8: 002004bc strhteq r0, [r0], -ip
2003bc: 002004bc strhteq r0, [r0], -ip
2003c0: 002004bc strhteq r0, [r0], -ip
2003c4: 0020049c mlaeq r0, ip, r4, r0
2003c8: 00200464 eoreq r0, r0, r4, ror #8
2003cc: 00200440 eoreq r0, r0, r0, asr #8
2003d0: 00200440 eoreq r0, r0, r0, asr #8
2003d4: 00200440 eoreq r0, r0, r0, asr #8
2003d8: 00200440 eoreq r0, r0, r0, asr #8
2003dc: 00200434 eoreq r0, r0, r4, lsr r4
2003e0: 00200400 eoreq r0, r0, r0, lsl #8
2003e4: 00200400 eoreq r0, r0, r0, lsl #8
2003e8: 00200400 eoreq r0, r0, r0, lsl #8
2003ec: 00200400 eoreq r0, r0, r0, lsl #8
2003f0: 00200400 eoreq r0, r0, r0, lsl #8
2003f4: 00200400 eoreq r0, r0, r0, lsl #8
2003f8: 00200400 eoreq r0, r0, r0, lsl #8
2003fc: 00200400 eoreq r0, r0, r0, lsl #8
200400: e3500039 cmp r0, #57 ; 0x39
200404: 82400007 subhi r0, r0, #7
200408: e1a09209 lsl r9, r9, #4
20040c: e200000f and r0, r0, #15
200410: e3540015 cmp r4, #21
200414: e1809009 orr r9, r0, r9
200418: 0a000045 beq 200534 <notmain+0x228>
20041c: ebffff0c bl 200054 <uart_recv>
200420: e350003a cmp r0, #58 ; 0x3a
200424: e2844001 add r4, r4, #1
200428: 1affffd3 bne 20037c <notmain+0x70>
20042c: e3a04001 mov r4, #1
200430: eaffffce b 200370 <notmain+0x64>
200434: e1a06206 lsl r6, r6, #4
200438: e3a04000 mov r4, #0
20043c: eaffffcb b 200370 <notmain+0x64>
200440: e3500039 cmp r0, #57 ; 0x39
200444: 82400007 subhi r0, r0, #7
200448: e1a06206 lsl r6, r6, #4
20044c: e200000f and r0, r0, #15
200450: e1806006 orr r6, r0, r6
200454: e1a06806 lsl r6, r6, #16
200458: e1a06826 lsr r6, r6, #16
20045c: e2844001 add r4, r4, #1
200460: eaffffc2 b 200370 <notmain+0x64>
200464: e3500039 cmp r0, #57 ; 0x39
200468: 82400007 subhi r0, r0, #7
20046c: e1a05205 lsl r5, r5, #4
200470: e200000f and r0, r0, #15
200474: e1805005 orr r5, r0, r5
200478: e20550ff and r5, r5, #255 ; 0xff
20047c: e3550001 cmp r5, #1
200480: 0a000027 beq 200524 <notmain+0x218>
200484: 33a0400e movcc r4, #14
200488: 3affffb8 bcc 200370 <notmain+0x64>
20048c: e3550002 cmp r5, #2
200490: 03a04009 moveq r4, #9
200494: 13a04000 movne r4, #0
200498: eaffffb4 b 200370 <notmain+0x64>
20049c: e3500039 cmp r0, #57 ; 0x39
2004a0: 82400007 subhi r0, r0, #7
2004a4: e1a05205 lsl r5, r5, #4
2004a8: e200000f and r0, r0, #15
2004ac: e1805005 orr r5, r0, r5
2004b0: e20550ff and r5, r5, #255 ; 0xff
2004b4: e3a04008 mov r4, #8
2004b8: eaffffac b 200370 <notmain+0x64>
2004bc: e3500039 cmp r0, #57 ; 0x39
2004c0: 82400007 subhi r0, r0, #7
2004c4: e1a07207 lsl r7, r7, #4
2004c8: e200000f and r0, r0, #15
2004cc: e1807007 orr r7, r0, r7
2004d0: e1a07807 lsl r7, r7, #16
2004d4: e1867827 orr r7, r6, r7, lsr #16
2004d8: e2844001 add r4, r4, #1
2004dc: eaffffa3 b 200370 <notmain+0x64>
2004e0: e3a0000d mov r0, #13
2004e4: ebfffeed bl 2000a0 <uart_send>
2004e8: e3a0002d mov r0, #45 ; 0x2d
2004ec: ebfffeeb bl 2000a0 <uart_send>
2004f0: e3a0002d mov r0, #45 ; 0x2d
2004f4: ebfffee9 bl 2000a0 <uart_send>
2004f8: e3a0000d mov r0, #13
2004fc: ebfffee7 bl 2000a0 <uart_send>
200500: e3a0000a mov r0, #10
200504: ebfffee5 bl 2000a0 <uart_send>
200508: e3a0000a mov r0, #10
20050c: ebfffee3 bl 2000a0 <uart_send>
200510: e3a00902 mov r0, #32768 ; 0x8000
200514: ebfffec6 bl 200034 <BRANCHTO>
200518: e1a0000a mov r0, sl
20051c: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
200520: e12fff1e bx lr
200524: e1a00008 mov r0, r8
200528: ebffff00 bl 200130 <hexstring>
20052c: e3a04000 mov r4, #0
200530: eaffff8e b 200370 <notmain+0x64>
200534: e0293869 eor r3, r9, r9, ror #16
200538: e1a03423 lsr r3, r3, #8
20053c: e3c33cff bic r3, r3, #65280 ; 0xff00
200540: e0239469 eor r9, r3, r9, ror #8
200544: e1a00007 mov r0, r7
200548: e0878008 add r8, r7, r8
20054c: e1a01009 mov r1, r9
200550: ebfffead bl 20000c <PUT32>
200554: e0898008 add r8, r9, r8
200558: e2877004 add r7, r7, #4
20055c: e3a0400e mov r4, #14
200560: eaffff82 b 200370 <notmain+0x64>
200564: 12345678 eorsne r5, r4, #120, 12 ; 0x7800000
002002a4 <notmain>:
2002a4: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
2002a8: e3a08000 mov r8, #0
2002ac: ebffffa6 bl 20014c <uart_init>
2002b0: e59f0240 ldr r0, [pc, #576] ; 2004f8 <notmain+0x254>
2002b4: ebffff9d bl 200130 <hexstring>
2002b8: ebffff5b bl 20002c <GETPC>
2002bc: ebffff9b bl 200130 <hexstring>
2002c0: e3a00049 mov r0, #73 ; 0x49
2002c4: ebffff75 bl 2000a0 <uart_send>
2002c8: e3a00048 mov r0, #72 ; 0x48
2002cc: ebffff73 bl 2000a0 <uart_send>
2002d0: e3a00045 mov r0, #69 ; 0x45
2002d4: ebffff71 bl 2000a0 <uart_send>
2002d8: e3a00058 mov r0, #88 ; 0x58
2002dc: ebffff6f bl 2000a0 <uart_send>
2002e0: e3a0000d mov r0, #13
2002e4: ebffff6d bl 2000a0 <uart_send>
2002e8: e3a0000a mov r0, #10
2002ec: e1a09008 mov r9, r8
2002f0: e1a06008 mov r6, r8
2002f4: e1a05008 mov r5, r8
2002f8: e1a07008 mov r7, r8
2002fc: e1a04008 mov r4, r8
200300: ebffff66 bl 2000a0 <uart_send>
200304: ebffff52 bl 200054 <uart_recv>
200308: e350003a cmp r0, #58 ; 0x3a
20030c: 0a00002b beq 2003c0 <notmain+0x11c>
200310: e350000d cmp r0, #13
200314: 1350000a cmpne r0, #10
200318: 03a0a001 moveq sl, #1
20031c: 13a0a000 movne sl, #0
200320: 0a000029 beq 2003cc <notmain+0x128>
200324: e3c03020 bic r3, r0, #32
200328: e3530047 cmp r3, #71 ; 0x47
20032c: 0a000050 beq 200474 <notmain+0x1d0>
200330: e2443001 sub r3, r4, #1
200334: e3530014 cmp r3, #20
200338: 979ff103 ldrls pc, [pc, r3, lsl #2]
20033c: eafffff0 b 200304 <notmain+0x60>
200340: 002003b0 strhteq r0, [r0], -r0
200344: 002003b0 strhteq r0, [r0], -r0
200348: 00200450 eoreq r0, r0, r0, asr r4
20034c: 00200450 eoreq r0, r0, r0, asr r4
200350: 00200450 eoreq r0, r0, r0, asr r4
200354: 00200450 eoreq r0, r0, r0, asr r4
200358: 00200430 eoreq r0, r0, r0, lsr r4
20035c: 002003f8 strdeq r0, [r0], -r8 ; <UNPREDICTABLE>
200360: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200364: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200368: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
20036c: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200370: 002003c8 eoreq r0, r0, r8, asr #7
200374: 00200394 mlaeq r0, r4, r3, r0
200378: 00200394 mlaeq r0, r4, r3, r0
20037c: 00200394 mlaeq r0, r4, r3, r0
200380: 00200394 mlaeq r0, r4, r3, r0
200384: 00200394 mlaeq r0, r4, r3, r0
200388: 00200394 mlaeq r0, r4, r3, r0
20038c: 00200394 mlaeq r0, r4, r3, r0
200390: 00200394 mlaeq r0, r4, r3, r0
200394: e3500039 cmp r0, #57 ; 0x39
200398: 82400007 subhi r0, r0, #7
20039c: e1a09209 lsl r9, r9, #4
2003a0: e200000f and r0, r0, #15
2003a4: e3540015 cmp r4, #21
2003a8: e1809009 orr r9, r0, r9
2003ac: 0a000045 beq 2004c8 <notmain+0x224>
2003b0: ebffff27 bl 200054 <uart_recv>
2003b4: e350003a cmp r0, #58 ; 0x3a
2003b8: e2844001 add r4, r4, #1
2003bc: 1affffd3 bne 200310 <notmain+0x6c>
2003c0: e3a04001 mov r4, #1
2003c4: eaffffce b 200304 <notmain+0x60>
2003c8: e1a06206 lsl r6, r6, #4
2003cc: e3a04000 mov r4, #0
2003d0: eaffffcb b 200304 <notmain+0x60>
2003d4: e3500039 cmp r0, #57 ; 0x39
2003d8: 82400007 subhi r0, r0, #7
2003dc: e1a06206 lsl r6, r6, #4
2003e0: e200000f and r0, r0, #15
2003e4: e1806006 orr r6, r0, r6
2003e8: e1a06806 lsl r6, r6, #16
2003ec: e1a06826 lsr r6, r6, #16
2003f0: e2844001 add r4, r4, #1
2003f4: eaffffc2 b 200304 <notmain+0x60>
2003f8: e3500039 cmp r0, #57 ; 0x39
2003fc: 82400007 subhi r0, r0, #7
200400: e1a05205 lsl r5, r5, #4
200404: e200000f and r0, r0, #15
200408: e1805005 orr r5, r0, r5
20040c: e20550ff and r5, r5, #255 ; 0xff
200410: e3550001 cmp r5, #1
200414: 0a000027 beq 2004b8 <notmain+0x214>
200418: 33a0400e movcc r4, #14
20041c: 3affffb8 bcc 200304 <notmain+0x60>
200420: e3550002 cmp r5, #2
200424: 03a04009 moveq r4, #9
200428: 13a04000 movne r4, #0
20042c: eaffffb4 b 200304 <notmain+0x60>
200430: e3500039 cmp r0, #57 ; 0x39
200434: 82400007 subhi r0, r0, #7
200438: e1a05205 lsl r5, r5, #4
20043c: e200000f and r0, r0, #15
200440: e1805005 orr r5, r0, r5
200444: e20550ff and r5, r5, #255 ; 0xff
200448: e3a04008 mov r4, #8
20044c: eaffffac b 200304 <notmain+0x60>
200450: e3500039 cmp r0, #57 ; 0x39
200454: 82400007 subhi r0, r0, #7
200458: e1a07207 lsl r7, r7, #4
20045c: e200000f and r0, r0, #15
200460: e1807007 orr r7, r0, r7
200464: e1a07807 lsl r7, r7, #16
200468: e1867827 orr r7, r6, r7, lsr #16
20046c: e2844001 add r4, r4, #1
200470: eaffffa3 b 200304 <notmain+0x60>
200474: e3a0000d mov r0, #13
200478: ebffff08 bl 2000a0 <uart_send>
20047c: e3a0002d mov r0, #45 ; 0x2d
200480: ebffff06 bl 2000a0 <uart_send>
200484: e3a0002d mov r0, #45 ; 0x2d
200488: ebffff04 bl 2000a0 <uart_send>
20048c: e3a0000d mov r0, #13
200490: ebffff02 bl 2000a0 <uart_send>
200494: e3a0000a mov r0, #10
200498: ebffff00 bl 2000a0 <uart_send>
20049c: e3a0000a mov r0, #10
2004a0: ebfffefe bl 2000a0 <uart_send>
2004a4: e3a00902 mov r0, #32768 ; 0x8000
2004a8: ebfffee1 bl 200034 <BRANCHTO>
2004ac: e1a0000a mov r0, sl
2004b0: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
2004b4: e12fff1e bx lr
2004b8: e1a00008 mov r0, r8
2004bc: ebffff1b bl 200130 <hexstring>
2004c0: e3a04000 mov r4, #0
2004c4: eaffff8e b 200304 <notmain+0x60>
2004c8: e0293869 eor r3, r9, r9, ror #16
2004cc: e1a03423 lsr r3, r3, #8
2004d0: e3c33cff bic r3, r3, #65280 ; 0xff00
2004d4: e0239469 eor r9, r3, r9, ror #8
2004d8: e1a00007 mov r0, r7
2004dc: e0878008 add r8, r7, r8
2004e0: e1a01009 mov r1, r9
2004e4: ebfffec8 bl 20000c <PUT32>
2004e8: e0898008 add r8, r9, r8
2004ec: e2877004 add r7, r7, #4
2004f0: e3a0400e mov r4, #14
2004f4: eaffff82 b 200304 <notmain+0x60>
2004f8: 12345678 eorsne r5, r4, #120, 12 ; 0x7800000
Disassembly of section .ARM.attributes:
@@ -415,7 +386,7 @@ Disassembly of section .ARM.attributes:
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0xed0a18>
0: 3a434347 bcc 10d0d24 <notmain+0xed0a80>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6

BIN
bootloader07/periph.o Normal file
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