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starting to add examples for the older pi1 in its own directory

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dwelch
2016-03-17 21:47:31 -04:00
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
These examples are for the older pi1 boards, the A, the B, the B rev 2.
But not the A+ nor B+ there are other directories for that.
The raspberry pi family is more similar than different, but I have
decided it is easier to manage by grouping the examples by board type.
My preferred way to run examples is to use my bootloader07 kernel.img on
the board with an ftdi usb to uart board or cable. I also solder a
momentary pushbutton on the RUN pins, which is basically a board reset.
There are ways to do this without soldering, pins you can push in rather
than solder.
Once the sd card is in with bootloader07, press reset, download the
intel hex (.hex) version of the program I want to run. Press 'g' to go.
Repeat as necessary.
Or you can copy the blinker01.bin file to the kernel.img file on your
sd card, replace the sd card and turn the power on.

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ARMGNU ?= arm-none-eabi
AOPS = --warn --fatal-warnings
COPS = -Wall -Werror -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker01.hex blinker01.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker01.o : blinker01.c
$(ARMGNU)-gcc $(COPS) -c blinker01.c -o blinker01.o
blinker01.elf : memmap vectors.o blinker01.o
$(ARMGNU)-ld vectors.o blinker01.o -T memmap -o blinker01.elf
$(ARMGNU)-objdump -D blinker01.elf > blinker01.list
blinker01.bin : blinker01.elf
$(ARMGNU)-objcopy blinker01.elf -O binary blinker01.bin
blinker01.hex : blinker01.elf
$(ARMGNU)-objcopy blinker01.elf -O ihex blinker01.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
#OOPS = -std-compile-opts
OOPS = -std-link-opts
clang : blinker01.clang.hex blinker01.clang.bin
blinker01.clang.bc : blinker01.c
clang $(LOPS) -c blinker01.c -o blinker01.clang.bc
blinker01.clang.opt.elf : memmap vectors.o blinker01.clang.bc
opt $(OOPS) blinker01.clang.bc -o blinker01.clang.opt.bc
llc $(LLCOPS) blinker01.clang.opt.bc -o blinker01.clang.opt.s
$(ARMGNU)-as blinker01.clang.opt.s -o blinker01.clang.opt.o
$(ARMGNU)-ld -o blinker01.clang.opt.elf -T memmap vectors.o blinker01.clang.opt.o
$(ARMGNU)-objdump -D blinker01.clang.opt.elf > blinker01.clang.opt.list
blinker01.clang.hex : blinker01.clang.opt.elf
$(ARMGNU)-objcopy blinker01.clang.opt.elf blinker01.clang.hex -O ihex
blinker01.clang.bin : blinker01.clang.opt.elf
$(ARMGNU)-objcopy blinker01.clang.opt.elf blinker01.clang.bin -O binary

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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi1 boards, see other directories for
other flavors of raspberry pi.
The pi1 has one led that is tied to gpio 16.
Being the first example I will spend a little more time describing it.
I have some other ramblings on baremetal and the gnu tools so I will
try not to duplicate that.
The primary use case for the raspberry pi is to run some version of
linux. The three main files to do that are bootloader.bin, start.elf
and kernel.img. The first two being GPU programs the last being ARM.
If you have no other files (dont have a config.txt) they (starg.elf
GPU code) copy the kernel.img file to 0x8000 in RAM, place some
code at address 0x0000 that is intended to prepare the ARM for booting
linux, then branch to 0x8000. We simply replace the kernel.img file
with our own program. I prefer to not mess with config.txt stuff
because it is not the primary use case, most pis out there do not use
this, so without is significantly better tested. Also over time the
config.txt things you can play with come and go and change name, some
of the popular ones are undocumented and so on. So I really dont want
to rely on that. Simply replace the kernel.img and otherwise be stock.
vectors.s is the entry point for this program, even an application on
an operating system like linux has some assembly up front before
calling the main function. For this processor the minimum is to to
set up the stack pointer and call the main function. Because some
compilers add extra stuff if they see a main() funtion I use some
function name other than main() typically for embedded systems like this.
I have adopted the habit of using notmain() both to not be named main()
and to emphasize this is bare metal and not your average application.
See my ramblings on .data and .bss, I dont need/use them so the
bootstrap (little bit of assembly before calling the first C function)
does not have to prepare those segments. I only need to setup the
stack and call the first C function in the project.
I normally would set the stack pointer at the top of ram...Well that is
a lie, normaly one would do such a thing, but with code like this that
mostly ports across a number of boards, it becomes a pain keeping track
of who has how much ram. Instead for simple examples I set the stack
somewhere where it doesnt collide with the code, but also I dont have to
change every board. Because I am using the 0x8000 entry point I can
set the stack at 0x8000 and it will grow down toward 0x0000, and that
is more than enough for these projects. The way the ARM works it
subtracts then writes stuff so the first thing on the stack will really
be at 0x7FFC, you dont have to set it to 0x7FFC to avoid the code at
0x8000.
The gpio pin is setup as an output to drive the LED. The blink rate
appears to be around a couple-three times a second, but may vary based
on your compiler and settings. This program does not attempt to use
any other peripherals (a timer) it relies on simply wasting time in a
loop then changing the state of the LED. If you were to use this line
of code:
for(ra=0;ra<0x1000;ra++) continue;
The optimizer will replace that with this one assignment:
ra = 0x1000;
And actually since that value isnt used again, it is dead code the
optimizer will likely remove that as well.
One way to get around this is to make the loop variable volatile, this
tells the compiler every time you use it grab it from and save it back
to its home in ram. I prefer a different approach. I have a simple
dummy function in assembly language, it simply returns.
.globl dummy
dummy:
bx lr
The assembly is outside the visibility of the optimizer as would
anything basically not in the same file (llvm is a little different it
might "see" those other objects and optimize across them, gnu wont).
So by having that external function and by passing the loop variable
to it.
for(ra=0;ra<0x1000;ra++) dummy(ra);
We force the compiler to actually implement this code and run that loop
that many times. Dont need to declare the variable volatile. If
uncomfortable with assembly langauge you could create a dummy function
in a separately compiled file
void dummy ( void )
{
}
Which produces the same code.
00000000 <dummy>:
0: e12fff1e bx lr
Some toolchains have the ability to see across objects when they
optimize so you still have to be careful. I prefer the assembly approach
to defeating the optimizer.
So this program sets up the gpio to drive the LED. Uses the loop to kill
some time, changes state of the LED, repeat forever. The blink rate
will be the same for the same program. But compiler differences and
options can cause one build to be different from another in the blink
rate. It is not really deterministic, thus the desire to use timers in
the examples that follow. If you change the number the loop counts to
and re-build with the same tools, you should see a change in the
blink rate.
Note the Broadcom documentation uses addresses 0x7Exxxxxx for the
peripherals. That is we assume the GPU's address space to access those
things. The ARM window into that is to date either at 0x20xxxxxx or
0x3Fxxxxxx depending on the specific broadcom chip for that board type
the pi1 uses 0x20xxxxxx so when you se 0x7Exxxxxx replace that
0x7E with 0x20.
I normally dont leave the compiled output in the repository, but you
may need it to compare with your results to see why for example mine
works and yours doesnt, so I will leave these here for this example.

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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
while(1)
{
PUT32(GPSET0,1<<16);
for(ra=0;ra<0x100000;ra++) dummy(ra);
PUT32(GPCLR0,1<<16);
for(ra=0;ra<0x100000;ra++) dummy(ra);
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
:1080200010402DE95C009FE5F9FFFFEB0717C0E367
:10803000011781E34C009FE5F3FFFFEB0118A0E37C
:1080400044009FE5F0FFFFEB0040A0E30400A0E147
:10805000014084E2F0FFFFEB010654E3FAFFFF1A50
:108060000118A0E324009FE5E7FFFFEB0040A0E339
:108070000400A0E1014084E2E7FFFFEB010654E3C6
:10808000FAFFFF1AECFFFFEA040020201C0020206A
:048090002800202084
:040000030000800079
:00000001FF

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blinker01.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: e3a0d902 mov sp, #32768 ; 0x8000
8004: eb000005 bl 8020 <notmain>
00008008 <hang>:
8008: eafffffe b 8008 <hang>
0000800c <PUT32>:
800c: e5801000 str r1, [r0]
8010: e12fff1e bx lr
00008014 <GET32>:
8014: e5900000 ldr r0, [r0]
8018: e12fff1e bx lr
0000801c <dummy>:
801c: e12fff1e bx lr
00008020 <notmain>:
8020: e92d4010 push {r4, lr}
8024: e59f005c ldr r0, [pc, #92] ; 8088 <notmain+0x68>
8028: ebfffff9 bl 8014 <GET32>
802c: e3c01707 bic r1, r0, #1835008 ; 0x1c0000
8030: e3811701 orr r1, r1, #262144 ; 0x40000
8034: e59f004c ldr r0, [pc, #76] ; 8088 <notmain+0x68>
8038: ebfffff3 bl 800c <PUT32>
803c: e3a01801 mov r1, #65536 ; 0x10000
8040: e59f0044 ldr r0, [pc, #68] ; 808c <notmain+0x6c>
8044: ebfffff0 bl 800c <PUT32>
8048: e3a04000 mov r4, #0
804c: e1a00004 mov r0, r4
8050: e2844001 add r4, r4, #1
8054: ebfffff0 bl 801c <dummy>
8058: e3540601 cmp r4, #1048576 ; 0x100000
805c: 1afffffa bne 804c <notmain+0x2c>
8060: e3a01801 mov r1, #65536 ; 0x10000
8064: e59f0024 ldr r0, [pc, #36] ; 8090 <notmain+0x70>
8068: ebffffe7 bl 800c <PUT32>
806c: e3a04000 mov r4, #0
8070: e1a00004 mov r0, r4
8074: e2844001 add r4, r4, #1
8078: ebffffe7 bl 801c <dummy>
807c: e3540601 cmp r4, #1048576 ; 0x100000
8080: 1afffffa bne 8070 <notmain+0x50>
8084: eaffffec b 803c <notmain+0x1c>
8088: 20200004 eorcs r0, r0, r4
808c: 2020001c eorcs r0, r0, ip, lsl r0
8090: 20200028 eorcs r0, r0, r8, lsr #32
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002a41 andeq r2, r0, r1, asr #20
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0xfffff9e0
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0x10c8d04>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6
...

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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x10000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

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;@ ------------------------------------------------------------------
;@ ------------------------------------------------------------------
.globl _start
_start:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker02.hex blinker02.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker02.o : blinker02.c
$(ARMGNU)-gcc $(COPS) -c blinker02.c -o blinker02.o
blinker02.elf : memmap vectors.o blinker02.o
$(ARMGNU)-ld vectors.o blinker02.o -T memmap -o blinker02.elf
$(ARMGNU)-objdump -D blinker02.elf > blinker02.list
blinker02.bin : blinker02.elf
$(ARMGNU)-objcopy blinker02.elf -O binary blinker02.bin
blinker02.hex : blinker02.elf
$(ARMGNU)-objcopy blinker02.elf -O ihex blinker02.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
#OOPS = -std-compile-opts
OOPS = -std-link-opts
clang : blinker02.clang.hex blinker02.clang.bin
blinker02.clang.bc : blinker02.c
clang $(LOPS) -c blinker02.c -o blinker02.clang.bc
blinker02.clang.opt.elf : memmap vectors.o blinker02.clang.bc
opt $(OOPS) blinker02.clang.bc -o blinker02.clang.opt.bc
llc $(LLCOPS) blinker02.clang.opt.bc -o blinker02.clang.opt.s
$(ARMGNU)-as blinker02.clang.opt.s -o blinker02.clang.opt.o
$(ARMGNU)-ld -o blinker02.clang.opt.elf -T memmap vectors.o blinker02.clang.opt.o
$(ARMGNU)-objdump -D blinker02.clang.opt.elf > blinker02.clang.opt.list
blinker02.clang.hex : blinker02.clang.opt.elf
$(ARMGNU)-objcopy blinker02.clang.opt.elf blinker02.clang.hex -O ihex
blinker02.clang.bin : blinker02.clang.opt.elf
$(ARMGNU)-objcopy blinker02.clang.opt.elf blinker02.clang.bin -O binary

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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi1 boards, see other directories for
other flavors of raspberry pi.
There is a free-running 64 bit timer, super easy to use, just read it.
//0x01000000 17 seconds
//0x00400000 4 seconds
//#define TIMER_BIT 0x01000000
#define TIMER_BIT 0x00400000
I think what they are doing is using a 1GHz clock for the ARM core
(and GPU?) That is divided by 4 to get the 250MHz system clock (and
or there is a 250MHz reference clock that is multiplied by 4). Either
way there is a 250MHz system clock, and my guess is this is divided by
256 to get 977KHz. 0x01000000 ticks would be 17.18 seconds and I am
using a watch with a second hand, so very plausible.
Can change the TIMER_BIT to a different one to change the blink rate
of the LED for example try:
#define TIMER_BIT 0x00100000

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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define SYSTIMERCLO 0x20003004
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
//0x01000000 17 seconds
//0x00400000 4 seconds
#define TIMER_BIT 0x00400000
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
while(1)
{
PUT32(GPSET0,1<<16);
while(1)
{
ra=GET32(SYSTIMERCLO);
if((ra&=TIMER_BIT)==TIMER_BIT) break;
}
PUT32(GPCLR0,1<<16);
while(1)
{
ra=GET32(SYSTIMERCLO);
if((ra&=TIMER_BIT)==0) break;
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

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;@ ------------------------------------------------------------------
;@ ------------------------------------------------------------------
.globl _start
_start:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@ ------------------------------------------------------------------
;@ ------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker03.hex blinker03.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker03.o : blinker03.c
$(ARMGNU)-gcc $(COPS) -c blinker03.c -o blinker03.o
blinker03.elf : memmap vectors.o blinker03.o
$(ARMGNU)-ld vectors.o blinker03.o -T memmap -o blinker03.elf
$(ARMGNU)-objdump -D blinker03.elf > blinker03.list
blinker03.bin : blinker03.elf
$(ARMGNU)-objcopy blinker03.elf -O binary blinker03.bin
blinker03.hex : blinker03.elf
$(ARMGNU)-objcopy blinker03.elf -O ihex blinker03.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
clang : blinker03.clang.hex blinker03.clang.bin
blinker03.clang.bc : blinker03.c
clang $(LOPS) -c blinker03.c -o blinker03.clang.bc
blinker03.clang.opt.elf : memmap vectors.o blinker03.clang.bc
opt $(OOPS) blinker03.clang.bc -o blinker03.clang.opt.bc
llc $(LLCOPS) blinker03.clang.opt.bc -o blinker03.clang.opt.s
$(ARMGNU)-as blinker03.clang.opt.s -o blinker03.clang.opt.o
$(ARMGNU)-ld -o blinker03.clang.opt.elf -T memmap vectors.o blinker03.clang.opt.o
$(ARMGNU)-objdump -D blinker03.clang.opt.elf > blinker03.clang.opt.list
blinker03.clang.hex : blinker03.clang.opt.elf
$(ARMGNU)-objcopy blinker03.clang.opt.elf blinker03.clang.hex -O ihex
blinker03.clang.bin : blinker03.clang.opt.elf
$(ARMGNU)-objcopy blinker03.clang.opt.elf blinker03.clang.bin -O binary

16
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi boards, see other directories for
other flavors of raspberry pi.
This example uses the free running ARM timer, not the 64 bit system
timer as in blinker02 but the so called ARM timer. In free running mode
which is a little different from blinker04 which uses the timer mode.
The system clock appears to come up at 250MHz as documented. Divide that
by 250 to get 1Mhz on this free running ARM timer. Then count to four
million ticks between LED state changes and the led will change state
every four seconds. Count to 20 million, 20 seconds.

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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_LOD 0x2000B400
#define ARM_TIMER_VAL 0x2000B404
#define ARM_TIMER_CTL 0x2000B408
#define ARM_TIMER_DIV 0x2000B41C
#define ARM_TIMER_CNT 0x2000B420
#define SYSTIMERCLO 0x20003004
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
#define TIMEOUT 4000000
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
unsigned int rb;
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
rb=GET32(ARM_TIMER_CNT);
while(1)
{
PUT32(GPSET0,1<<16);
while(1)
{
ra=GET32(ARM_TIMER_CNT);
if((ra-rb)>=TIMEOUT) break;
}
rb+=TIMEOUT;
PUT32(GPCLR0,1<<16);
while(1)
{
ra=GET32(ARM_TIMER_CNT);
if((ra-rb)>=TIMEOUT) break;
}
rb+=TIMEOUT;
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

38
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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ARMGNU ?= arm-none-eabi
AOPS = --warn --fatal-warnings
COPS = -Wall -Werror -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker04.hex blinker04.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker04.o : blinker04.c
$(ARMGNU)-gcc $(COPS) -c blinker04.c -o blinker04.o
blinker04.elf : memmap vectors.o blinker04.o
$(ARMGNU)-ld vectors.o blinker04.o -T memmap -o blinker04.elf
$(ARMGNU)-objdump -D blinker04.elf > blinker04.list
blinker04.bin : blinker04.elf
$(ARMGNU)-objcopy blinker04.elf -O binary blinker04.bin
blinker04.hex : blinker04.elf
$(ARMGNU)-objcopy blinker04.elf -O ihex blinker04.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
clang : blinker04.clang.hex blinker04.clang.bin
blinker04.clang.bc : blinker04.c
clang $(LOPS) -c blinker04.c -o blinker04.clang.bc
blinker04.clang.opt.elf : memmap vectors.o blinker04.clang.bc
opt $(OOPS) blinker04.clang.bc -o blinker04.clang.opt.bc
llc $(LLCOPS) blinker04.clang.opt.bc -o blinker04.clang.opt.s
$(ARMGNU)-as blinker04.clang.opt.s -o blinker04.clang.opt.o
$(ARMGNU)-ld -o blinker04.clang.opt.elf -T memmap vectors.o blinker04.clang.opt.o
$(ARMGNU)-objdump -D blinker04.clang.opt.elf > blinker04.clang.opt.list
blinker04.clang.hex : blinker04.clang.opt.elf
$(ARMGNU)-objcopy blinker04.clang.opt.elf blinker04.clang.hex -O ihex
blinker04.clang.bin : blinker04.clang.opt.elf
$(ARMGNU)-objcopy blinker04.clang.opt.elf blinker04.clang.bin -O binary

34
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi boards, see other directories for
other flavors of raspberry pi.
This example uses the ARM timer, not in free running mode like blinker03
but the other mode.
A few more typos in the datasheet. It is an SP804 not AP804 (page 196).
Page 197, bit 1 32 bit counter not 23 bit counter. Page 198 neither
the raw nor masked IRQ registers are at address 0x40C.
So if you want to poll an arbitrary time with a free running timer you
take a reference count, and then take a sample, wait for the difference
between the sample and reference count. You have to know if it is an
up or down counter. You can turn this timer into a free running timer
by setting the load registers to all ones. What you can also do with
this kind of timer that you cannot with a free runing timer is set the
load registers to some number of ticks (minus 1) and it will roll over
the counter at that rate. Often these kinds of timers have an interrupt
as does this one. And you can poll the interrupt bit without having to
actually configure an interrupt. This example sets the prescaler to
divide by 250. The clock as running here is 250Mhz, so this takes it
down to 1Mhz, 1000000 clocks per second. Now if we set the load registers
to 4 million counts (minus 1) then every 4 million counts at 1 million
per second is 4 seconds. Every 4 seconds the timer interrupt will fire.
Which you can read in the raw irq (not masked) register. Once it is
set you have to write anything to the clear interrupt register. If you
were to set up an interrupt service routine, you would clear that
interrupt in the interrupt handler.

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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_LOD 0x2000B400
#define ARM_TIMER_VAL 0x2000B404
#define ARM_TIMER_CTL 0x2000B408
#define ARM_TIMER_CLI 0x2000B40C
#define ARM_TIMER_RIS 0x2000B410
#define ARM_TIMER_MIS 0x2000B414
#define ARM_TIMER_RLD 0x2000B418
#define ARM_TIMER_DIV 0x2000B41C
#define ARM_TIMER_CNT 0x2000B420
#define SYSTIMERCLO 0x20003004
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
PUT32(ARM_TIMER_CTL,0x003E0000);
PUT32(ARM_TIMER_LOD,4000000-1);
PUT32(ARM_TIMER_RLD,4000000-1);
PUT32(ARM_TIMER_DIV,0x000000F9);
PUT32(ARM_TIMER_CLI,0);
PUT32(ARM_TIMER_CTL,0x003E0082);
while(1)
{
PUT32(GPSET0,1<<16);
while(1) if(GET32(ARM_TIMER_RIS)) break;
PUT32(ARM_TIMER_CLI,0);
PUT32(GPCLR0,1<<16);
while(1) if(GET32(ARM_TIMER_RIS)) break;
PUT32(ARM_TIMER_CLI,0);
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

11
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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

38
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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ARMGNU ?= arm-none-eabi
AOPS = --warn --fatal-warnings
COPS = -Wall -Werror -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker05.hex blinker05.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker05.o : blinker05.c
$(ARMGNU)-gcc $(COPS) -c blinker05.c -o blinker05.o
blinker05.elf : memmap vectors.o blinker05.o
$(ARMGNU)-ld vectors.o blinker05.o -T memmap -o blinker05.elf
$(ARMGNU)-objdump -D blinker05.elf > blinker05.list
blinker05.bin : blinker05.elf
$(ARMGNU)-objcopy blinker05.elf -O binary blinker05.bin
blinker05.hex : blinker05.elf
$(ARMGNU)-objcopy blinker05.elf -O ihex blinker05.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
clang : blinker05.clang.hex blinker05.clang.bin
blinker05.clang.bc : blinker05.c
clang $(LOPS) -c blinker05.c -o blinker05.clang.bc
blinker05.clang.opt.elf : memmap vectors.o blinker05.clang.bc
opt $(OOPS) blinker05.clang.bc -o blinker05.clang.opt.bc
llc $(LLCOPS) blinker05.clang.opt.bc -o blinker05.clang.opt.s
$(ARMGNU)-as blinker05.clang.opt.s -o blinker05.clang.opt.o
$(ARMGNU)-ld -o blinker05.clang.opt.elf -T memmap vectors.o blinker05.clang.opt.o
$(ARMGNU)-objdump -D blinker05.clang.opt.elf > blinker05.clang.opt.list
blinker05.clang.hex : blinker05.clang.opt.elf
$(ARMGNU)-objcopy blinker05.clang.opt.elf blinker05.clang.hex -O ihex
blinker05.clang.bin : blinker05.clang.opt.elf
$(ARMGNU)-objcopy blinker05.clang.opt.elf blinker05.clang.bin -O binary

116
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi boards, see other directories for
other flavors of raspberry pi.
This is derived from blinker04.
I dont understand why but way too many blinker examples use interrupts.
In short only use interrupts if you have to, often you dont have to.
If you feel you have to this example shows you a little about enabling
and handling interrupts on a raspberry pi.
Interrupts are an advanced programming topic, no matter how simple
this example makes it appear, there is a long list of things that can
and will go wrong. I definitely didnt get this working on the first
or second or third try. It took many. Fortunately on this system
we have a few layers we can play with before actually interrupting
the processor. This is both a blessing and a curse, some systems
have a number of layers, not all easy to find in the docs if in the
docs and all layers have to have the right enables, etc to route the
interrupt from the peripheral to processor. blinker04 showed a timer
with a raw interrupt status register, basically the interrupt signal
near its source. The interrupt enable bit on the timer is the first
layer you have to enable the signal through. This example kills three
birds with one stone. Instead of three examples I enable one layer at
a time and show a few blinks with each layer before completely
connecting the interrupt to the processor.
The first problem we have with the raspberry pi is where the binary
is loaded. I have had the most success by not mucking with settings
which means that our program is loaded at address 0x8000. For this
ARM core to service an interrupt we need to have our exception table at
address 0x0000 (newer cores we can move that address).
If you have been reading your ARM documents as you should by this point
you will know that for an interrupt on this processor it executes the
instruction at address 0x0001C. Also the interrupt mode has a different
r13 or stack pointer than supervisor mode. So if we plan to use the
stack at all in the interrupt handler we need to prepare that stack
pointer before any interrupts come along.
Before we get to the stack pointer, looking at vectors.s. We know that
0x8000 is our entry point where _start will be. We know that is not the
exception table but I have made one there anyway, why? There are a
number of ways to do this, this way we get the assembler/linker to do
some of the work for us. Using the ldr pc,label instruction I am
letting the assembler do the work of creating the machine code for a
relative load.
Address 0x8000 loads into the program counter (same as doing a branch if
you are not switching modes) the address contained at address 0x8020
which is filled in (by the assembler) the address for the reset label.
This repeats one for one for 8 handlers 0x8004 gets address in 0x8024,
etc. I happen to know and you can look up the fact that ldr pc,label
when used this way uses relative addressing
8000: e59ff018 ldr pc, [pc, #24] ; 8020 <reset_handler>
...
00008020 <reset_handler>:
8020: 00008040 andeq r8, r0, r0, asr #32
The machine instruction 0xe59ff018 when placed at address 0x1000 will
read from address 0x1000+0x20, basically pc+0x20 (the disassembly is
misleading). So if I were to copy the instruction at 0x8000 to 0x0000
and the address at 0x8020 to 0x0020, then it still works, a reset
exception if we could create one would read 0x8040 in this case and put
that in the pc, causing a jump to 0x8040. Same is true for all 8
instructions and all 8 addresses. So the first thing the code does
after reset is copy those 16 words from 0x8000 to 0x0000, we didnt have
to figure out addresses for functions and didnt have to generate machine
code this approach let the assembler do the work.
The next thing the reset code does is set up the stack pointer, not
much different than the other example programs except in this case
we need to setup both the supervisor mode, which we normally run
these examples in, and interrupt mode. The modes determine which
registers are used, the stack pointer being one that has a different
register for each mode. The trick is to use the mrs instruction to
change some of the bits in the program status register (psr) the bits
in particular we care about are the mode bits. Change the mode to
interrupt, set the interrupt stack pointer, change the mode back to
supervisor and change the stack pointer, then continue by calling the
entry C function, notmain().
Just like blinker04, blinker05 configures the gpio pin for driving the
led and sets up the timer. Different from blinker04, interrupts are
enabled in the control register (bit 5). Using the assumption that this
program was run just after reset, either as kernel.img on the sd card
or using one of my bootloaders that doesnt mess with enabling interrupts,
etc. The interrupt will leave the timer but get stopped at the next layer.
Since it is leaving the timer we will be able to see it in the masked
interrupt status register. So the first blinks, once state change
per second, are based on polling the MIS register.
The next layer is between the timer and the ARM. Each chip vendor and
model can vary wildly as to how many layers and how to use them. In
this case we have a relatively simple interrupt enable. By setting
a bit in the irq enable register we are allowing the arm timer interrupt
to pass through to the ARM core. Because our early cpsr registers
manipulation (to set up the interrupt stack) forced the interrupt
enable for the ARM core to a one, ARM core interrupts are disabled.
The next blinks at 2 seconds per state change poll the interrupt
status register at this layer.
The last step is to enable the interrupts to the arm core by changing
the I bit in the cpsr to a zero. Because we had prepared the exception
table when the interrupt comes the code at address 0x1C is executed
which eventually hits the c_irq_handler function, remember this is
an interrupt handler, you are soemwhat running parallel. Dont take
very long and dont mess with resources in use by the foreground
application. typically you want to be in and out fast. At some
point in the isr you need to clear the source of the isr.

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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
extern void enable_irq ( void );
extern void enable_fiq ( void );
#define ARM_TIMER_LOD 0x2000B400
#define ARM_TIMER_VAL 0x2000B404
#define ARM_TIMER_CTL 0x2000B408
#define ARM_TIMER_CLI 0x2000B40C
#define ARM_TIMER_RIS 0x2000B410
#define ARM_TIMER_MIS 0x2000B414
#define ARM_TIMER_RLD 0x2000B418
#define ARM_TIMER_DIV 0x2000B41C
#define ARM_TIMER_CNT 0x2000B420
#define SYSTIMERCLO 0x20003004
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
#define IRQ_BASIC 0x2000B200
#define IRQ_PEND1 0x2000B204
#define IRQ_PEND2 0x2000B208
#define IRQ_FIQ_CONTROL 0x2000B210
#define IRQ_ENABLE_BASIC 0x2000B218
#define IRQ_DISABLE_BASIC 0x2000B224
volatile unsigned int icount;
//-------------------------------------------------------------------------
void c_irq_handler ( void )
{
icount++;
if(icount&1)
{
PUT32(GPCLR0,1<<16);
}
else
{
PUT32(GPSET0,1<<16);
}
PUT32(ARM_TIMER_CLI,0);
}
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
PUT32(IRQ_DISABLE_BASIC,1);
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
PUT32(GPSET0,1<<16);
PUT32(ARM_TIMER_CTL,0x003E0000);
PUT32(ARM_TIMER_LOD,1000000-1);
PUT32(ARM_TIMER_RLD,1000000-1);
PUT32(ARM_TIMER_DIV,0x000000F9);
PUT32(ARM_TIMER_CLI,0);
PUT32(ARM_TIMER_CTL,0x003E00A2);
for(ra=0;ra<5;ra++)
{
PUT32(GPCLR0,1<<16);
while(1) if(GET32(ARM_TIMER_MIS)) break;
PUT32(ARM_TIMER_CLI,0);
PUT32(GPSET0,1<<16);
while(1) if(GET32(ARM_TIMER_MIS)) break;
PUT32(ARM_TIMER_CLI,0);
}
PUT32(ARM_TIMER_LOD,2000000-1);
PUT32(ARM_TIMER_RLD,2000000-1);
PUT32(ARM_TIMER_CLI,0);
PUT32(IRQ_ENABLE_BASIC,1);
for(ra=0;ra<5;ra++)
{
PUT32(GPCLR0,1<<16);
while(1) if(GET32(IRQ_BASIC)&1) break;
PUT32(ARM_TIMER_CLI,0);
PUT32(GPSET0,1<<16);
while(1) if(GET32(IRQ_BASIC)&1) break;
PUT32(ARM_TIMER_CLI,0);
}
PUT32(ARM_TIMER_LOD,4000000-1);
PUT32(ARM_TIMER_RLD,4000000-1);
icount=0;
enable_irq();
while(1) continue;
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

96
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,unused_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word hang
prefetch_handler: .word hang
data_handler: .word hang
unused_handler: .word hang
irq_handler: .word irq
fiq_handler: .word hang
reset:
mov r0,#0x8000
mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ (PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD2
msr cpsr_c,r0
mov sp,#0x8000
;@ (PSR_FIQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD1
msr cpsr_c,r0
mov sp,#0x4000
;@ (PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD3
msr cpsr_c,r0
mov sp,#0x8000000
;@ SVC MODE, IRQ ENABLED, FIQ DIS
;@mov r0,#0x53
;@msr cpsr_c, r0
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
.globl enable_irq
enable_irq:
mrs r0,cpsr
bic r0,r0,#0x80
msr cpsr_c,r0
bx lr
irq:
push {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
bl c_irq_handler
pop {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
subs pc,lr,#4
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker06.hex blinker06.bin
all : gcc
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker06.o : blinker06.c
$(ARMGNU)-gcc $(COPS) -c blinker06.c -o blinker06.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
wdog.o : wdog.c
$(ARMGNU)-gcc $(COPS) -c wdog.c -o wdog.o
blinker06.elf : memmap vectors.o periph.o wdog.o blinker06.o
$(ARMGNU)-ld vectors.o periph.o wdog.o blinker06.o -T memmap -o blinker06.elf
$(ARMGNU)-objdump -D blinker06.elf > blinker06.list
blinker06.bin : blinker06.elf
$(ARMGNU)-objcopy blinker06.elf -O binary blinker06.bin
blinker06.hex : blinker06.elf
$(ARMGNU)-objcopy blinker06.elf -O ihex blinker06.hex

26
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi boards, see other directories for
other flavors of raspberry pi.
So when surfing through the linux source for the raspberry pi I found
some watchdog timer registers that dont appear to be in the datasheet.
So I played with the registers a bit and it appears that from reset
and/or using the settings as configured in this code, the watchdog
timer is a divide by 4000 of the system timer, so 250,000,000/4000 =
62500 Hz.
Based on assumptions from the linux code the biggest timer is 0xFFFFF
which is 16.8 seconds. If you do not reprogram the timer and let it
run out, then it resets the chip, down to re-reading the sd card and
bringing the ARM up using kernel.img.
This example simply uses the watchdog timer to time the led state
changes. Because it reprograms the watchdog timer with a new time
the timer does not timeout and reset the chip. Comment out or remove
the break in the loop and it will timeout and reset the chip.

44
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#include "periph.h"
#include "wdog.h"
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
init_led();
while(1)
{
wdog_start(0xFFFFF);
while(1)
{
ra=wdog_get_remaining();
//if(ra<0x67697) //10 seconds
if(ra<0xC2F6F) //4 seconds
{
toggle_led();
break;
}
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

156
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
#define GPPUD 0x20200094
#define GPPUDCLK0 0x20200098
#define AUX_ENABLES 0x20215004
#define AUX_MU_IO_REG 0x20215040
#define AUX_MU_IER_REG 0x20215044
#define AUX_MU_IIR_REG 0x20215048
#define AUX_MU_LCR_REG 0x2021504C
#define AUX_MU_MCR_REG 0x20215050
#define AUX_MU_LSR_REG 0x20215054
#define AUX_MU_MSR_REG 0x20215058
#define AUX_MU_SCRATCH 0x2021505C
#define AUX_MU_CNTL_REG 0x20215060
#define AUX_MU_STAT_REG 0x20215064
#define AUX_MU_BAUD_REG 0x20215068
#define ARM_TIMER_LOD 0x2000B400
#define ARM_TIMER_VAL 0x2000B404
#define ARM_TIMER_CTL 0x2000B408
#define ARM_TIMER_DIV 0x2000B41C
#define ARM_TIMER_CNT 0x2000B420
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//alt function 5 for uart1
//alt function 0 for uart0
//((250,000,000/115200)/8)-1 = 270
//------------------------------------------------------------------------
void uart_putc ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_putc(rc);
if(rb==0) break;
}
uart_putc(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_putc(0x0D);
uart_putc(0x0A);
}
//------------------------------------------------------------------------
int uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
return(0);
}
//-------------------------------------------------------------------------
void init_timer ( void )
{
PUT32(ARM_TIMER_CTL,0x00000000);
PUT32(ARM_TIMER_CTL,0x00000200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
unsigned int ledstate;
//-------------------------------------------------------------------------
void toggle_led ( void )
{
ledstate++;
if(ledstate&1)
{
PUT32(GPSET0,1<<16);
}
else
{
PUT32(GPCLR0,1<<16);
}
}
//-------------------------------------------------------------------------
void init_led ( void )
{
unsigned int ra;
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
ledstate=0;
toggle_led();
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

13
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
void uart_putc ( unsigned int );
void hexstrings ( unsigned int );
void hexstring ( unsigned int );
int uart_init ( void );
void init_timer ( void );
unsigned int timer_tick ( void );
void toggle_led ( void );
void init_led ( void );
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------

43
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
b reset
reset:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

61
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// this is derived from:
/*
* Broadcom BCM2708 watchdog driver.
*
* (c) Copyright 2010 Broadcom Europe Ltd
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* BCM2708 watchdog driver. Loosely based on wdt driver.
*/
//------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
//------------------------------------------------------------------------
#define BCM2708_PERI_BASE 0x20000000
#define PM_BASE (BCM2708_PERI_BASE + 0x100000) /* Power Management, Reset controller and Watchdog registers */
#define PM_RSTC (PM_BASE+0x1c)
#define PM_WDOG (PM_BASE+0x24)
#define PM_WDOG_RESET 0000000000
#define PM_PASSWORD 0x5a000000
#define PM_WDOG_TIME_SET 0x000fffff
#define PM_RSTC_WRCFG_CLR 0xffffffcf
#define PM_RSTC_WRCFG_SET 0x00000030
#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
#define PM_RSTC_RESET 0x00000102
//------------------------------------------------------------------------
void wdog_start ( unsigned int timeout )
{
unsigned int pm_rstc,pm_wdog;
/* Setup watchdog for reset */
pm_rstc = GET32(PM_RSTC);
pm_wdog = PM_PASSWORD | (timeout & PM_WDOG_TIME_SET); // watchdog timer = timer clock / 16; need password (31:16) + value (11:0)
pm_rstc = PM_PASSWORD | (pm_rstc & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
PUT32(PM_WDOG,pm_wdog);
PUT32(PM_RSTC,pm_rstc);
}
//------------------------------------------------------------------------
void wdog_stop ( void )
{
PUT32(PM_RSTC,PM_PASSWORD | PM_RSTC_RESET);
}
//------------------------------------------------------------------------
unsigned int wdog_get_remaining ( void )
{
return(GET32(PM_WDOG)& PM_WDOG_TIME_SET);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------

8
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
void wdog_start ( unsigned int );
void wdog_stop ( void );
unsigned int wdog_get_remaining ( void );
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------

63
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ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : kernel.img
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
bootloader07.o : bootloader07.c
$(ARMGNU)-gcc $(COPS) -c bootloader07.c -o bootloader07.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
kernel.img : loader vectors.o periph.o bootloader07.o
$(ARMGNU)-ld vectors.o periph.o bootloader07.o -T loader -o bootloader07_rpi1.elf
$(ARMGNU)-objdump -D bootloader07_rpi1.elf > bootloader07_rpi1.list
$(ARMGNU)-objcopy bootloader07_rpi1.elf -O ihex bootloader07_rpi1.hex
$(ARMGNU)-objcopy bootloader07_rpi1.elf -O binary kernel.img
LOPS = -Wall -m32 -emit-llvm
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
LLCOPS = $(LLCOPS1)
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPSx = -std-compile-opts
OOPS = -std-link-opts
clang : bootloader07.clang.bin
bootloader07.bc : bootloader07.c
clang $(LOPS) -c bootloader07.c -o bootloader07.bc
periph.bc : periph.c
clang $(LOPS) -c periph.c -o periph.bc
bootloader07.clang.elf : loader vectors.o bootloader07.bc periph.bc
llvm-link periph.bc bootloader07.bc -o bootloader07.nopt.bc
opt $(OOPS) bootloader07.nopt.bc -o bootloader07.opt.bc
llc $(LLCOPS) bootloader07.opt.bc -o bootloader07.clang.s
$(ARMGNU)-as bootloader07.clang.s -o bootloader07.clang.o
$(ARMGNU)-ld -o bootloader07.clang.elf -T loader vectors.o bootloader07.clang.o
$(ARMGNU)-objdump -D bootloader07.clang.elf > bootloader07.clang.list
bootloader07.clang.bin : bootloader07.clang.elf
$(ARMGNU)-objcopy bootloader07.clang.elf bootloader07.clang.bin -O binary

50
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the older pi1 boards, see other directories for
other flavors of raspberry pi.
This is a very simple bootloader. Instead of the sd dance (see
top level README), this makes life a bit simpler and greatly reduces
physical wear and tear on the sd card socket. Do the sd card dance one
more time with this kernel.img. Get some sort of serial solution to
connect a dumb termial program with the ability to download raw/ascii
files.
bootloader01 was .hex based, this one is also .hex based but a
different way to parse it. bootloader02 through bootloader06
expect binary files, a binary image of the memory starting at
address 0x8000. I intend to release bootloader08 at the same time
and it will be .bin based but have the go feature.
This bootloader07 parses intel hex formatted files. Look that up at
wikipedia, it is very simple and historically widely used for bare
metal embedded work. (S record is another format like intel hex but
of course motorola had to have their own. Intel hex and Motorola S-
record). I felt like doing another state machine and honestly had
forgotten I did one before in bootloader01. This bootloader does
not make any of the others obsolete, it was just a fun exercise.
The thing that annoyed me the most about my bootloader is that
I use minicom and minicom spawns a separate program to do the file
transfers, xmodem, ascii, kermit, etc, and there is a delay and
a loss of data when the spawned program exits and minicom returns.
The solution is that you hit the g key when you want the program
to start so you are basically back in the terminal at that point.
I normally do not deliver binaries. In this case I have included all
of the build files so that you can at least get started without having
to build the bootloader. Backup whatever kernel.img file you are using
and replace with the kernel.img file in this repo (on your sd card) to
use this program.
There are a pair of holes on the board labelled RUN. If you are able
to solder or find other solutions (there are pins that can be pushed
into holes like this), you can put a momentary switch that when closed
will reset the board, and released allow it to boot again. Then you
can use this bootloader and simply press the button to try another
program.

229
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// 2 outer corner
// 4
// 6
// 8 TX out
// 10 RX in
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern unsigned int GETPC ( void );
extern void BRANCHTO ( unsigned int );
extern void dummy ( unsigned int );
extern void uart_init ( void );
extern unsigned int uart_lcr ( void );
extern void uart_flush ( void );
extern void uart_send ( unsigned int );
extern unsigned int uart_recv ( void );
extern unsigned int uart_check ( void );
extern void hexstring ( unsigned int );
extern void hexstrings ( unsigned int );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int state;
unsigned int byte_count;
unsigned int address;
unsigned int record_type;
unsigned int segment;
unsigned int data;
unsigned int sum;
unsigned int ra;
uart_init();
hexstring(0x12345678);
hexstring(GETPC());
uart_send('I');
uart_send('H');
uart_send('E');
uart_send('X');
uart_send(0x0D);
uart_send(0x0A);
state=0;
segment=0;
sum=0;
data=0;
record_type=0;
address=0;
byte_count=0;
while(1)
{
ra=uart_recv();
if(ra==':')
{
state=1;
continue;
}
if(ra==0x0D)
{
state=0;
continue;
}
if(ra==0x0A)
{
state=0;
continue;
}
if((ra=='g')||(ra=='G'))
{
uart_send(0x0D);
uart_send('-');
uart_send('-');
uart_send(0x0D);
uart_send(0x0A);
uart_send(0x0A);
BRANCHTO(0x8000);
state=0;
break;
}
switch(state)
{
case 0:
{
break;
}
case 1:
case 2:
{
byte_count<<=4;
if(ra>0x39) ra-=7;
byte_count|=(ra&0xF);
byte_count&=0xFF;
state++;
break;
}
case 3:
case 4:
case 5:
case 6:
{
address<<=4;
if(ra>0x39) ra-=7;
address|=(ra&0xF);
address&=0xFFFF;
address|=segment;
state++;
break;
}
case 7:
{
record_type<<=4;
if(ra>0x39) ra-=7;
record_type|=(ra&0xF);
record_type&=0xFF;
state++;
break;
}
case 8:
{
record_type<<=4;
if(ra>0x39) ra-=7;
record_type|=(ra&0xF);
record_type&=0xFF;
switch(record_type)
{
case 0x00:
{
state=14;
break;
}
case 0x01:
{
hexstring(sum);
state=0;
break;
}
case 0x02:
{
state=9;
break;
}
default:
{
state=0;
break;
}
}
break;
}
case 9:
case 10:
case 11:
case 12:
{
segment<<=4;
if(ra>0x39) ra-=7;
segment|=(ra&0xF);
segment&=0xFFFF;
state++;
break;
}
case 13:
{
segment<<=4;
state=0;
break;
}
case 14:
case 15:
case 16:
case 17:
case 18:
case 19:
case 20:
case 21:
{
data<<=4;
if(ra>0x39) ra-=7;
data|=(ra&0xF);
if(state==21)
{
ra=(data>>24)|(data<<24);
ra|=(data>>8)&0x0000FF00;
ra|=(data<<8)&0x00FF0000;
data=ra;
PUT32(address,data);
sum+=address;
sum+=data;
address+=4;
state=14;
}
else
{
state++;
}
break;
}
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2014 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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pi1/bootloader07/bootloader07.o Normal file
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pi1/bootloader07/bootloader07_rpi1.elf Executable file
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pi1/bootloader07/bootloader07_rpi1.hex Normal file
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bootloader07_rpi1.elf: file format elf32-littlearm
Disassembly of section .text:
00008000 <_start>:
8000: ea07dffe b 200000 <skip>
...
00200000 <skip>:
200000: e3a0d302 mov sp, #134217728 ; 0x8000000
200004: eb0000a6 bl 2002a4 <notmain>
00200008 <hang>:
200008: eafffffe b 200008 <hang>
0020000c <PUT32>:
20000c: e5801000 str r1, [r0]
200010: e12fff1e bx lr
00200014 <PUT16>:
200014: e1c010b0 strh r1, [r0]
200018: e12fff1e bx lr
0020001c <PUT8>:
20001c: e5c01000 strb r1, [r0]
200020: e12fff1e bx lr
00200024 <GET32>:
200024: e5900000 ldr r0, [r0]
200028: e12fff1e bx lr
0020002c <GETPC>:
20002c: e1a0000e mov r0, lr
200030: e12fff1e bx lr
00200034 <BRANCHTO>:
200034: e12fff10 bx r0
00200038 <dummy>:
200038: e12fff1e bx lr
0020003c <uart_lcr>:
20003c: e92d4010 push {r4, lr}
200040: e59f0008 ldr r0, [pc, #8] ; 200050 <uart_lcr+0x14>
200044: ebfffff6 bl 200024 <GET32>
200048: e8bd4010 pop {r4, lr}
20004c: e12fff1e bx lr
200050: 20215054 eorcs r5, r1, r4, asr r0
00200054 <uart_recv>:
200054: e92d4010 push {r4, lr}
200058: e59f001c ldr r0, [pc, #28] ; 20007c <uart_recv+0x28>
20005c: ebfffff0 bl 200024 <GET32>
200060: e3100001 tst r0, #1
200064: 0afffffb beq 200058 <uart_recv+0x4>
200068: e59f0010 ldr r0, [pc, #16] ; 200080 <uart_recv+0x2c>
20006c: ebffffec bl 200024 <GET32>
200070: e8bd4010 pop {r4, lr}
200074: e20000ff and r0, r0, #255 ; 0xff
200078: e12fff1e bx lr
20007c: 20215054 eorcs r5, r1, r4, asr r0
200080: 20215040 eorcs r5, r1, r0, asr #32
00200084 <uart_check>:
200084: e92d4010 push {r4, lr}
200088: e59f000c ldr r0, [pc, #12] ; 20009c <uart_check+0x18>
20008c: ebffffe4 bl 200024 <GET32>
200090: e8bd4010 pop {r4, lr}
200094: e2000001 and r0, r0, #1
200098: e12fff1e bx lr
20009c: 20215054 eorcs r5, r1, r4, asr r0
002000a0 <uart_send>:
2000a0: e92d4010 push {r4, lr}
2000a4: e1a04000 mov r4, r0
2000a8: e59f001c ldr r0, [pc, #28] ; 2000cc <uart_send+0x2c>
2000ac: ebffffdc bl 200024 <GET32>
2000b0: e3100020 tst r0, #32
2000b4: 0afffffb beq 2000a8 <uart_send+0x8>
2000b8: e1a01004 mov r1, r4
2000bc: e59f000c ldr r0, [pc, #12] ; 2000d0 <uart_send+0x30>
2000c0: ebffffd1 bl 20000c <PUT32>
2000c4: e8bd4010 pop {r4, lr}
2000c8: e12fff1e bx lr
2000cc: 20215054 eorcs r5, r1, r4, asr r0
2000d0: 20215040 eorcs r5, r1, r0, asr #32
002000d4 <uart_flush>:
2000d4: e92d4010 push {r4, lr}
2000d8: e59f0010 ldr r0, [pc, #16] ; 2000f0 <uart_flush+0x1c>
2000dc: ebffffd0 bl 200024 <GET32>
2000e0: e3100c01 tst r0, #256 ; 0x100
2000e4: 1afffffb bne 2000d8 <uart_flush+0x4>
2000e8: e8bd4010 pop {r4, lr}
2000ec: e12fff1e bx lr
2000f0: 20215054 eorcs r5, r1, r4, asr r0
002000f4 <hexstrings>:
2000f4: e92d4070 push {r4, r5, r6, lr}
2000f8: e1a05000 mov r5, r0
2000fc: e3a04020 mov r4, #32
200100: e2444004 sub r4, r4, #4
200104: e1a00435 lsr r0, r5, r4
200108: e200000f and r0, r0, #15
20010c: e3500009 cmp r0, #9
200110: 82800037 addhi r0, r0, #55 ; 0x37
200114: 92800030 addls r0, r0, #48 ; 0x30
200118: ebffffe0 bl 2000a0 <uart_send>
20011c: e3540000 cmp r4, #0
200120: 1afffff6 bne 200100 <hexstrings+0xc>
200124: e3a00020 mov r0, #32
200128: e8bd4070 pop {r4, r5, r6, lr}
20012c: eaffffdb b 2000a0 <uart_send>
00200130 <hexstring>:
200130: e92d4010 push {r4, lr}
200134: ebffffee bl 2000f4 <hexstrings>
200138: e3a0000d mov r0, #13
20013c: ebffffd7 bl 2000a0 <uart_send>
200140: e3a0000a mov r0, #10
200144: e8bd4010 pop {r4, lr}
200148: eaffffd4 b 2000a0 <uart_send>
0020014c <uart_init>:
20014c: e92d4010 push {r4, lr}
200150: e3a01001 mov r1, #1
200154: e59f00d4 ldr r0, [pc, #212] ; 200230 <uart_init+0xe4>
200158: ebffffab bl 20000c <PUT32>
20015c: e3a01000 mov r1, #0
200160: e59f00cc ldr r0, [pc, #204] ; 200234 <uart_init+0xe8>
200164: ebffffa8 bl 20000c <PUT32>
200168: e3a01000 mov r1, #0
20016c: e59f00c4 ldr r0, [pc, #196] ; 200238 <uart_init+0xec>
200170: ebffffa5 bl 20000c <PUT32>
200174: e3a01003 mov r1, #3
200178: e59f00bc ldr r0, [pc, #188] ; 20023c <uart_init+0xf0>
20017c: ebffffa2 bl 20000c <PUT32>
200180: e3a01000 mov r1, #0
200184: e59f00b4 ldr r0, [pc, #180] ; 200240 <uart_init+0xf4>
200188: ebffff9f bl 20000c <PUT32>
20018c: e3a01000 mov r1, #0
200190: e59f009c ldr r0, [pc, #156] ; 200234 <uart_init+0xe8>
200194: ebffff9c bl 20000c <PUT32>
200198: e3a010c6 mov r1, #198 ; 0xc6
20019c: e59f00a0 ldr r0, [pc, #160] ; 200244 <uart_init+0xf8>
2001a0: ebffff99 bl 20000c <PUT32>
2001a4: e59f109c ldr r1, [pc, #156] ; 200248 <uart_init+0xfc>
2001a8: e59f009c ldr r0, [pc, #156] ; 20024c <uart_init+0x100>
2001ac: ebffff96 bl 20000c <PUT32>
2001b0: e59f0098 ldr r0, [pc, #152] ; 200250 <uart_init+0x104>
2001b4: ebffff9a bl 200024 <GET32>
2001b8: e3c01a3f bic r1, r0, #258048 ; 0x3f000
2001bc: e3811a12 orr r1, r1, #73728 ; 0x12000
2001c0: e59f0088 ldr r0, [pc, #136] ; 200250 <uart_init+0x104>
2001c4: ebffff90 bl 20000c <PUT32>
2001c8: e3a01000 mov r1, #0
2001cc: e59f0080 ldr r0, [pc, #128] ; 200254 <uart_init+0x108>
2001d0: ebffff8d bl 20000c <PUT32>
2001d4: e3a04000 mov r4, #0
2001d8: e1a00004 mov r0, r4
2001dc: e2844001 add r4, r4, #1
2001e0: ebffff94 bl 200038 <dummy>
2001e4: e3540096 cmp r4, #150 ; 0x96
2001e8: 1afffffa bne 2001d8 <uart_init+0x8c>
2001ec: e3a01903 mov r1, #49152 ; 0xc000
2001f0: e59f0060 ldr r0, [pc, #96] ; 200258 <uart_init+0x10c>
2001f4: ebffff84 bl 20000c <PUT32>
2001f8: e3a04000 mov r4, #0
2001fc: e1a00004 mov r0, r4
200200: e2844001 add r4, r4, #1
200204: ebffff8b bl 200038 <dummy>
200208: e3540096 cmp r4, #150 ; 0x96
20020c: 1afffffa bne 2001fc <uart_init+0xb0>
200210: e3a01000 mov r1, #0
200214: e59f003c ldr r0, [pc, #60] ; 200258 <uart_init+0x10c>
200218: ebffff7b bl 20000c <PUT32>
20021c: e3a01003 mov r1, #3
200220: e59f0010 ldr r0, [pc, #16] ; 200238 <uart_init+0xec>
200224: ebffff78 bl 20000c <PUT32>
200228: e8bd4010 pop {r4, lr}
20022c: e12fff1e bx lr
200230: 20215004 eorcs r5, r1, r4
200234: 20215044 eorcs r5, r1, r4, asr #32
200238: 20215060 eorcs r5, r1, r0, rrx
20023c: 2021504c eorcs r5, r1, ip, asr #32
200240: 20215050 eorcs r5, r1, r0, asr r0
200244: 20215048 eorcs r5, r1, r8, asr #32
200248: 0000010e andeq r0, r0, lr, lsl #2
20024c: 20215068 eorcs r5, r1, r8, rrx
200250: 20200004 eorcs r0, r0, r4
200254: 20200094 mlacs r0, r4, r0, r0
200258: 20200098 mlacs r0, r8, r0, r0
0020025c <timer_init>:
20025c: e92d4010 push {r4, lr}
200260: e59f401c ldr r4, [pc, #28] ; 200284 <timer_init+0x28>
200264: e3a018f9 mov r1, #16318464 ; 0xf90000
200268: e1a00004 mov r0, r4
20026c: ebffff66 bl 20000c <PUT32>
200270: e1a00004 mov r0, r4
200274: e59f100c ldr r1, [pc, #12] ; 200288 <timer_init+0x2c>
200278: ebffff63 bl 20000c <PUT32>
20027c: e8bd4010 pop {r4, lr}
200280: e12fff1e bx lr
200284: 2000b408 andcs fp, r0, r8, lsl #8
200288: 00f90200 rscseq r0, r9, r0, lsl #4
0020028c <timer_tick>:
20028c: e92d4010 push {r4, lr}
200290: e59f0008 ldr r0, [pc, #8] ; 2002a0 <timer_tick+0x14>
200294: ebffff62 bl 200024 <GET32>
200298: e8bd4010 pop {r4, lr}
20029c: e12fff1e bx lr
2002a0: 2000b420 andcs fp, r0, r0, lsr #8
002002a4 <notmain>:
2002a4: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
2002a8: e3a08000 mov r8, #0
2002ac: ebffffa6 bl 20014c <uart_init>
2002b0: e59f0240 ldr r0, [pc, #576] ; 2004f8 <notmain+0x254>
2002b4: ebffff9d bl 200130 <hexstring>
2002b8: ebffff5b bl 20002c <GETPC>
2002bc: ebffff9b bl 200130 <hexstring>
2002c0: e3a00049 mov r0, #73 ; 0x49
2002c4: ebffff75 bl 2000a0 <uart_send>
2002c8: e3a00048 mov r0, #72 ; 0x48
2002cc: ebffff73 bl 2000a0 <uart_send>
2002d0: e3a00045 mov r0, #69 ; 0x45
2002d4: ebffff71 bl 2000a0 <uart_send>
2002d8: e3a00058 mov r0, #88 ; 0x58
2002dc: ebffff6f bl 2000a0 <uart_send>
2002e0: e3a0000d mov r0, #13
2002e4: ebffff6d bl 2000a0 <uart_send>
2002e8: e3a0000a mov r0, #10
2002ec: e1a09008 mov r9, r8
2002f0: e1a06008 mov r6, r8
2002f4: e1a05008 mov r5, r8
2002f8: e1a07008 mov r7, r8
2002fc: e1a04008 mov r4, r8
200300: ebffff66 bl 2000a0 <uart_send>
200304: ebffff52 bl 200054 <uart_recv>
200308: e350003a cmp r0, #58 ; 0x3a
20030c: 0a00002b beq 2003c0 <notmain+0x11c>
200310: e350000d cmp r0, #13
200314: 1350000a cmpne r0, #10
200318: 03a0a001 moveq sl, #1
20031c: 13a0a000 movne sl, #0
200320: 0a000029 beq 2003cc <notmain+0x128>
200324: e3c03020 bic r3, r0, #32
200328: e3530047 cmp r3, #71 ; 0x47
20032c: 0a000050 beq 200474 <notmain+0x1d0>
200330: e2443001 sub r3, r4, #1
200334: e3530014 cmp r3, #20
200338: 979ff103 ldrls pc, [pc, r3, lsl #2]
20033c: eafffff0 b 200304 <notmain+0x60>
200340: 002003b0 strhteq r0, [r0], -r0
200344: 002003b0 strhteq r0, [r0], -r0
200348: 00200450 eoreq r0, r0, r0, asr r4
20034c: 00200450 eoreq r0, r0, r0, asr r4
200350: 00200450 eoreq r0, r0, r0, asr r4
200354: 00200450 eoreq r0, r0, r0, asr r4
200358: 00200430 eoreq r0, r0, r0, lsr r4
20035c: 002003f8 strdeq r0, [r0], -r8 ; <UNPREDICTABLE>
200360: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200364: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200368: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
20036c: 002003d4 ldrdeq r0, [r0], -r4 ; <UNPREDICTABLE>
200370: 002003c8 eoreq r0, r0, r8, asr #7
200374: 00200394 mlaeq r0, r4, r3, r0
200378: 00200394 mlaeq r0, r4, r3, r0
20037c: 00200394 mlaeq r0, r4, r3, r0
200380: 00200394 mlaeq r0, r4, r3, r0
200384: 00200394 mlaeq r0, r4, r3, r0
200388: 00200394 mlaeq r0, r4, r3, r0
20038c: 00200394 mlaeq r0, r4, r3, r0
200390: 00200394 mlaeq r0, r4, r3, r0
200394: e3500039 cmp r0, #57 ; 0x39
200398: 82400007 subhi r0, r0, #7
20039c: e1a09209 lsl r9, r9, #4
2003a0: e200000f and r0, r0, #15
2003a4: e3540015 cmp r4, #21
2003a8: e1809009 orr r9, r0, r9
2003ac: 0a000045 beq 2004c8 <notmain+0x224>
2003b0: ebffff27 bl 200054 <uart_recv>
2003b4: e350003a cmp r0, #58 ; 0x3a
2003b8: e2844001 add r4, r4, #1
2003bc: 1affffd3 bne 200310 <notmain+0x6c>
2003c0: e3a04001 mov r4, #1
2003c4: eaffffce b 200304 <notmain+0x60>
2003c8: e1a06206 lsl r6, r6, #4
2003cc: e3a04000 mov r4, #0
2003d0: eaffffcb b 200304 <notmain+0x60>
2003d4: e3500039 cmp r0, #57 ; 0x39
2003d8: 82400007 subhi r0, r0, #7
2003dc: e1a06206 lsl r6, r6, #4
2003e0: e200000f and r0, r0, #15
2003e4: e1806006 orr r6, r0, r6
2003e8: e1a06806 lsl r6, r6, #16
2003ec: e1a06826 lsr r6, r6, #16
2003f0: e2844001 add r4, r4, #1
2003f4: eaffffc2 b 200304 <notmain+0x60>
2003f8: e3500039 cmp r0, #57 ; 0x39
2003fc: 82400007 subhi r0, r0, #7
200400: e1a05205 lsl r5, r5, #4
200404: e200000f and r0, r0, #15
200408: e1805005 orr r5, r0, r5
20040c: e20550ff and r5, r5, #255 ; 0xff
200410: e3550001 cmp r5, #1
200414: 0a000027 beq 2004b8 <notmain+0x214>
200418: 33a0400e movcc r4, #14
20041c: 3affffb8 bcc 200304 <notmain+0x60>
200420: e3550002 cmp r5, #2
200424: 03a04009 moveq r4, #9
200428: 13a04000 movne r4, #0
20042c: eaffffb4 b 200304 <notmain+0x60>
200430: e3500039 cmp r0, #57 ; 0x39
200434: 82400007 subhi r0, r0, #7
200438: e1a05205 lsl r5, r5, #4
20043c: e200000f and r0, r0, #15
200440: e1805005 orr r5, r0, r5
200444: e20550ff and r5, r5, #255 ; 0xff
200448: e3a04008 mov r4, #8
20044c: eaffffac b 200304 <notmain+0x60>
200450: e3500039 cmp r0, #57 ; 0x39
200454: 82400007 subhi r0, r0, #7
200458: e1a07207 lsl r7, r7, #4
20045c: e200000f and r0, r0, #15
200460: e1807007 orr r7, r0, r7
200464: e1a07807 lsl r7, r7, #16
200468: e1867827 orr r7, r6, r7, lsr #16
20046c: e2844001 add r4, r4, #1
200470: eaffffa3 b 200304 <notmain+0x60>
200474: e3a0000d mov r0, #13
200478: ebffff08 bl 2000a0 <uart_send>
20047c: e3a0002d mov r0, #45 ; 0x2d
200480: ebffff06 bl 2000a0 <uart_send>
200484: e3a0002d mov r0, #45 ; 0x2d
200488: ebffff04 bl 2000a0 <uart_send>
20048c: e3a0000d mov r0, #13
200490: ebffff02 bl 2000a0 <uart_send>
200494: e3a0000a mov r0, #10
200498: ebffff00 bl 2000a0 <uart_send>
20049c: e3a0000a mov r0, #10
2004a0: ebfffefe bl 2000a0 <uart_send>
2004a4: e3a00902 mov r0, #32768 ; 0x8000
2004a8: ebfffee1 bl 200034 <BRANCHTO>
2004ac: e1a0000a mov r0, sl
2004b0: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
2004b4: e12fff1e bx lr
2004b8: e1a00008 mov r0, r8
2004bc: ebffff1b bl 200130 <hexstring>
2004c0: e3a04000 mov r4, #0
2004c4: eaffff8e b 200304 <notmain+0x60>
2004c8: e0293869 eor r3, r9, r9, ror #16
2004cc: e1a03423 lsr r3, r3, #8
2004d0: e3c33cff bic r3, r3, #65280 ; 0xff00
2004d4: e0239469 eor r9, r3, r9, ror #8
2004d8: e1a00007 mov r0, r7
2004dc: e0878008 add r8, r7, r8
2004e0: e1a01009 mov r1, r9
2004e4: ebfffec8 bl 20000c <PUT32>
2004e8: e0898008 add r8, r9, r8
2004ec: e2877004 add r7, r7, #4
2004f0: e3a0400e mov r4, #14
2004f4: eaffff82 b 200304 <notmain+0x60>
2004f8: 12345678 eorsne r5, r4, #120, 12 ; 0x7800000
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002a41 andeq r2, r0, r1, asr #20
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000020 andeq r0, r0, r0, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0xfffff9e0
18: 08020600 stmdaeq r2, {r9, sl}
1c: 12010901 andne r0, r1, #16384 ; 0x4000
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
28: Address 0x0000000000000028 is out of bounds.
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <notmain+0xed0a80>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
c: 302e332e eorcc r3, lr, lr, lsr #6
...

BIN
pi1/bootloader07/kernel.img Executable file
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Binary file not shown.

12
pi1/bootloader07/loader Normal file
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@@ -0,0 +1,12 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

152
pi1/bootloader07/periph.c Normal file
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#define PBASE 0x20000000
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_CTL (PBASE+0x0000B408)
#define ARM_TIMER_CNT (PBASE+0x0000B420)
#define GPFSEL1 (PBASE+0x00200004)
#define GPSET0 (PBASE+0x0020001C)
#define GPCLR0 (PBASE+0x00200028)
#define GPPUD (PBASE+0x00200094)
#define GPPUDCLK0 (PBASE+0x00200098)
#define AUX_ENABLES (PBASE+0x00215004)
#define AUX_MU_IO_REG (PBASE+0x00215040)
#define AUX_MU_IER_REG (PBASE+0x00215044)
#define AUX_MU_IIR_REG (PBASE+0x00215048)
#define AUX_MU_LCR_REG (PBASE+0x0021504C)
#define AUX_MU_MCR_REG (PBASE+0x00215050)
#define AUX_MU_LSR_REG (PBASE+0x00215054)
#define AUX_MU_MSR_REG (PBASE+0x00215058)
#define AUX_MU_SCRATCH (PBASE+0x0021505C)
#define AUX_MU_CNTL_REG (PBASE+0x00215060)
#define AUX_MU_STAT_REG (PBASE+0x00215064)
#define AUX_MU_BAUD_REG (PBASE+0x00215068)
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//------------------------------------------------------------------------
unsigned int uart_lcr ( void )
{
return(GET32(AUX_MU_LSR_REG));
}
//------------------------------------------------------------------------
unsigned int uart_recv ( void )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
return(GET32(AUX_MU_IO_REG)&0xFF);
}
//------------------------------------------------------------------------
unsigned int uart_check ( void )
{
if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
return(0);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_send(rc);
if(rb==0) break;
}
uart_send(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_send(0x0D);
uart_send(0x0A);
}
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
void timer_init ( void )
{
//0xF9+1 = 250
//250MHz/250 = 1MHz
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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pi1/bootloader07/vectors.o Normal file
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64
pi1/bootloader07/vectors.s Normal file
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
b skip
.space 0x200000-0x8004,0
skip:
mov sp,#0x08000000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl PUT16
PUT16:
strh r1,[r0]
bx lr
.globl PUT8
PUT8:
strb r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl GETPC
GETPC:
mov r0,lr
bx lr
.globl BRANCHTO
BRANCHTO:
bx r0
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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For now see the piaplus directory for the pi B+, none of the examples
exploit any of the differences.