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copied and re-tested float03 example for piaplus

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dwelch
2016-03-26 10:37:23 -04:00
parent 4bd13317ea
commit 84fe6f736d
8 changed files with 827 additions and 0 deletions
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33
boards/piaplus/float03/Makefile Normal file
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ARMGNU = arm-none-eabi
ARMGNU ?= arm-none-eabi
AOPS = --warn --fatal-warnings -mcpu=arm1176jzf-s -march=armv6
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding -mcpu=arm1176jzf-s -mtune=arm1176jzf-s -mhard-float
all : float03.bin
vectors.o : vectors.s
$(ARMGNU)-as $(AOPS) -mfpu=vfp vectors.s -o vectors.o
float03.o : float03.c uart.h
$(ARMGNU)-gcc $(COPS) -c float03.c -o float03.o
uart.o : uart.c uart.h
$(ARMGNU)-gcc $(COPS) -c uart.c -o uart.o
float03.bin : memmap vectors.o uart.o float03.o
$(ARMGNU)-ld -o float03.elf -T memmap vectors.o uart.o float03.o
$(ARMGNU)-objdump -D float03.elf > float03.list
$(ARMGNU)-objcopy float03.elf float03.hex -O ihex
$(ARMGNU)-objcopy float03.elf float03.bin -O binary
clean:
rm -f *.bin
rm -f *.o
rm -f *.elf
rm -f *.list

370
boards/piaplus/float03/README Normal file
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See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi A+, see other directories for other flavors
of raspberry pi.
This is an experiment due to a post on the bare metal forum at Raspberry
Pi.
VFP issues with denormal numbers posted by mstorsjo
I need to try this against another processor, but have not yet. What
is going on is when an operation on a denormal or subnormal number
(a number so small that it cannot be represented, think of
0.0000..something with so many zeros there is not enough negative
exponent) the operating system is called to handle the exception.
Upon return the next operation does not complete properly.
In IEEE-754 single precision float (look it up on wikipedia) an exponent
of zeros is a special number it either indicates the number zero or a
denormal number.
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
hexstring(m4add(0x00012345,0x00000111,0x3F801230,0x3F801110));
hexstring(m4add(0x00000111,0x00012345,0x3F801230,0x3F801110));
0x3F800000 is a normal number 1.0 or something along those lines
0x00000000 is a normal number with a special exponent it is the value zero.
The other numbers that start with 0x3F8 are also just fine they are a
smidge larger than 0x3F800000.
This line has no denormals
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
.globl m4add
m4add:
vmov s0,r0
vmov s1,r1
vmov s2,r2
vmov s3,r3
vadd.f32 s4,s0,s1
vadd.f32 s5,s2,s3
vmov r0,s5
bx lr
the assembly floating point code adds the first two numbers then
adds the second two numbers and returns the result for the second number
The output of this program is
12345678
400011A0
00012345
00000111
12345678
so 0x400011A0 is supposed to be the result of the floating point numbers
0x3F801230 and 0x3F801110 added together, you were expecting 0x3F802340
perhaps, well it doesnt quite work that way, but if you take that 0x11A0
portion of the result and look at it as binary
11A0 =
00010001101000000
then break that into hex values along different boundaries
0 0010 0011 0100 0000
there is the 0x234
these two lines do have denormals, both of the first two numbers
in the first add are denormals.
hexstring(m4add(0x00012345,0x00000111,0x3F801230,0x3F801110));
hexstring(m4add(0x00000111,0x00012345,0x3F801230,0x3F801110));
Bear with me for a second on this tangent. In my blinker07 example I
showed one way to move/create an exception table at address 0x00000000
in arm address space. My program expects to be loaded at 0x8000 as a
normal raspberry pi linux kernel.img is. This example shows another
solution. if you look at the encoding of the branch and branch link
instruction (same encoding, one bit distinguishes link or not) you will
see 0xEAxxxxxx where xxxxxx is a value that indicates the offset.
805c: eb000094 bl 82b4 <notmain>
0x82b4 - 0x805C = 0x258
0x258 / 4 = 0x96
0x96 - 2 = 0x94
The short answer is I am placing a bunch of branch plus 0x8000 instructions
at the first locations in memory so 0x0000 will branch to 0x8000, 0x0004
will branch to 0x8004 and so on. Then I have a more proper table at 0x8000
.globl _start
_start:
b reset
b undef
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
Yes there are too many items there, doesnt hurt. I used the other
routine (I didnt have the b undef in there all of the lines other than
reset were bl other) to figure out which exception was being hit.
Once I figured out it was the undefined instruction.
I simply had the undef handler return as if the instruction had been
handled
undef:
movs pc,lr
You begin to see what mstorsjo found. the instruciton following the
bad operation is messed up.
through more experiments I found more interesting information. In
an old ARM ARM at least, the undefined is supposed to fill in the link
register with the address of the instruction after. to verify that
based on the disassembly
000080b4 <m4add>:
80b4: ee010a10 vmov s2, r0
Before calling m4add I put this line in notmain()
PUT32(0x80B4,0xFFFFFFFF);
You indeed get the bad instruction 0xFFFFFFFF.
so letting the program run (remove the 0xFFFFFFFF thing).
80bc: ee012a10 vmov s2, r2
80c0: ee013a90 vmov s3, r3
80c4: ee302a20 vadd.f32 s4, s0, s1
80c8: ee712a21 vadd.f32 s5, s2, s3
80cc: ee120a90 vmov r0, s5
80d0: e12fff1e bx lr
00000BAD
EE712A21
which is the second add...strange. rearrange the movs so that the
second add gets the denormals
vmov s2,r0
vmov s3,r1
vmov s0,r2
vmov s1,r3
00000BAD
EE120A90
80c4: ee302a20 vadd.f32 s4, s0, s1
80c8: ee712a21 vadd.f32 s5, s2, s3
80cc: ee120a90 vmov r0, s5
which is the floating point instruction after the bad one. interesting.
Lets add some nops
nop
nop
vadd.f32 s4,s0,s1
nop
nop
vadd.f32 s5,s2,s3
nop
nop
vmov r0,s5
nop
nop
00000BAD
EE120A90
no change, interesting, lets put back the vmovs
00000BAD
EE712A21
So what it appears to be doing is giving you the address to the floating
point instruction after the problem.
One more experiment
.globl m4add
m4add:
vmov s0,r0
vmov s1,r1
vmov s2,r2
vmov s3,r3
vadd.f32 s4,s0,s1
b skipper
vmov r0,s5
bx lr
skipper:
vadd.f32 s5,s2,s3
vmov r0,s5
bx lr
00000BAD
EE712A21
80c4: ee302a20 vadd.f32 s4, s0, s1
80c8: ea000001 b 80d4 <skipper>
80cc: ee120a90 vmov r0, s5
80d0: e12fff1e bx lr
000080d4 <skipper>:
80d4: ee712a21 vadd.f32 s5, s2, s3
80d8: ee120a90 vmov r0, s5
80dc: e12fff1e bx lr
good luck writing a handler for that if you work your way backward
from 0x80d4 the prior float instruction is vmov. Basically good luck
figuring out the prior float instruction based on the link register given.
So putting it all back together
hexstring(0x12345678);
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
hexstring(m4add(0x00012345,0x00000111,0x3F801230,0x3F801110));
hexstring(m4add(0x00000111,0x00012345,0x3F801230,0x3F801110));
hexstring(m4add(0x3F801230,0x3F801110,0x00000111,0x00012345));
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
hexstring(0x22222222);
hexstring(m4add2(0x3F801230,0x3F801110,0x3F800000,0x00000000));
hexstring(m4add2(0x00000111,0x00012345,0x3F801230,0x3F801110));
hexstring(m4add2(0x3F801230,0x3F801110,0x00000111,0x00012345));
hexstring(0x12345678);
12345678
400011A0
00012345
00000111
3F801230
3F800000
22222222
3F801230
00000111
3F801230
12345678
From the ARM1176jzfs TRM
The VFP11 coprocessor handles exceptions, other than inexact exceptions,
imprecisely with respect to both the state of the ARM11 processor and
the state of the VFP11 coprocessor. It detects an exceptional instruction
after the instruction passes the point for exception handling in the
ARM11 processor. It then enters the exceptional state and signals the
presence of an exception by refusing to accept a subsequent VFP
instruction. The instruction that triggers exception handling bounces
to the ARM11 processor. The bounced instruction is not necessarily the
instruction immediately following the exceptional instruction. Depending
on sequence of instructions that follow, the bounce can occur several
instructions later.
So this means that the instruction after is not unexpected.
The exception bit in the FPEXC register is set, until it is cleared
the fpu appears not to work. So I modified the undefined handler
to restore the FPEXC to have the SIMD/FPU enabled and the exception
bit cleared.
undef:
push {r0}
mov r0,#0x40000000
fmxr fpexc,r0
pop {r0}
subs pc,lr,#4
In order to properly preserve the r0 register I went ahead and setup
the undefined stack pointer up front.
;@ (PSR_UND_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xDB
msr cpsr_c,r0
mov sp,#0x00100000
;@ (PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD3
msr cpsr_c,r0
So now it works better
hexstring(0x12345678);
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
hexstring(m4add(0x00012345,0x00000111,0x3F801230,0x3F802220));
hexstring(m4add(0x00000111,0x00012345,0x3F801230,0x3F803330));
hexstring(m4add(0x3F801230,0x3F801110,0x00000111,0x00012345));
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F804440));
hexstring(0x22222222);
hexstring(m4add2(0x3F801230,0x3F805550,0x3F800000,0x00000000));
hexstring(m4add2(0x00000111,0x00012345,0x3F801230,0x3F806660));
hexstring(m4add2(0x3F801230,0x3F807770,0x00000111,0x00012345));
hexstring(0x12345678);
12345678
400011A0
40001A28
400022B0
400022B0 <-- stale result
40002B38
22222222
400033C0
400033C0 <-- stale result
400044D0
12345678
So the non-denormal operations worked. The denormal operations dont
actually execute so the floating point register is not changed, to
demonstrate this.
.globl m4vmov
m4vmov:
vmov s4,r0
vmov s5,r0
bx lr
hexstring(0x12345678);
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
hexstring(m4add(0x00012345,0x00000111,0x3F801230,0x3F802220));
m4vmov(0xABCDABCD);
hexstring(m4add(0x00000111,0x00012345,0x3F801230,0x3F803330));
m4vmov(0xABCDABCD);
hexstring(m4add(0x3F801230,0x3F801110,0x00000111,0x00012345));
m4vmov(0xABCDABCD);
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F804440));
hexstring(0x22222222);
hexstring(m4add2(0x3F801230,0x3F805550,0x3F800000,0x00000000));
m4vmov(0xABCDABCD);
hexstring(m4add2(0x00000111,0x00012345,0x3F801230,0x3F806660));
m4vmov(0xABCDABCD);
hexstring(m4add2(0x3F801230,0x3F807770,0x00000111,0x00012345));
hexstring(0x12345678);
12345678
400011A0
40001A28
400022B0
ABCDABCD <-- stale
40002B38
22222222
400033C0
ABCDABCD <-- stale
400044D0
12345678

57
boards/piaplus/float03/float03.c Normal file
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//-------------------------------------------------------------------
//-------------------------------------------------------------------
#include "uart.h"
void PUT32 ( unsigned int, unsigned int );
unsigned int m4add ( unsigned int, unsigned int, unsigned int, unsigned int );
unsigned int m4add2 ( unsigned int, unsigned int, unsigned int, unsigned int );
void m4vmov ( unsigned int );
//-------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
unsigned int rb;
rb=0xEA000000+((0x8000>>2)-2);
for(ra=0x00;ra<0x40;ra+=4) PUT32(ra,rb);
uart_init();
hexstring(0x12345678);
m4vmov(0xABCDABCD);
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F801110));
m4vmov(0xABCDABCD);
hexstring(m4add(0x00012345,0x00000111,0x3F801230,0x3F802220));
m4vmov(0xABCDABCD);
hexstring(m4add(0x00000000,0x00012345,0x3F801230,0x3F803330));
m4vmov(0xABCDABCD);
hexstring(m4add(0x3F801230,0x3F801110,0x00000111,0x00012345));
m4vmov(0xABCDABCD);
hexstring(m4add(0x3F800000,0x00000000,0x3F801230,0x3F804440));
hexstring(0x22222222);
m4vmov(0xABCDABCD);
hexstring(m4add2(0x3F801230,0x3F805550,0x3F800000,0x00000000));
m4vmov(0xABCDABCD);
hexstring(m4add2(0x00000111,0x00012345,0x3F801230,0x3F806660));
m4vmov(0xABCDABCD);
hexstring(m4add2(0x3F801230,0x3F807770,0x00000111,0x00012345));
hexstring(0x12345678);
return(0);
}
//-------------------------------------------------------------------
//-------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

75
boards/piaplus/float03/float03.hex Normal file
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:108000000E0000EA220000EA1A0000EB190000EB63
:10801000180000EB170000EB160000EB150000EB5A
:10802000140000EB130000EB120000EB110000EB5A
:10803000100000EB0F0000EB0E0000EB0D0000EB5A
:10804000500F11EE030680E3030580E3500F01EEAD
:108050000101A0E3100AE8EEDB00A0E300F021E15B
:1080600001D6A0E3D300A0E300F021E102D6A0E313
:10807000A40000EBFEFFFFEA01D6A0E304E02DE53B
:10808000A0009FE5470000EB04009DE4450000EBE5
:10809000F7FFFFEA04002DE50101A0E3100AE8EE76
:1080A00004009DE404F05EE201D6A0E304101EE5A6
:1080B00004102DE570009FE53A0000EB04009DE4FC
:1080C000380000EBEAFFFFEA001080E51EFF2FE119
:1080D000000090E51EFF2FE11EFF2FE1100A00EEC9
:1080E000901A00EE102A01EE903A01EE202A30EEAE
:1080F000212A71EE900A12EE1EFF2FE1100A00EE07
:10810000901A00EE102A01EE903A01EE202A30EE8D
:10811000212A71EE100A12EE1EFF2FE1100A02EE64
:10812000900A02EE1EFF2FE1ADDBBA00AD0B00009E
:10813000C07AFCEE900A17EE1EFF2FE110402DE9E9
:108140000040A0E118009FE5E0FFFFEB200010E3F6
:10815000FBFFFF0A0410A0E11040BDE804009FE50A
:10816000D8FFFFEA545021204050212070402DE9D3
:108170000050A0E12040A0E3044044E23504A0E127
:108180000F0000E2090050E3370080823000809247
:10819000E9FFFFEB000054E3F6FFFF1A7040BDE873
:1081A0002000A0E3E4FFFFEA10402DE9EEFFFFEB23
:1081B0000D00A0E3E0FFFFEB1040BDE80A00A0E3E4
:1081C000DDFFFFEA10402DE90110A0E3D4009FE598
:1081D000BCFFFFEB0010A0E3CC009FE5B9FFFFEB75
:1081E0000010A0E3C4009FE5B6FFFFEB0310A0E37F
:1081F000BC009FE5B3FFFFEB0010A0E3B4009FE5D8
:10820000B0FFFFEB0010A0E39C009FE5ADFFFFEB8C
:10821000C610A0E3A0009FE5AAFFFFEB9C109FE51E
:108220009C009FE5A7FFFFEB98009FE5A7FFFFEBF2
:108230003F1AC0E3121A81E388009FE5A1FFFFEB1C
:108240000010A0E380009FE59EFFFFEB0040A0E34D
:108250000400A0E1014084E29EFFFFEB960054E39E
:10826000FAFFFF1A0319A0E360009FE595FFFFEBFB
:108270000040A0E30400A0E1014084E295FFFFEB91
:10828000960054E3FAFFFF1A0010A0E33C009FE5BC
:108290008CFFFFEB0310A0E310009FE589FFFFEBCD
:1082A0000000A0E31080BDE80450212044502120AC
:1082B000605021204C502120505021204850212036
:1082C0000E0100006850212004002020940020208E
:1082D0009800202010402DE918409FE50010A0E3F1
:1082E0000400A0E177FFFFEB0400A0E11040BDE82F
:1082F000021CA0E373FFFFEA08B4002000009FE522
:1083000072FFFFEA20B4002010402DE90040A0E3F6
:108310000400A0E130119FE5044084E269FFFFEB17
:10832000400054E3F9FFFF1AA5FFFFEB1C019FE596
:108330009CFFFFEB18019FE577FFFFEB14319FE5F2
:1083400014219FE50010A0E3FE05A0E362FFFFEB10
:1083500094FFFFEBF8009FE56FFFFFEBFC309FE51C
:10836000F4209FE5F8109FE5F8009FE55AFFFFEB2A
:108370008CFFFFEBD8009FE567FFFFEBE8309FE540
:10838000D4209FE5DC109FE50000A0E352FFFFEB47
:1083900084FFFFEBB8009FE55FFFFFEBC4309FE574
:1083A000BC209FE5AC109FE5AC009FE54AFFFFEBCA
:1083B0007CFFFFEB98009FE557FFFFEBAC309FE59C
:1083C00094209FE50010A0E3FE05A0E342FFFFEB31
:1083D00074FFFFEB98009FE572FFFFEB70009FE5D5
:1083E0004DFFFFEB0030A0E3FE25A0E384109FE5E6
:1083F00064009FE540FFFFEB6AFFFFEB50009FE545
:1084000045FFFFEB70309FE54C209FE554109FE542
:108410004C009FE538FFFFEB62FFFFEB30009FE56C
:108420003DFFFFEB3C309FE534209FE54C109FE57E
:1084300024009FE530FFFFEB5AFFFFEB0C009FE5A8
:1084400058FFFFEB0000A0E31080BDE8FE1F00EA2C
:1084500078563412CDABCDAB1011803F3012803F37
:108460002022803F11010000452301003033803F6E
:108470004044803F222222225055803F6066803F48
:048480007077803F52
:040000030000800079
:00000001FF

12
boards/piaplus/float03/memmap Normal file
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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x30000-0x8000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

135
boards/piaplus/float03/uart.c Normal file
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
unsigned int myfun ( float x )
{
return((unsigned int)x);
}
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
#define GPPUD 0x20200094
#define GPPUDCLK0 0x20200098
#define AUX_ENABLES 0x20215004
#define AUX_MU_IO_REG 0x20215040
#define AUX_MU_IER_REG 0x20215044
#define AUX_MU_IIR_REG 0x20215048
#define AUX_MU_LCR_REG 0x2021504C
#define AUX_MU_MCR_REG 0x20215050
#define AUX_MU_LSR_REG 0x20215054
#define AUX_MU_MSR_REG 0x20215058
#define AUX_MU_SCRATCH 0x2021505C
#define AUX_MU_CNTL_REG 0x20215060
#define AUX_MU_STAT_REG 0x20215064
#define AUX_MU_BAUD_REG 0x20215068
#define ARM_TIMER_LOD 0x2000B400
#define ARM_TIMER_VAL 0x2000B404
#define ARM_TIMER_CTL 0x2000B408
#define ARM_TIMER_DIV 0x2000B41C
#define ARM_TIMER_CNT 0x2000B420
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//alt function 5 for uart1
//alt function 0 for uart0
//((250,000,000/115200)/8)-1 = 270
//------------------------------------------------------------------------
void uart_putc ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_putc(rc);
if(rb==0) break;
}
uart_putc(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_putc(0x0D);
uart_putc(0x0A);
}
//------------------------------------------------------------------------
int uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
return(0);
}
//-------------------------------------------------------------------------
void init_timer ( void )
{
PUT32(ARM_TIMER_CTL,0x00000000);
PUT32(ARM_TIMER_CTL,0x00000200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

11
boards/piaplus/float03/uart.h Normal file
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
void uart_putc ( unsigned int c );
void hexstrings ( unsigned int d );
void hexstring ( unsigned int d );
int uart_init ( void );
void init_timer ( void );
unsigned int timer_tick ( void );
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------

134
boards/piaplus/float03/vectors.s Normal file
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
b reset
b undef
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
bl other
reset:
;@ enable fpu
mrc p15, 0, r0, c1, c0, 2
orr r0,r0,#0x300000 ;@ single precision
orr r0,r0,#0xC00000 ;@ double precision
mcr p15, 0, r0, c1, c0, 2
mov r0,#0x40000000
fmxr fpexc,r0
;@ (PSR_UND_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xDB
msr cpsr_c,r0
mov sp,#0x00100000
;@ (PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD3
msr cpsr_c,r0
mov sp,#0x00200000
bl notmain
hang: b hang
other:
mov sp,#0x00100000
push {lr}
ldr r0,=0xBADBAD
bl hexstring
pop {r0}
bl hexstring
b hang
undef:
push {r0}
mov r0,#0x40000000
fmxr fpexc,r0
pop {r0}
subs pc,lr,#4
;@undef:
mov sp,#0x00100000
ldr r1,[lr,#-4]
push {r1}
ldr r0,=0xBAD
bl hexstring
pop {r0}
bl hexstring
b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
.globl m4add
m4add:
vmov s0,r0
vmov s1,r1
vmov s2,r2
vmov s3,r3
vadd.f32 s4,s0,s1
vadd.f32 s5,s2,s3
vmov r0,s5
bx lr
.globl m4add2
m4add2:
vmov s0,r0
vmov s1,r1
vmov s2,r2
vmov s3,r3
vadd.f32 s4,s0,s1
vadd.f32 s5,s2,s3
vmov r0,s4
bx lr
.globl m4vmov
m4vmov:
vmov s4,r0
vmov s5,r0
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------