sambuc/raspberrypi
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

more work on SVC mode pi2 examples

Browse Source
This commit is contained in:
dwelch
2016-03-27 14:34:15 -04:00
parent e7b38caffb
commit b0f1b6e92a
17 changed files with 836 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
boards/pi2/HYP/README Normal file
View File

@@ -0,0 +1,4 @@
will write more on this. As of this time the GPU based bootstrap leaves
the ARM in HYP mode when we get control at address 0x8000. These
examples leave the arm in that mode.

3
boards/pi2/SVC/README Normal file
View File

@@ -0,0 +1,3 @@
need to work on this readme. This directory puts the pi2 in svc mode
it boots as of this writing in HYP mode.

69
boards/pi2/SVC/blinker03/Makefile Normal file
View File

@@ -0,0 +1,69 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker03.hex blinker03.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker03.o : blinker03.c
$(ARMGNU)-gcc $(COPS) -c blinker03.c -o blinker03.o
blinker03.elf : memmap vectors.o blinker03.o
$(ARMGNU)-ld vectors.o blinker03.o -T memmap -o blinker03.elf
$(ARMGNU)-objdump -D blinker03.elf > blinker03.list
blinker03.bin : blinker03.elf
$(ARMGNU)-objcopy blinker03.elf -O binary blinker03.bin
blinker03.hex : blinker03.elf
$(ARMGNU)-objcopy blinker03.elf -O ihex blinker03.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPSx = -std-compile-opts
OOPS = -std-link-opts
clang : blinker03.clang.hex blinker03.clang.bin
blinker03.clang.bc : blinker03.c
clang $(LOPS) -c blinker03.c -o blinker03.clang.bc
blinker03.clang.opt.elf : memmap vectors.o blinker03.clang.bc
opt $(OOPS) blinker03.clang.bc -o blinker03.clang.opt.bc
llc $(LLCOPS) blinker03.clang.opt.bc -o blinker03.clang.opt.s
$(ARMGNU)-as blinker03.clang.opt.s -o blinker03.clang.opt.o
$(ARMGNU)-ld -o blinker03.clang.opt.elf -T memmap vectors.o blinker03.clang.opt.o
$(ARMGNU)-objdump -D blinker03.clang.opt.elf > blinker03.clang.opt.list
blinker03.clang.hex : blinker03.clang.opt.elf
$(ARMGNU)-objcopy blinker03.clang.opt.elf blinker03.clang.hex -O ihex
blinker03.clang.bin : blinker03.clang.opt.elf
$(ARMGNU)-objcopy blinker03.clang.opt.elf blinker03.clang.bin -O binary

16
boards/pi2/SVC/blinker03/README Normal file
View File

@@ -0,0 +1,16 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi2, see other directories for other flavors
of raspberry pi. This example switches back to SVC mode from HYP mode.
This example uses the free running ARM timer, not the 64 bit system
timer as in blinker02 but the so called ARM timer. In free running mode
which is a little different from blinker04 which uses the timer mode.
The system clock appears to come up at 250MHz as documented. Divide that
by 250 to get 1Mhz on this free running ARM timer. Then count to four
million ticks between LED state changes and the led will change state
every four seconds. Count to 20 million, 20 seconds.

82
boards/pi2/SVC/blinker03/blinker03.c Normal file
View File

@@ -0,0 +1,82 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_LOD 0x3F00B400
#define ARM_TIMER_VAL 0x3F00B404
#define ARM_TIMER_CTL 0x3F00B408
#define ARM_TIMER_DIV 0x3F00B41C
#define ARM_TIMER_CNT 0x3F00B420
#define SYSTIMERCLO 0x3F003004
#define GPFSEL1 0x3F200004
#define GPSET0 0x3F20001C
#define GPCLR0 0x3F200028
#define GPFSEL3 0x3F20000C
#define GPFSEL4 0x3F200010
#define GPSET1 0x3F200020
#define GPCLR1 0x3F20002C
//#define TIMEOUT 20000000
#define TIMEOUT 4000000
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
unsigned int rb;
ra=GET32(GPFSEL4);
ra&=~(7<<21);
ra|=1<<21;
PUT32(GPFSEL4,ra);
ra=GET32(GPFSEL3);
ra&=~(7<<15);
ra|=1<<15;
PUT32(GPFSEL3,ra);
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
rb=GET32(ARM_TIMER_CNT);
while(1)
{
PUT32(GPSET1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
while(1)
{
ra=GET32(ARM_TIMER_CNT);
if((ra-rb)>=TIMEOUT) break;
}
rb+=TIMEOUT;
PUT32(GPCLR1,1<<(47-32));
PUT32(GPSET1,1<<(35-32));
while(1)
{
ra=GET32(ARM_TIMER_CNT);
if((ra-rb)>=TIMEOUT) break;
}
rb+=TIMEOUT;
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

11
boards/pi2/SVC/blinker03/memmap Normal file
View File

@@ -0,0 +1,11 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

52
boards/pi2/SVC/blinker03/vectors.s Normal file
View File

@@ -0,0 +1,52 @@
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
skip:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

71
boards/pi2/SVC/blinker04/Makefile Normal file
View File

@@ -0,0 +1,71 @@
ARMGNU ?= arm-none-eabi
AOPS = --warn --fatal-warnings
COPS = -Wall -Werror -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker04.hex blinker04.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker04.o : blinker04.c
$(ARMGNU)-gcc $(COPS) -c blinker04.c -o blinker04.o
blinker04.elf : memmap vectors.o blinker04.o
$(ARMGNU)-ld vectors.o blinker04.o -T memmap -o blinker04.elf
$(ARMGNU)-objdump -D blinker04.elf > blinker04.list
blinker04.bin : blinker04.elf
$(ARMGNU)-objcopy blinker04.elf -O binary blinker04.bin
blinker04.hex : blinker04.elf
$(ARMGNU)-objcopy blinker04.elf -O ihex blinker04.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPSx = -std-compile-opts
OOPS = -std-link-opts
clang : blinker04.clang.hex blinker04.clang.bin
blinker04.clang.bc : blinker04.c
clang $(LOPS) -c blinker04.c -o blinker04.clang.bc
blinker04.clang.opt.elf : memmap vectors.o blinker04.clang.bc
opt $(OOPS) blinker04.clang.bc -o blinker04.clang.opt.bc
llc $(LLCOPS) blinker04.clang.opt.bc -o blinker04.clang.opt.s
$(ARMGNU)-as blinker04.clang.opt.s -o blinker04.clang.opt.o
$(ARMGNU)-ld -o blinker04.clang.opt.elf -T memmap vectors.o blinker04.clang.opt.o
$(ARMGNU)-objdump -D blinker04.clang.opt.elf > blinker04.clang.opt.list
blinker04.clang.hex : blinker04.clang.opt.elf
$(ARMGNU)-objcopy blinker04.clang.opt.elf blinker04.clang.hex -O ihex
blinker04.clang.bin : blinker04.clang.opt.elf
$(ARMGNU)-objcopy blinker04.clang.opt.elf blinker04.clang.bin -O binary

34
boards/pi2/SVC/blinker04/README Normal file
View File

@@ -0,0 +1,34 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi2, see other directories for other flavors
of raspberry pi. This example switches back to SVC mode from HYP mode.
This example uses the ARM timer, not in free running mode like blinker03
but the other mode.
A few more typos in the datasheet. It is an SP804 not AP804 (page 196).
Page 197, bit 1 32 bit counter not 23 bit counter. Page 198 neither
the raw nor masked IRQ registers are at address 0x40C.
So if you want to poll an arbitrary time with a free running timer you
take a reference count, and then take a sample, wait for the difference
between the sample and reference count. You have to know if it is an
up or down counter. You can turn this timer into a free running timer
by setting the load registers to all ones. What you can also do with
this kind of timer that you cannot with a free runing timer is set the
load registers to some number of ticks (minus 1) and it will roll over
the counter at that rate. Often these kinds of timers have an interrupt
as does this one. And you can poll the interrupt bit without having to
actually configure an interrupt. This example sets the prescaler to
divide by 250. The clock as running here is 250Mhz, so this takes it
down to 1Mhz, 1000000 clocks per second. Now if we set the load registers
to 4 million counts (minus 1) then every 4 million counts at 1 million
per second is 4 seconds. Every 4 seconds the timer interrupt will fire.
Which you can read in the raw irq (not masked) register. Once it is
set you have to write anything to the clear interrupt register. If you
were to set up an interrupt service routine, you would clear that
interrupt in the interrupt handler.

80
boards/pi2/SVC/blinker04/blinker04.c Normal file
View File

@@ -0,0 +1,80 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_LOD 0x3F00B400
#define ARM_TIMER_VAL 0x3F00B404
#define ARM_TIMER_CTL 0x3F00B408
#define ARM_TIMER_CLI 0x3F00B40C
#define ARM_TIMER_RIS 0x3F00B410
#define ARM_TIMER_MIS 0x3F00B414
#define ARM_TIMER_RLD 0x3F00B418
#define ARM_TIMER_DIV 0x3F00B41C
#define ARM_TIMER_CNT 0x3F00B420
#define SYSTIMERCLO 0x3F003004
#define GPFSEL1 0x3F200004
#define GPSET0 0x3F20001C
#define GPCLR0 0x3F200028
#define GPFSEL3 0x3F20000C
#define GPFSEL4 0x3F200010
#define GPSET1 0x3F200020
#define GPCLR1 0x3F20002C
//#define TIMEOUT 20000000
#define TIMEOUT 4000000
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
ra=GET32(GPFSEL4);
ra&=~(7<<21);
ra|=1<<21;
PUT32(GPFSEL4,ra);
ra=GET32(GPFSEL3);
ra&=~(7<<15);
ra|=1<<15;
PUT32(GPFSEL3,ra);
PUT32(ARM_TIMER_CTL,0x003E0000);
PUT32(ARM_TIMER_LOD,TIMEOUT-1);
PUT32(ARM_TIMER_RLD,TIMEOUT-1);
PUT32(ARM_TIMER_DIV,0x000000F9);
PUT32(ARM_TIMER_CLI,0);
PUT32(ARM_TIMER_CTL,0x003E0082);
while(1)
{
PUT32(GPSET1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
while(1) if(GET32(ARM_TIMER_RIS)) break;
PUT32(ARM_TIMER_CLI,0);
PUT32(GPCLR1,1<<(47-32));
PUT32(GPSET1,1<<(35-32));
while(1) if(GET32(ARM_TIMER_RIS)) break;
PUT32(ARM_TIMER_CLI,0);
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

11
boards/pi2/SVC/blinker04/memmap Normal file
View File

@@ -0,0 +1,11 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

52
boards/pi2/SVC/blinker04/vectors.s Normal file
View File

@@ -0,0 +1,52 @@
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
skip:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

70
boards/pi2/SVC/blinker05/Makefile Normal file
View File

@@ -0,0 +1,70 @@
ARMGNU ?= arm-none-eabi
AOPS = --warn --fatal-warnings
COPS = -Wall -Werror -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker05.hex blinker05.bin
all : gcc clang
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker05.o : blinker05.c
$(ARMGNU)-gcc $(COPS) -c blinker05.c -o blinker05.o
blinker05.elf : memmap vectors.o blinker05.o
$(ARMGNU)-ld vectors.o blinker05.o -T memmap -o blinker05.elf
$(ARMGNU)-objdump -D blinker05.elf > blinker05.list
blinker05.bin : blinker05.elf
$(ARMGNU)-objcopy blinker05.elf -O binary blinker05.bin
blinker05.hex : blinker05.elf
$(ARMGNU)-objcopy blinker05.elf -O ihex blinker05.hex
LOPS = -Wall -m32 -emit-llvm
LLCOPS = -march=arm -mcpu=arm1176jzf-s
LLCOPS0 = -march=arm
LLCOPS1 = -march=arm -mcpu=arm1176jzf-s
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
OOPS = -std-compile-opts
clang : blinker05.clang.hex blinker05.clang.bin
blinker05.clang.bc : blinker05.c
clang $(LOPS) -c blinker05.c -o blinker05.clang.bc
blinker05.clang.opt.elf : memmap vectors.o blinker05.clang.bc
opt $(OOPS) blinker05.clang.bc -o blinker05.clang.opt.bc
llc $(LLCOPS) blinker05.clang.opt.bc -o blinker05.clang.opt.s
$(ARMGNU)-as blinker05.clang.opt.s -o blinker05.clang.opt.o
$(ARMGNU)-ld -o blinker05.clang.opt.elf -T memmap vectors.o blinker05.clang.opt.o
$(ARMGNU)-objdump -D blinker05.clang.opt.elf > blinker05.clang.opt.list
blinker05.clang.hex : blinker05.clang.opt.elf
$(ARMGNU)-objcopy blinker05.clang.opt.elf blinker05.clang.hex -O ihex
blinker05.clang.bin : blinker05.clang.opt.elf
$(ARMGNU)-objcopy blinker05.clang.opt.elf blinker05.clang.bin -O binary

20
boards/pi2/SVC/blinker05/README Normal file
View File

@@ -0,0 +1,20 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi2, see other directories for other flavors
of raspberry pi. This example switches back to SVC mode from HYP mode.
Also note to make more room for ram the raspberry pi 2 uses a base
address for peripherals of 0x3F000000 where the raspberry pi used
0x20000000.
Also note that for the raspberry pi 2 the arm file copied from the
sd card to ram is kernel7.img the older raspberry pis still use
kernel.img.
So I have code that switches back to SVC mode, but still more work
to do on this. In theory all I have to do is change the VBAR, but
that hangs. So doing it the old fashioned way like I do with the
ARM11 based pis and setting up the exception table at address 0x000

145
boards/pi2/SVC/blinker05/blinker05.c Normal file
View File

@@ -0,0 +1,145 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
extern void enable_irq ( void );
extern void enable_fiq ( void );
extern void SVCTEST ( void );
#define ARM_TIMER_LOD 0x3F00B400
#define ARM_TIMER_VAL 0x3F00B404
#define ARM_TIMER_CTL 0x3F00B408
#define ARM_TIMER_CLI 0x3F00B40C
#define ARM_TIMER_RIS 0x3F00B410
#define ARM_TIMER_MIS 0x3F00B414
#define ARM_TIMER_RLD 0x3F00B418
#define ARM_TIMER_DIV 0x3F00B41C
#define ARM_TIMER_CNT 0x3F00B420
#define SYSTIMERCLO 0x3F003004
#define GPFSEL1 0x3F200004
#define GPSET0 0x3F20001C
#define GPCLR0 0x3F200028
#define GPFSEL3 0x3F20000C
#define GPFSEL4 0x3F200010
#define GPSET1 0x3F200020
#define GPCLR1 0x3F20002C
#define IRQ_BASIC 0x3F00B200
#define IRQ_PEND1 0x3F00B204
#define IRQ_PEND2 0x3F00B208
#define IRQ_FIQ_CONTROL 0x3F00B210
#define IRQ_ENABLE_BASIC 0x3F00B218
#define IRQ_DISABLE_BASIC 0x3F00B224
volatile unsigned int icount;
//-------------------------------------------------------------------------
void c_irq_handler ( void )
{
icount++;
if(icount&1)
{
PUT32(GPSET1,1<<(47-32));
PUT32(GPSET1,1<<(35-32));
}
else
{
PUT32(GPCLR1,1<<(35-32));
PUT32(GPCLR1,1<<(47-32));
}
PUT32(ARM_TIMER_CLI,0);
}
//-------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
PUT32(IRQ_DISABLE_BASIC,1);
ra=GET32(GPFSEL4);
ra&=~(7<<21);
ra|=1<<21;
PUT32(GPFSEL4,ra);
ra=GET32(GPFSEL3);
ra&=~(7<<15);
ra|=1<<15;
PUT32(GPFSEL3,ra);
PUT32(GPSET1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
if(1)
{
PUT32(ARM_TIMER_CTL,0x003E0000);
PUT32(ARM_TIMER_LOD,1000000-1);
PUT32(ARM_TIMER_RLD,1000000-1);
PUT32(ARM_TIMER_DIV,0x000000F9);
PUT32(ARM_TIMER_CLI,0);
PUT32(ARM_TIMER_CTL,0x003E00A2);
for(ra=0;ra<3;ra++)
{
PUT32(GPSET1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
while(1) if(GET32(ARM_TIMER_MIS)) break;
PUT32(ARM_TIMER_CLI,0);
PUT32(GPCLR1,1<<(47-32));
PUT32(GPSET1,1<<(35-32));
while(1) if(GET32(ARM_TIMER_MIS)) break;
PUT32(ARM_TIMER_CLI,0);
}
PUT32(ARM_TIMER_LOD,2000000-1);
PUT32(ARM_TIMER_RLD,2000000-1);
PUT32(ARM_TIMER_CLI,0);
PUT32(IRQ_ENABLE_BASIC,1);
for(ra=0;ra<2;ra++)
{
PUT32(GPSET1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
while(1) if(GET32(IRQ_BASIC)&1) break;
PUT32(ARM_TIMER_CLI,0);
PUT32(GPCLR1,1<<(47-32));
PUT32(GPSET1,1<<(35-32));
while(1) if(GET32(IRQ_BASIC)&1) break;
PUT32(ARM_TIMER_CLI,0);
}
}
PUT32(ARM_TIMER_CTL,0x003E0000);
PUT32(ARM_TIMER_LOD,4000000-1);
PUT32(ARM_TIMER_RLD,4000000-1);
PUT32(ARM_TIMER_DIV,0x000000F9);
PUT32(ARM_TIMER_CLI,0);
PUT32(IRQ_ENABLE_BASIC,1);
icount=0;
enable_irq();
PUT32(ARM_TIMER_CTL,0x003E00A2);
PUT32(ARM_TIMER_CLI,0);
while(1) continue;
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

11
boards/pi2/SVC/blinker05/memmap Normal file
View File

@@ -0,0 +1,11 @@
MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

105
boards/pi2/SVC/blinker05/vectors.s Normal file
View File

@@ -0,0 +1,105 @@
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,hyp_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word hang
prefetch_handler: .word hang
data_handler: .word hang
hyp_handler: .word hang
irq_handler: .word irq
fiq_handler: .word hang
reset:
;@ b skip
mrs r0,cpsr
and r1,r0,#0x1F
cmp r1,#0x1A
bne skip
bic r0,r0,#0x1F
orr r0,r0,#0x13
msr spsr_cxsf,r0
add r0,pc,#4
msr ELR_hyp,r0 ;@ .word 0xe12ef300
eret ;@ .word 0xe160006e
skip:
mov r0,#0x8000
mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ (PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD2
msr cpsr_c,r0
mov sp,#0x8000
;@ (PSR_FIQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD1
msr cpsr_c,r0
mov sp,#0x4000
;@ (PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD3
msr cpsr_c,r0
mov sp,#0x8000000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
.globl enable_irq
enable_irq:
mrs r0,cpsr
bic r0,r0,#0x80
msr cpsr_c,r0
bx lr
irq:
push {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
bl c_irq_handler
pop {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
subs pc,lr,#4
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------