adding atags example
This commit is contained in:
root
33
atags/Makefile
Normal file
33
atags/Makefile
Normal file
@@ -0,0 +1,33 @@
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ARMGNU ?= arm-none-eabi
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COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
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gcc : kernel.img
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clean :
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rm -f *.o
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rm -f *.bin
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rm -f *.hex
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rm -f *.elf
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rm -f *.list
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rm -f *.img
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vectors.o : vectors.s
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$(ARMGNU)-as vectors.s -o vectors.o
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atags.o : atags.c
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$(ARMGNU)-gcc $(COPS) -c atags.c -o atags.o
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periph.o : periph.c
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$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
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kernel.img : memmap vectors.o periph.o atags.o
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$(ARMGNU)-ld vectors.o periph.o atags.o -T memmap -o atags.elf
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$(ARMGNU)-objdump -D atags.elf > atags.list
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$(ARMGNU)-objcopy atags.elf -O ihex atags.hex
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$(ARMGNU)-objcopy atags.elf -O binary kernel.img
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8
atags/README
Normal file
8
atags/README
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@@ -0,0 +1,8 @@
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See the top level README file for more information on documentation
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and how to run these programs.
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Derived from bootloader05. This is to demonstrate the contents of the
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r0, r1, and r2 registers when kernel.img is entered...
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72
atags/atags.c
Normal file
72
atags/atags.c
Normal file
@@ -0,0 +1,72 @@
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//-------------------------------------------------------------------------
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//-------------------------------------------------------------------------
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// The raspberry pi firmware at the time this was written defaults
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// loading at address 0x8000. Although this bootloader could easily
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// load at 0x0000, it loads at 0x8000 so that the same binaries built
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// for the SD card work with this bootloader. Change the ARMBASE
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// below to use a different location.
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#define ARMBASE 0x8000
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extern void PUT32 ( unsigned int, unsigned int );
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extern void PUT16 ( unsigned int, unsigned int );
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extern void PUT8 ( unsigned int, unsigned int );
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extern unsigned int GET32 ( unsigned int );
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extern unsigned int GETPC ( void );
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extern void BRANCHTO ( unsigned int );
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extern void dummy ( unsigned int );
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extern void uart_init ( void );
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extern unsigned int uart_lcr ( void );
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extern void uart_flush ( void );
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extern void uart_send ( unsigned int );
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extern unsigned int uart_recv ( void );
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extern void hexstring ( unsigned int );
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extern void hexstrings ( unsigned int );
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extern void timer_init ( void );
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extern unsigned int timer_tick ( void );
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extern void timer_init ( void );
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extern unsigned int timer_tick ( void );
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//------------------------------------------------------------------------
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unsigned char xstring[256];
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//------------------------------------------------------------------------
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int notmain ( unsigned int a, unsigned int b, unsigned int c )
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{
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unsigned int ra;
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uart_init();
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hexstring(a);
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hexstring(b);
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hexstring(c);
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if(c)
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{
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if((c&3)==0)
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{
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for(ra=0;ra<5;ra++)
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{
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hexstring(GET32(c+(ra<<2)));
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}
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}
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}
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return(0);
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}
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//-------------------------------------------------------------------------
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//-------------------------------------------------------------------------
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//-------------------------------------------------------------------------
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//
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// Copyright (c) 2012 David Welch dwelch@dwelch.com
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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//
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//-------------------------------------------------------------------------
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BIN
atags/atags.elf
Executable file
BIN
atags/atags.elf
Executable file
Binary file not shown.
49
atags/atags.hex
Normal file
49
atags/atags.hex
Normal file
@@ -0,0 +1,49 @@
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:1080000002D9A0E39F0000EBFEFFFFEA001080E52D
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:108010001EFF2FE1B010C0E11EFF2FE10010C0E5F0
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:108020001EFF2FE1000090E51EFF2FE10E00A0E1F2
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:108030001EFF2FE110FF2FE11EFF2FE108402DE969
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:1080400008009FE5F6FFFFEB0840BDE81EFF2FE1AB
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:108050005450212008402DE91C009FE5F0FFFFEB64
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:10806000010010E3FBFFFF0A10009FE5ECFFFFEBB0
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:10807000FF0000E20840BDE81EFF2FE15450212020
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:108080004050212010402DE90040A0E11C009FE558
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:10809000E3FFFFEB200010E3FBFFFF0A10009FE56A
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:1080A0000410A0E1D8FFFFEB1040BDE81EFF2FE158
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:1080B000545021204050212008402DE910009FE518
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:1080C000D7FFFFEB010C10E3FBFFFF1A0840BDE8F0
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:1080D0001EFF2FE15450212038402DE90050A0E12F
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:1080E0002040A0E3044044E23534A0E10F3003E235
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:1080F000090053E33700838230008392E0FFFFEBF7
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:10810000000054E3F6FFFF1A2000A0E33840BDE86A
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:10811000DBFFFFEA08402DE9EEFFFFEB0D00A0E3D7
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:10812000D7FFFFEB0A00A0E30840BDE8D4FFFFEA59
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:1081300010402DE9D8009FE50110A0E3B2FFFFEB4E
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:10814000D0009FE50010A0E3AFFFFFEBC8009FE564
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:108150000010A0E3ACFFFFEBC0009FE50310A0E31D
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:10816000A9FFFFEBB8009FE50010A0E3A6FFFFEB1F
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:10817000A0009FE50010A0E3A3FFFFEBA4009FE594
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:10818000C610A0E3A0FFFFEB9C109FE59C009FE5BD
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:108190009DFFFFEB98009FE5A1FFFFEB3F1AC0E3B7
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:1081A000121A81E388009FE597FFFFEB84009FE5AB
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:1081B0000010A0E394FFFFEB0040A0E30400A0E167
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:1081C000014084E29BFFFFEB960054E3FAFFFF1AA5
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:1081D00064009FE50319A0E38BFFFFEB0040A0E3E1
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:1081E0000400A0E1014084E292FFFFEB960054E31B
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:1081F000FAFFFF1A40009FE50010A0E382FFFFEBAB
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:1082000014009FE50310A0E37FFFFFEB1040BDE8E3
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:108210001EFF2FE1045021204450212060502120D6
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:108220004C50212050502120485021200E010000A8
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:108230006850212004002020940020209800202055
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:1082400010402DE91C409FE5F918A0E30400A0E1CF
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:108250006DFFFFEB0400A0E10C109FE56AFFFFEB50
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:108260001040BDE81EFF2FE108B400200002F90015
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:1082700008402DE908009FE569FFFFEB0840BDE8D5
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:108280001EFF2FE120B4002070402DE90040A0E146
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:108290000250A0E10160A0E1A4FFFFEB0400A0E117
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:1082A0009BFFFFEB0600A0E199FFFFEB0500A0E1BB
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:1082B00097FFFFEB000055E30700000A034015E2BB
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:1082C0000500001A040185E055FFFFEB014084E240
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:1082D0008FFFFFEB050054E3F9FFFF1A0000A0E356
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:0882E0007040BDE81EFF2FE114
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:040000030000800079
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:00000001FF
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260
atags/atags.list
Normal file
260
atags/atags.list
Normal file
@@ -0,0 +1,260 @@
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atags.elf: file format elf32-littlearm
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Disassembly of section .text:
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00008000 <_start>:
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8000: e3a0d902 mov sp, #32768 ; 0x8000
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8004: eb00009f bl 8288 <notmain>
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00008008 <hang>:
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8008: eafffffe b 8008 <hang>
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0000800c <PUT32>:
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800c: e5801000 str r1, [r0]
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8010: e12fff1e bx lr
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00008014 <PUT16>:
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8014: e1c010b0 strh r1, [r0]
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8018: e12fff1e bx lr
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0000801c <PUT8>:
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801c: e5c01000 strb r1, [r0]
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8020: e12fff1e bx lr
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00008024 <GET32>:
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8024: e5900000 ldr r0, [r0]
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8028: e12fff1e bx lr
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0000802c <GETPC>:
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802c: e1a0000e mov r0, lr
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8030: e12fff1e bx lr
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00008034 <BRANCHTO>:
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8034: e12fff10 bx r0
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00008038 <dummy>:
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8038: e12fff1e bx lr
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0000803c <uart_lcr>:
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803c: e92d4008 push {r3, lr}
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8040: e59f0008 ldr r0, [pc, #8] ; 8050 <uart_lcr+0x14>
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8044: ebfffff6 bl 8024 <GET32>
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8048: e8bd4008 pop {r3, lr}
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804c: e12fff1e bx lr
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8050: 20215054 eorcs r5, r1, r4, asr r0
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00008054 <uart_recv>:
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8054: e92d4008 push {r3, lr}
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8058: e59f001c ldr r0, [pc, #28] ; 807c <uart_recv+0x28>
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805c: ebfffff0 bl 8024 <GET32>
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8060: e3100001 tst r0, #1
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8064: 0afffffb beq 8058 <uart_recv+0x4>
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8068: e59f0010 ldr r0, [pc, #16] ; 8080 <uart_recv+0x2c>
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806c: ebffffec bl 8024 <GET32>
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8070: e20000ff and r0, r0, #255 ; 0xff
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8074: e8bd4008 pop {r3, lr}
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8078: e12fff1e bx lr
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807c: 20215054 eorcs r5, r1, r4, asr r0
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8080: 20215040 eorcs r5, r1, r0, asr #32
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00008084 <uart_send>:
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8084: e92d4010 push {r4, lr}
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8088: e1a04000 mov r4, r0
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808c: e59f001c ldr r0, [pc, #28] ; 80b0 <uart_send+0x2c>
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8090: ebffffe3 bl 8024 <GET32>
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8094: e3100020 tst r0, #32
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8098: 0afffffb beq 808c <uart_send+0x8>
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809c: e59f0010 ldr r0, [pc, #16] ; 80b4 <uart_send+0x30>
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80a0: e1a01004 mov r1, r4
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80a4: ebffffd8 bl 800c <PUT32>
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80a8: e8bd4010 pop {r4, lr}
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80ac: e12fff1e bx lr
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80b0: 20215054 eorcs r5, r1, r4, asr r0
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80b4: 20215040 eorcs r5, r1, r0, asr #32
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000080b8 <uart_flush>:
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80b8: e92d4008 push {r3, lr}
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80bc: e59f0010 ldr r0, [pc, #16] ; 80d4 <uart_flush+0x1c>
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80c0: ebffffd7 bl 8024 <GET32>
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80c4: e3100c01 tst r0, #256 ; 0x100
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80c8: 1afffffb bne 80bc <uart_flush+0x4>
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80cc: e8bd4008 pop {r3, lr}
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80d0: e12fff1e bx lr
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80d4: 20215054 eorcs r5, r1, r4, asr r0
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000080d8 <hexstrings>:
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80d8: e92d4038 push {r3, r4, r5, lr}
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80dc: e1a05000 mov r5, r0
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80e0: e3a04020 mov r4, #32
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80e4: e2444004 sub r4, r4, #4
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80e8: e1a03435 lsr r3, r5, r4
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80ec: e203300f and r3, r3, #15
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80f0: e3530009 cmp r3, #9
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80f4: 82830037 addhi r0, r3, #55 ; 0x37
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80f8: 92830030 addls r0, r3, #48 ; 0x30
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80fc: ebffffe0 bl 8084 <uart_send>
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8100: e3540000 cmp r4, #0
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8104: 1afffff6 bne 80e4 <hexstrings+0xc>
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8108: e3a00020 mov r0, #32
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810c: e8bd4038 pop {r3, r4, r5, lr}
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8110: eaffffdb b 8084 <uart_send>
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00008114 <hexstring>:
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8114: e92d4008 push {r3, lr}
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8118: ebffffee bl 80d8 <hexstrings>
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811c: e3a0000d mov r0, #13
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8120: ebffffd7 bl 8084 <uart_send>
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8124: e3a0000a mov r0, #10
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8128: e8bd4008 pop {r3, lr}
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812c: eaffffd4 b 8084 <uart_send>
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00008130 <uart_init>:
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8130: e92d4010 push {r4, lr}
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8134: e59f00d8 ldr r0, [pc, #216] ; 8214 <uart_init+0xe4>
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8138: e3a01001 mov r1, #1
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813c: ebffffb2 bl 800c <PUT32>
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8140: e59f00d0 ldr r0, [pc, #208] ; 8218 <uart_init+0xe8>
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8144: e3a01000 mov r1, #0
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8148: ebffffaf bl 800c <PUT32>
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814c: e59f00c8 ldr r0, [pc, #200] ; 821c <uart_init+0xec>
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8150: e3a01000 mov r1, #0
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8154: ebffffac bl 800c <PUT32>
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8158: e59f00c0 ldr r0, [pc, #192] ; 8220 <uart_init+0xf0>
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815c: e3a01003 mov r1, #3
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8160: ebffffa9 bl 800c <PUT32>
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8164: e59f00b8 ldr r0, [pc, #184] ; 8224 <uart_init+0xf4>
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8168: e3a01000 mov r1, #0
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816c: ebffffa6 bl 800c <PUT32>
|
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8170: e59f00a0 ldr r0, [pc, #160] ; 8218 <uart_init+0xe8>
|
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8174: e3a01000 mov r1, #0
|
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8178: ebffffa3 bl 800c <PUT32>
|
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817c: e59f00a4 ldr r0, [pc, #164] ; 8228 <uart_init+0xf8>
|
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8180: e3a010c6 mov r1, #198 ; 0xc6
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8184: ebffffa0 bl 800c <PUT32>
|
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8188: e59f109c ldr r1, [pc, #156] ; 822c <uart_init+0xfc>
|
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818c: e59f009c ldr r0, [pc, #156] ; 8230 <uart_init+0x100>
|
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8190: ebffff9d bl 800c <PUT32>
|
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8194: e59f0098 ldr r0, [pc, #152] ; 8234 <uart_init+0x104>
|
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8198: ebffffa1 bl 8024 <GET32>
|
||||
819c: e3c01a3f bic r1, r0, #258048 ; 0x3f000
|
||||
81a0: e3811a12 orr r1, r1, #73728 ; 0x12000
|
||||
81a4: e59f0088 ldr r0, [pc, #136] ; 8234 <uart_init+0x104>
|
||||
81a8: ebffff97 bl 800c <PUT32>
|
||||
81ac: e59f0084 ldr r0, [pc, #132] ; 8238 <uart_init+0x108>
|
||||
81b0: e3a01000 mov r1, #0
|
||||
81b4: ebffff94 bl 800c <PUT32>
|
||||
81b8: e3a04000 mov r4, #0
|
||||
81bc: e1a00004 mov r0, r4
|
||||
81c0: e2844001 add r4, r4, #1
|
||||
81c4: ebffff9b bl 8038 <dummy>
|
||||
81c8: e3540096 cmp r4, #150 ; 0x96
|
||||
81cc: 1afffffa bne 81bc <uart_init+0x8c>
|
||||
81d0: e59f0064 ldr r0, [pc, #100] ; 823c <uart_init+0x10c>
|
||||
81d4: e3a01903 mov r1, #49152 ; 0xc000
|
||||
81d8: ebffff8b bl 800c <PUT32>
|
||||
81dc: e3a04000 mov r4, #0
|
||||
81e0: e1a00004 mov r0, r4
|
||||
81e4: e2844001 add r4, r4, #1
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||||
81e8: ebffff92 bl 8038 <dummy>
|
||||
81ec: e3540096 cmp r4, #150 ; 0x96
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||||
81f0: 1afffffa bne 81e0 <uart_init+0xb0>
|
||||
81f4: e59f0040 ldr r0, [pc, #64] ; 823c <uart_init+0x10c>
|
||||
81f8: e3a01000 mov r1, #0
|
||||
81fc: ebffff82 bl 800c <PUT32>
|
||||
8200: e59f0014 ldr r0, [pc, #20] ; 821c <uart_init+0xec>
|
||||
8204: e3a01003 mov r1, #3
|
||||
8208: ebffff7f bl 800c <PUT32>
|
||||
820c: e8bd4010 pop {r4, lr}
|
||||
8210: e12fff1e bx lr
|
||||
8214: 20215004 eorcs r5, r1, r4
|
||||
8218: 20215044 eorcs r5, r1, r4, asr #32
|
||||
821c: 20215060 eorcs r5, r1, r0, rrx
|
||||
8220: 2021504c eorcs r5, r1, ip, asr #32
|
||||
8224: 20215050 eorcs r5, r1, r0, asr r0
|
||||
8228: 20215048 eorcs r5, r1, r8, asr #32
|
||||
822c: 0000010e andeq r0, r0, lr, lsl #2
|
||||
8230: 20215068 eorcs r5, r1, r8, rrx
|
||||
8234: 20200004 eorcs r0, r0, r4
|
||||
8238: 20200094 mlacs r0, r4, r0, r0
|
||||
823c: 20200098 mlacs r0, r8, r0, r0
|
||||
|
||||
00008240 <timer_init>:
|
||||
8240: e92d4010 push {r4, lr}
|
||||
8244: e59f401c ldr r4, [pc, #28] ; 8268 <timer_init+0x28>
|
||||
8248: e3a018f9 mov r1, #16318464 ; 0xf90000
|
||||
824c: e1a00004 mov r0, r4
|
||||
8250: ebffff6d bl 800c <PUT32>
|
||||
8254: e1a00004 mov r0, r4
|
||||
8258: e59f100c ldr r1, [pc, #12] ; 826c <timer_init+0x2c>
|
||||
825c: ebffff6a bl 800c <PUT32>
|
||||
8260: e8bd4010 pop {r4, lr}
|
||||
8264: e12fff1e bx lr
|
||||
8268: 2000b408 andcs fp, r0, r8, lsl #8
|
||||
826c: 00f90200 rscseq r0, r9, r0, lsl #4
|
||||
|
||||
00008270 <timer_tick>:
|
||||
8270: e92d4008 push {r3, lr}
|
||||
8274: e59f0008 ldr r0, [pc, #8] ; 8284 <timer_tick+0x14>
|
||||
8278: ebffff69 bl 8024 <GET32>
|
||||
827c: e8bd4008 pop {r3, lr}
|
||||
8280: e12fff1e bx lr
|
||||
8284: 2000b420 andcs fp, r0, r0, lsr #8
|
||||
|
||||
00008288 <notmain>:
|
||||
8288: e92d4070 push {r4, r5, r6, lr}
|
||||
828c: e1a04000 mov r4, r0
|
||||
8290: e1a05002 mov r5, r2
|
||||
8294: e1a06001 mov r6, r1
|
||||
8298: ebffffa4 bl 8130 <uart_init>
|
||||
829c: e1a00004 mov r0, r4
|
||||
82a0: ebffff9b bl 8114 <hexstring>
|
||||
82a4: e1a00006 mov r0, r6
|
||||
82a8: ebffff99 bl 8114 <hexstring>
|
||||
82ac: e1a00005 mov r0, r5
|
||||
82b0: ebffff97 bl 8114 <hexstring>
|
||||
82b4: e3550000 cmp r5, #0
|
||||
82b8: 0a000007 beq 82dc <notmain+0x54>
|
||||
82bc: e2154003 ands r4, r5, #3
|
||||
82c0: 1a000005 bne 82dc <notmain+0x54>
|
||||
82c4: e0850104 add r0, r5, r4, lsl #2
|
||||
82c8: ebffff55 bl 8024 <GET32>
|
||||
82cc: e2844001 add r4, r4, #1
|
||||
82d0: ebffff8f bl 8114 <hexstring>
|
||||
82d4: e3540005 cmp r4, #5
|
||||
82d8: 1afffff9 bne 82c4 <notmain+0x3c>
|
||||
82dc: e3a00000 mov r0, #0
|
||||
82e0: e8bd4070 pop {r4, r5, r6, lr}
|
||||
82e4: e12fff1e bx lr
|
||||
|
||||
Disassembly of section .bss:
|
||||
|
||||
000082e8 <xstring>:
|
||||
...
|
||||
|
||||
Disassembly of section .ARM.attributes:
|
||||
|
||||
00000000 <.ARM.attributes>:
|
||||
0: 00002c41 andeq r2, r0, r1, asr #24
|
||||
4: 61656100 cmnvs r5, r0, lsl #2
|
||||
8: 01006962 tsteq r0, r2, ror #18
|
||||
c: 00000022 andeq r0, r0, r2, lsr #32
|
||||
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
|
||||
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0x620
|
||||
18: 08020600 stmdaeq r2, {r9, sl}
|
||||
1c: 12010901 andne r0, r1, #16384 ; 0x4000
|
||||
20: 15011404 strne r1, [r1, #-1028] ; 0x404
|
||||
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
|
||||
28: 2c011a01 stccs 10, cr1, [r1], {1}
|
||||
2c: Address 0x000000000000002c is out of bounds.
|
||||
|
||||
|
||||
Disassembly of section .comment:
|
||||
|
||||
00000000 <.comment>:
|
||||
0: 3a434347 bcc 10d0d24 <xstring+0x10c8a3c>
|
||||
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
|
||||
8: 34202955 strtcc r2, [r0], #-2389 ; 0x955
|
||||
c: 312e372e teqcc lr, lr, lsr #14
|
||||
...
|
||||
BIN
atags/atags.o
Normal file
BIN
atags/atags.o
Normal file
Binary file not shown.
BIN
atags/kernel.img
Executable file
BIN
atags/kernel.img
Executable file
Binary file not shown.
12
atags/memmap
Normal file
12
atags/memmap
Normal file
@@ -0,0 +1,12 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0x8000, LENGTH = 0x1000
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text : { *(.text*) } > ram
|
||||
.bss : { *(.bss*) } > ram
|
||||
}
|
||||
|
||||
145
atags/periph.c
Normal file
145
atags/periph.c
Normal file
@@ -0,0 +1,145 @@
|
||||
|
||||
//-------------------------------------------------------------------------
|
||||
//-------------------------------------------------------------------------
|
||||
|
||||
extern void PUT32 ( unsigned int, unsigned int );
|
||||
extern void PUT16 ( unsigned int, unsigned int );
|
||||
extern void PUT8 ( unsigned int, unsigned int );
|
||||
extern unsigned int GET32 ( unsigned int );
|
||||
extern void BRANCHTO ( unsigned int );
|
||||
extern void dummy ( unsigned int );
|
||||
|
||||
#define ARM_TIMER_CTL 0x2000B408
|
||||
#define ARM_TIMER_CNT 0x2000B420
|
||||
|
||||
#define GPFSEL1 0x20200004
|
||||
#define GPSET0 0x2020001C
|
||||
#define GPCLR0 0x20200028
|
||||
#define GPPUD 0x20200094
|
||||
#define GPPUDCLK0 0x20200098
|
||||
|
||||
#define AUX_ENABLES 0x20215004
|
||||
#define AUX_MU_IO_REG 0x20215040
|
||||
#define AUX_MU_IER_REG 0x20215044
|
||||
#define AUX_MU_IIR_REG 0x20215048
|
||||
#define AUX_MU_LCR_REG 0x2021504C
|
||||
#define AUX_MU_MCR_REG 0x20215050
|
||||
#define AUX_MU_LSR_REG 0x20215054
|
||||
#define AUX_MU_MSR_REG 0x20215058
|
||||
#define AUX_MU_SCRATCH 0x2021505C
|
||||
#define AUX_MU_CNTL_REG 0x20215060
|
||||
#define AUX_MU_STAT_REG 0x20215064
|
||||
#define AUX_MU_BAUD_REG 0x20215068
|
||||
|
||||
//GPIO14 TXD0 and TXD1
|
||||
//GPIO15 RXD0 and RXD1
|
||||
//------------------------------------------------------------------------
|
||||
unsigned int uart_lcr ( void )
|
||||
{
|
||||
return(GET32(AUX_MU_LSR_REG));
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
unsigned int uart_recv ( void )
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
if(GET32(AUX_MU_LSR_REG)&0x01) break;
|
||||
}
|
||||
return(GET32(AUX_MU_IO_REG)&0xFF);
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
void uart_send ( unsigned int c )
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
if(GET32(AUX_MU_LSR_REG)&0x20) break;
|
||||
}
|
||||
PUT32(AUX_MU_IO_REG,c);
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
void uart_flush ( void )
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
|
||||
}
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
void hexstrings ( unsigned int d )
|
||||
{
|
||||
//unsigned int ra;
|
||||
unsigned int rb;
|
||||
unsigned int rc;
|
||||
|
||||
rb=32;
|
||||
while(1)
|
||||
{
|
||||
rb-=4;
|
||||
rc=(d>>rb)&0xF;
|
||||
if(rc>9) rc+=0x37; else rc+=0x30;
|
||||
uart_send(rc);
|
||||
if(rb==0) break;
|
||||
}
|
||||
uart_send(0x20);
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
void hexstring ( unsigned int d )
|
||||
{
|
||||
hexstrings(d);
|
||||
uart_send(0x0D);
|
||||
uart_send(0x0A);
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
void uart_init ( void )
|
||||
{
|
||||
unsigned int ra;
|
||||
|
||||
PUT32(AUX_ENABLES,1);
|
||||
PUT32(AUX_MU_IER_REG,0);
|
||||
PUT32(AUX_MU_CNTL_REG,0);
|
||||
PUT32(AUX_MU_LCR_REG,3);
|
||||
PUT32(AUX_MU_MCR_REG,0);
|
||||
PUT32(AUX_MU_IER_REG,0);
|
||||
PUT32(AUX_MU_IIR_REG,0xC6);
|
||||
PUT32(AUX_MU_BAUD_REG,270);
|
||||
ra=GET32(GPFSEL1);
|
||||
ra&=~(7<<12); //gpio14
|
||||
ra|=2<<12; //alt5
|
||||
ra&=~(7<<15); //gpio15
|
||||
ra|=2<<15; //alt5
|
||||
PUT32(GPFSEL1,ra);
|
||||
PUT32(GPPUD,0);
|
||||
for(ra=0;ra<150;ra++) dummy(ra);
|
||||
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
|
||||
for(ra=0;ra<150;ra++) dummy(ra);
|
||||
PUT32(GPPUDCLK0,0);
|
||||
PUT32(AUX_MU_CNTL_REG,3);
|
||||
}
|
||||
//------------------------------------------------------------------------
|
||||
void timer_init ( void )
|
||||
{
|
||||
//0xF9+1 = 250
|
||||
//250MHz/250 = 1MHz
|
||||
PUT32(ARM_TIMER_CTL,0x00F90000);
|
||||
PUT32(ARM_TIMER_CTL,0x00F90200);
|
||||
}
|
||||
//-------------------------------------------------------------------------
|
||||
unsigned int timer_tick ( void )
|
||||
{
|
||||
return(GET32(ARM_TIMER_CNT));
|
||||
}
|
||||
//-------------------------------------------------------------------------
|
||||
//-------------------------------------------------------------------------
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2012 David Welch dwelch@dwelch.com
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
//
|
||||
//-------------------------------------------------------------------------
|
||||
BIN
atags/periph.o
Normal file
BIN
atags/periph.o
Normal file
Binary file not shown.
BIN
atags/vectors.o
Normal file
BIN
atags/vectors.o
Normal file
Binary file not shown.
59
atags/vectors.s
Normal file
59
atags/vectors.s
Normal file
@@ -0,0 +1,59 @@
|
||||
|
||||
;@-------------------------------------------------------------------------
|
||||
;@-------------------------------------------------------------------------
|
||||
|
||||
.globl _start
|
||||
_start:
|
||||
mov sp,#0x8000
|
||||
bl notmain
|
||||
hang: b hang
|
||||
|
||||
.globl PUT32
|
||||
PUT32:
|
||||
str r1,[r0]
|
||||
bx lr
|
||||
|
||||
.globl PUT16
|
||||
PUT16:
|
||||
strh r1,[r0]
|
||||
bx lr
|
||||
|
||||
.globl PUT8
|
||||
PUT8:
|
||||
strb r1,[r0]
|
||||
bx lr
|
||||
|
||||
.globl GET32
|
||||
GET32:
|
||||
ldr r0,[r0]
|
||||
bx lr
|
||||
|
||||
.globl GETPC
|
||||
GETPC:
|
||||
mov r0,lr
|
||||
bx lr
|
||||
|
||||
.globl BRANCHTO
|
||||
BRANCHTO:
|
||||
bx r0
|
||||
|
||||
.globl dummy
|
||||
dummy:
|
||||
bx lr
|
||||
|
||||
|
||||
;@-------------------------------------------------------------------------
|
||||
;@-------------------------------------------------------------------------
|
||||
|
||||
|
||||
;@-------------------------------------------------------------------------
|
||||
;@
|
||||
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
|
||||
;@
|
||||
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
;@
|
||||
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
;@
|
||||
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
;@
|
||||
;@-------------------------------------------------------------------------
|
||||
Reference in New Issue
Block a user