first cut at rpi2 arm jtag
This commit is contained in:
dwelch
32
armjtag/rpi2/Makefile
Normal file
32
armjtag/rpi2/Makefile
Normal file
@@ -0,0 +1,32 @@
|
||||
|
||||
ARMGNU ?= arm-none-eabi
|
||||
|
||||
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
|
||||
|
||||
all : armjtag.hex armjtag.bin
|
||||
|
||||
clean :
|
||||
rm -f *.o
|
||||
rm -f *.bin
|
||||
rm -f *.hex
|
||||
rm -f *.elf
|
||||
rm -f *.list
|
||||
rm -f *.img
|
||||
|
||||
vectors.o : vectors.s
|
||||
$(ARMGNU)-as vectors.s -o vectors.o
|
||||
|
||||
armjtag.o : armjtag.c
|
||||
$(ARMGNU)-gcc $(COPS) -c armjtag.c -o armjtag.o
|
||||
|
||||
armjtag.elf : memmap vectors.o armjtag.o
|
||||
$(ARMGNU)-ld vectors.o armjtag.o -T memmap -o armjtag.elf
|
||||
$(ARMGNU)-objdump -D armjtag.elf > armjtag.list
|
||||
|
||||
armjtag.bin : armjtag.elf
|
||||
$(ARMGNU)-objcopy armjtag.elf -O binary armjtag.bin
|
||||
|
||||
armjtag.hex : armjtag.elf
|
||||
$(ARMGNU)-objcopy armjtag.elf -O ihex armjtag.hex
|
||||
|
||||
|
||||
529
armjtag/rpi2/README
Normal file
529
armjtag/rpi2/README
Normal file
@@ -0,0 +1,529 @@
|
||||
|
||||
|
||||
First cut at the raspberry pi 2, close but I dont think quite there yet
|
||||
|
||||
pinout is all the same, the raspberry pi 2 base address for things
|
||||
is 0x3F000000 instead of 0x20000000 in theory all the rest is the
|
||||
same other than the exact arm core.
|
||||
|
||||
bcmrpi2.cfg is taken from openocds bcm281xx.cfg and modified a little
|
||||
|
||||
it will connect
|
||||
|
||||
openocd -f amontec.cfg -f bcmrpi2.cfg
|
||||
Open On-Chip Debugger 0.9.0-dev-hgb13d8a0d2adf-dirty (2014-12-10-15:33)
|
||||
Licensed under GNU GPL v2
|
||||
For bug reports, read
|
||||
http://openocd.sourceforge.net/doc/doxygen/bugs.html
|
||||
Info : only one transport option; autoselect 'jtag'
|
||||
adapter speed: 1000 kHz
|
||||
Warn : Using DEPRECATED interface driver 'ft2232'
|
||||
Info : Consider using the 'ftdi' interface driver, with configuration files in interface/ftdi/...
|
||||
Info : clock speed 1000 kHz
|
||||
Info : JTAG tap: bcmrpi2.dap tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
|
||||
Info : bcmrpi2.cpu0: hardware has 6 breakpoints, 4 watchpoints
|
||||
Info : bcmrpi2.cpu1: hardware has 6 breakpoints, 4 watchpoints
|
||||
Info : bcmrpi2.cpu2: hardware has 6 breakpoints, 4 watchpoints
|
||||
Info : bcmrpi2.cpu3: hardware has 6 breakpoints, 4 watchpoints
|
||||
|
||||
|
||||
|
||||
telnet localhost 4444
|
||||
Trying 127.0.0.1...
|
||||
Connected to localhost.
|
||||
Escape character is '^]'.
|
||||
Open On-Chip Debugger
|
||||
> targets
|
||||
TargetName Type Endian TapName State
|
||||
-- ------------------ ---------- ------ ------------------ ------------
|
||||
0 bcmrpi2.cpu0 cortex_a little bcmrpi2.dap running
|
||||
1 bcmrpi2.cpu1 cortex_a little bcmrpi2.dap running
|
||||
2 bcmrpi2.cpu2 cortex_a little bcmrpi2.dap running
|
||||
3* bcmrpi2.cpu3 cortex_a little bcmrpi2.dap running
|
||||
>
|
||||
|
||||
and then this is either stuff I dont know yet or not quite configured
|
||||
right
|
||||
|
||||
>halt
|
||||
Timeout waiting for read dcc
|
||||
Timeout waiting for read dcc
|
||||
in procedure 'halt'
|
||||
> targets
|
||||
TargetName Type Endian TapName State
|
||||
-- ------------------ ---------- ------ ------------------ ------------
|
||||
0 bcmrpi2.cpu0 cortex_a little bcmrpi2.dap running
|
||||
1 bcmrpi2.cpu1 cortex_a little bcmrpi2.dap running
|
||||
2 bcmrpi2.cpu2 cortex_a little bcmrpi2.dap running
|
||||
3* bcmrpi2.cpu3 cortex_a little bcmrpi2.dap halted
|
||||
>
|
||||
|
||||
so it did halt it but need to figure out the Timeout
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
See the top level README for information on where to find the
|
||||
schematic and programmers reference manual for the ARM processor
|
||||
on the raspberry pi. Also find information on how to load and run
|
||||
these programs.
|
||||
|
||||
This example is an alternate bootloader basically. The ARM11 on the
|
||||
Raspberry Pi has a jtag based debug port for software development.
|
||||
Problem is the pins are not by default connected to the outside world
|
||||
so you cant for example reset the ARM as that would disconnect the
|
||||
jtag. (there is no SRST available)
|
||||
|
||||
On the older rev1 boards, all but one signal is available on P1,
|
||||
unfortunately that other signal is on the S5 connector. I was able to
|
||||
solder a wire onto it.
|
||||
|
||||
The rev2 boards, no soldering is required.
|
||||
|
||||
I use jumper wires like these to get from my jtag board/device to the
|
||||
raspberry pi.
|
||||
|
||||
http://www.sparkfun.com/products/9140
|
||||
http://www.sparkfun.com/products/9385
|
||||
|
||||
The signal name, gpio pins, schematic name, connector pin
|
||||
and direction shown here. When looking into the holes of an arm
|
||||
20 pin (female) jtag connector. There should be a key or bit of plastic
|
||||
almost two holes wide on one side. With that key pointed up, looking
|
||||
into the holes pin one is the top left corner. The arm jtag names
|
||||
on the left of this list start with pin 1 and go along that side of
|
||||
the connector in order. For ground use any one of the holes on the
|
||||
other side except the lower left, pin 2, that is not a ground.
|
||||
|
||||
See this page as an example
|
||||
http://www.amontec.com/jtag_pinout.shtml
|
||||
|
||||
|
||||
rev1 raspberry pi boards (older boards)
|
||||
|
||||
1 ARM_VREF P1-1
|
||||
2 ARM_TRST 22 GPIO_GEN3 P1-15 IN (22 ALT4)
|
||||
3 ARM_TDI 4/26 GPIO_GCLK P1-7 IN ( 4 ALT5)
|
||||
4 ARM_TMS 12/27 CAM_GPIO S5-11 OUT (27 ALT4)
|
||||
5 ARM_TCK 13/25 GPIO_GEN6 P1-22 OUT (25 ALT4)
|
||||
7 no connect
|
||||
9 ARM_TDO 5/24 GPIO_GEN5 P1-18 OUT (24 ALT4)
|
||||
|
||||
4-20 ARM_GND P1-25
|
||||
|
||||
|
||||
rev2 raspberry pi boards
|
||||
|
||||
1 ARM_VREF P1-1
|
||||
2 ARM_TRST 22 GPIO_GEN3 P1-15 IN (22 ALT4)
|
||||
3 ARM_TDI 4/26 GPIO_GCLK P1-7 IN ( 4 ALT5)
|
||||
4 ARM_TMS 12/27 CAM_GPIO P1-13 OUT (27 ALT4)
|
||||
5 ARM_TCK 13/25 GPIO_GEN6 P1-22 OUT (25 ALT4)
|
||||
7 no connect
|
||||
9 ARM_TDO 5/24 GPIO_GEN5 P1-18 OUT (24 ALT4)
|
||||
|
||||
4-20 ARM_GND P1-25
|
||||
|
||||
|
||||
In parenthesis is the gpio pin used and the alternate function setting
|
||||
needed in the GPIO to connect it to the edge of the BCM chip.
|
||||
|
||||
armjtag.c does just that, first it disables pull up or pull down on the
|
||||
gpio pins in question. Then it configures the alternate gpio functions
|
||||
for the pins in question.
|
||||
|
||||
armjtag.c also configures gpio16 to drive the OK led and sets up a
|
||||
timer so that after configuring it blinks an led every 2 seconds.
|
||||
|
||||
(copy armjtag.bin to kernel.img on the raspbery pi sd card and power
|
||||
the raspberry pi, verify it is right from the blinking led).
|
||||
|
||||
fastblink.c is a test program that we will load using jtag, but first.
|
||||
|
||||
To do all of this you are going to need a jtag debugger card/board/box.
|
||||
Not long ago that meant forking out a few grand, or making something
|
||||
with a parallel port (what is a parallel port you ask?). The one I
|
||||
use day in and day out is this one:
|
||||
|
||||
http://www.amontec.com/jtagkey-tiny.shtml
|
||||
|
||||
Problem is the shipping to the USA makes it not worth it unless you buy
|
||||
a bunch or have your boss buy it. If you are not in the USA then it
|
||||
might be cheaper shipping and definitely worth it...
|
||||
|
||||
The jtagkey-tiny and a great number of other usb to jtag boards or
|
||||
microcontroller or fpga or cpld boards that include a usb jtag programmer
|
||||
on the board use some flavor of the FT2232 from Future Technology
|
||||
Devices International (FTDI). http://www.ftdichip.com. They have
|
||||
an array of usb to _blank_ devices. Usb to serial, usb to spi, i2c,
|
||||
jtag, parallel. Some devices have what they call Multi-Protocol
|
||||
Synchronous Serial Engine (MPSSE). What we care about here is it can
|
||||
be used to accelerate jtag beyond simple bit banging. Openocd has long
|
||||
had FT2232 support. Dont do what I did and confuse the FT232 with the
|
||||
FT2232, the FT232 does not have an MPSSE so you have to do just slow
|
||||
bit banging (which I talk about below).
|
||||
|
||||
The FT2232 has two of these MPSSEs so you can use the part as two
|
||||
uarts or one uart one jtag, two jtags, one uart one spi, etc. They also
|
||||
have an FT4232, which has four uarts, but DOES NOT have four MPSSEs it
|
||||
still only has two MPSSEs. So you can have three uarts and one jtag
|
||||
and so on.
|
||||
|
||||
Some boards have come and gone, unfortunately for example the
|
||||
signalyzer-lite is no longer available.
|
||||
|
||||
You can get the flyswatter though which is yet another ft2232 board.
|
||||
|
||||
http://www.tincantools.com/JTAG/Flyswatter.html
|
||||
|
||||
And the jtag side is basically the same as the amontec. The flyswatter
|
||||
breaks out the uart, but we cant use it with the raspberry pi because
|
||||
it is at RS232 levels and if you were to connect it to the raspberry
|
||||
pi you will likely damage one board or the other or both.
|
||||
|
||||
If you look around the openocd source code or schematics, etc the MPSSE
|
||||
deals with TCK, TMS, TDI, and TDO. TRST, SRST if there are supported
|
||||
by the other pins which are generic bit bang GPIO in this mode. The
|
||||
various board vendors naturally have other features beyond that.
|
||||
|
||||
So I dont know how long these have been out but I was very happy to see
|
||||
that FTDI now has a couple of development boards one for the FT2232H
|
||||
and one for the FT4232H. These boards are under $30, and I have
|
||||
successfully used one with the Raspberry Pi, the bonus is you can use
|
||||
both the JTAG and Serial, one board and you get both. Even better the
|
||||
FT2232H/FT4232H supports jtag up to 30Mbps, where the prior incarnations
|
||||
of the FT2232 went to 6Mbps, so in theory we can compete speed-wise with
|
||||
the multi-thousand dollar boxes. Even at 6Mbps you can easily push the
|
||||
I/O or other speed limits in your target, so just because your jtag
|
||||
debugger device might go fast, doesnt mean you can always run that
|
||||
fast you either need to ask the (target) chip vendor or do some
|
||||
experiments.
|
||||
|
||||
If you go to
|
||||
|
||||
http://www.mouser.com
|
||||
|
||||
And search for either of these part numbers
|
||||
|
||||
895-FT2232HMINIMOD
|
||||
895-FT4232HMINIMOD
|
||||
|
||||
You will find the FTDI development boards I am talking about. You can
|
||||
also get them from other distributors around the world. I assume anyone
|
||||
that sells FTDI parts might also sell FTDI boards.
|
||||
|
||||
|
||||
|
||||
FT2232H Mini Module:
|
||||
|
||||
TODO when I get one, I assume it is very very similar if not the same
|
||||
as the FT4232H below, the pinout should be the same I am using the A
|
||||
and B sections of the chip so those match, the board pinouts may or
|
||||
may not match the FT4232H board. Not hard to figure out from the
|
||||
FTDI documents though.
|
||||
|
||||
|
||||
|
||||
FT4232H Mini Module:
|
||||
|
||||
Searching for this you get the datasheet for the development board. You
|
||||
dont necessarily NEED this as I will show you what to connect, but it
|
||||
is probably a good idea for your own education to look at it, it is a
|
||||
fairly short document. And may help to see the pinout which you will
|
||||
need to get right if you want to hook this up.
|
||||
|
||||
http://www.ftdichip.com/Documents/DataSheets/Modules/DS_FT4232H_Mini_Module.pdf
|
||||
|
||||
Googling for the FT4232H part you get its webpage
|
||||
|
||||
http://www.ftdichip.com/Products/ICs/FT4232H.htm
|
||||
|
||||
Where you can download the datasheet. The part we care about there is
|
||||
the pinout per function AD0 is TCK for JTAG, AD1 is TDI and so on.
|
||||
|
||||
I spent some time fiddling with the FT_PROG utility thinking I was going
|
||||
to need to reconfigure something. I also messed with the ftdi_eeprom
|
||||
and eeprom tools from libftdi, to find that they work just fine on
|
||||
linux (not obvious at all on HOW to get them working) but we dont need
|
||||
them. When openocd fires up and grabs the A bus for jtag linux
|
||||
gives up on that being a uart.
|
||||
|
||||
[1275978.391156] ftdi_sio ttyUSB1: FTDI USB Serial Device converter now disconnected from ttyUSB1
|
||||
[1275978.391164] ftdi_sio 3-2:1.0: device disconnected
|
||||
|
||||
They wisely used the same pin for uart and jtag output (D0) and the
|
||||
same pin for input (D1) so for the period of time that the FTDI part
|
||||
is thinking it is a uart, you wont hurt the jtag on your board (in
|
||||
theory, I should have already had a disclaimer that you are on
|
||||
your own, I wont be responsible for you melting down your board
|
||||
trying this stuff).
|
||||
|
||||
This part is such that you can power the usb from the usb host side
|
||||
or the device side, and if you dont do anything the part isnt powered
|
||||
so as it says in the develompent board datasheet.
|
||||
|
||||
Connect VBUS to VCC (CN3, pin 1 to CN3, pin 3)
|
||||
|
||||
Likewise I connected CN2 pin 2 to CN2 pin 11 to Connect V3V3 to VIO,
|
||||
depending on the power needed you may need to connect more of the
|
||||
3.3 volt pins to more of the VCCIO pins. I have been successful with
|
||||
just this one connection.
|
||||
|
||||
Now when you plug in the mini module it will show up in lsusb and
|
||||
demesg will show the four uarts.
|
||||
|
||||
Uart first I have already walked through other usb to uart
|
||||
connections. The P1 connector on the raspberry pi is the 2 rows of 13
|
||||
pins along one side starting at a corner. The outer corner pin is
|
||||
numbered pin 2. The pin next to it as you move toward the micro-b
|
||||
usb connector that powers the raspberry pi, is pin 1. The pins along
|
||||
the outer edge of the board (other than pin 1) are the even numbered
|
||||
the row inside that are the odd numbered. So the outside starting
|
||||
at the corner heading toward the yellow rca (composite video) are
|
||||
pins 2,4,6,8,10, up to pin 26. The inner pins are 1,3,5,7,11 up to
|
||||
25. This is a very common numbering scheme for dual row headers. You
|
||||
just have to figure out which one is pin one and you are set from there.
|
||||
If you look on the back of the board, the sd card side of the raspberry
|
||||
pi, the hole where the pin is soldered on is square, the rest are
|
||||
round. This is very common with these kind of through hole connectors
|
||||
to make the hole for pin 1 square and/or different than the others (just
|
||||
FYI).
|
||||
|
||||
So the raspberry pi side of the uart/serial connection is
|
||||
|
||||
2 outer corner
|
||||
4
|
||||
6 GND
|
||||
8 TX out
|
||||
10 RX in
|
||||
|
||||
The FT4232H Mini Module side, we want to use BD0 and BD1 which are pins
|
||||
CN2-18 and CN2-17. With the board oriented so the pins are pointing
|
||||
away from you and the mini-b usb connector on the top and pointed
|
||||
left. The top connector is CN3 and bottom CN2. The lower right pin
|
||||
is 25, the one to the left of that 23 and so on. You can count backward
|
||||
from there to find CN2-17
|
||||
|
||||
17 BD1 RXD in
|
||||
19
|
||||
21
|
||||
23
|
||||
25 lower right corner
|
||||
|
||||
So P1-8 TX out on the rasberry pi connects to CN2-17 RXD on the FT4232H
|
||||
board.
|
||||
|
||||
The pin next to that on the FT board (or above it if still holding it
|
||||
in that orientation is pin 18
|
||||
|
||||
18 BD0 TXD out
|
||||
20
|
||||
22
|
||||
24
|
||||
26 inside and next to lower right
|
||||
|
||||
That connects to P1-10 on the raspberry pi.
|
||||
|
||||
The lower left corner of the FT board is CN2-1 which we are using to
|
||||
power VCCIO. Above that toward the usb connector is CN2-2 a ground
|
||||
you can connect that to ground on the raspberry pi which is P1-6
|
||||
|
||||
If all you want is uart, there you go. To add jtag then:
|
||||
|
||||
JTAG: (FT board left, Raspi right)
|
||||
TCK: CN2-7 P1-22
|
||||
TDI: CN2-10 P1-7
|
||||
TDO: CN2-9 P1-18
|
||||
TMS: CN2-12 P1-13
|
||||
UART:
|
||||
TXRX: CN2-18 P1-10
|
||||
RXTX: CN2-17 P1-8
|
||||
Ground:
|
||||
GND: CN2-2 P1-6
|
||||
Raspi to Raspi:
|
||||
TRST: P1-1 P1-15
|
||||
FTDI board to FTDI board:
|
||||
VCCIO: CN2-1 CN2-11
|
||||
VCC: CN3-1 CN3-3
|
||||
|
||||
That is for a rev2 Raspberry Pi board, for a rev1 use S5-11 instead of
|
||||
P1-13 (some soldering or cable hacking required).
|
||||
|
||||
Lastly when you connect your FT4232H board to your computer dmesg will
|
||||
show the four uarts (/dev/ttyUSBx) the first one on the list will go
|
||||
away when we take it over to do jtag, the second one listed will be
|
||||
the one you use for uart/serial communications to the raspberry pi.
|
||||
|
||||
|
||||
|
||||
|
||||
Other alternatives, it doesnt take too much work to use the ftdi drivers
|
||||
to bit bang a board like this.
|
||||
|
||||
http://www.sparkfun.com/products/718
|
||||
|
||||
Openocd has drivers for this you just make the (software) connectin
|
||||
between the bits that openocd wants you to drive or read and the gpio
|
||||
pins on the ftdi part. This is pretty slow but functions as a sub
|
||||
$20 jtag.
|
||||
|
||||
For a little more money you can approach the more expensive solutions
|
||||
speed and perhaps features so long as you can declare your work
|
||||
educational. The educational version of the jlink is around $60, and
|
||||
it is pretty speedy. The non-educational version is I assume the same
|
||||
functionality if not the same, but more expensive.
|
||||
|
||||
http://microcontrollershop.com/product_info.php?cPath=154_171&products_id=3647
|
||||
|
||||
The title of the page says ARM7/ARM9, the description includes ARM11, I
|
||||
have used it on an ARM11 (not the raspi yet).
|
||||
|
||||
And the jlink works with openocd and is fast with openocd. You can also
|
||||
use their proprietary software.
|
||||
|
||||
The software you want is
|
||||
|
||||
http://openocd.sourceforge.net/
|
||||
|
||||
Now, I normally download the source, and build specifically with ftdi
|
||||
drivers enabled. And this is on linux. You might have to do it that
|
||||
way, I want to remember that you may have to pick some things at compile
|
||||
time. Try it out see what happens, maybe one size fits all, maybe on
|
||||
windows it is different than linux.
|
||||
|
||||
Openocd (sources) come with a number of configuration files, just like
|
||||
my boot code and linker script I like to carry my openocd configs with
|
||||
the project. I have provided the jtag debugger files for the ones
|
||||
mentioned and then a file for the ARM itself. If you are running with
|
||||
the amontec you would run:
|
||||
|
||||
openocd -f amontec.cfg -f raspi.cfg
|
||||
|
||||
and should see something like this:
|
||||
|
||||
Open On-Chip Debugger 0.5.0 (2011-09-20-21:55)
|
||||
Licensed under GNU GPL v2
|
||||
For bug reports, read
|
||||
http://openocd.berlios.de/doc/doxygen/bugs.html
|
||||
Info : only one transport option; autoselect 'jtag'
|
||||
1000 kHz
|
||||
adapter_nsrst_delay: 400
|
||||
jtag_ntrst_delay: 400
|
||||
none separate
|
||||
raspi.arm
|
||||
Info : clock speed 1000 kHz
|
||||
Info : JTAG tap: raspi.arm tap/device found: 0x07b7617f (mfg: 0x0bf, part: 0x7b76, ver: 0x0)
|
||||
Info : found ARM1176
|
||||
Info : raspi.arm: hardware has 6 breakpoints, 2 watchpoints
|
||||
|
||||
This is a client server type of thing, the openocd program itself is
|
||||
the server. I recommend you are in the directory that contains the
|
||||
programs you want to run when you start openocd. The reason is the
|
||||
binaries are in the same path, you dont have to type a full path
|
||||
to a file. One client is gdb, which you are welcome to use, I have
|
||||
no use for it, can barely spell it. I prefer to telnet into openocd
|
||||
and use openocd's native commands (This is where the path thing comes
|
||||
in).
|
||||
|
||||
With the openocd server running in one terminal/window I telnet to it
|
||||
in another:
|
||||
|
||||
telnet localhost 4444
|
||||
|
||||
and see:
|
||||
|
||||
Trying ::1...
|
||||
Trying 127.0.0.1...
|
||||
Connected to localhost.
|
||||
Escape character is '^]'.
|
||||
Open On-Chip Debugger
|
||||
>
|
||||
|
||||
Be careful here, as the first command you type is halt and if you are
|
||||
root on a normal command line prompt (linux) and type halt it will
|
||||
halt your computer. So dont just type blindly, wait and watch.
|
||||
|
||||
So the first thing you type is halt
|
||||
|
||||
> halt
|
||||
target state: halted
|
||||
target halted in ARM state due to debug-request, current mode: Supervisor
|
||||
cpsr: 0x800001d3 pc: 0x0000007c
|
||||
|
||||
your cpsr and pc might be different.
|
||||
|
||||
Since the armjtag program already set up the led you can manually
|
||||
change the gpio pin now:
|
||||
|
||||
> mww 0x2020001C 0x10000
|
||||
|
||||
and
|
||||
|
||||
> mww 0x20200028 0x10000
|
||||
|
||||
The led should turn on or off depending on which command. Note these
|
||||
are the GPSET0 and GPCLR0 registers, the 0x10000 is bit 16 which is
|
||||
GPIO16 the led register.
|
||||
|
||||
mww means memory write word. mdw is a memory read word
|
||||
|
||||
> mdw 0
|
||||
0x00000000: eaffffff
|
||||
|
||||
Type the help command to see more fun stuff. Be careful, this is a
|
||||
powerful interface you dont want to just poke around at any memory
|
||||
address unless you know what it is...
|
||||
|
||||
Also note that for example if you have left the instruction cache on
|
||||
on the ARM. The ARM cache has some instruction in it probably. The
|
||||
jtag debug port goes directly to memory not through the cache so
|
||||
if you halt the ARM and load another program and run it you can get
|
||||
a mixture of new isntructions and old instructions from the prior
|
||||
program which is probably going to result in a crash. When messing
|
||||
with the mmu or cache, just power cycle the board to try again.
|
||||
|
||||
This directory also contains the fastblink example which is just
|
||||
blinker03 basically. I only built the .elf not the .bin because with
|
||||
openocd I rarely use .bin files. If you use the .elf then openocd can
|
||||
read that file and put the programs in the proper place. For example
|
||||
if you wanted to run from 0x20000 instead of 0 and built your binary
|
||||
to run from that memory address just load the elf and start execution
|
||||
at that address. What the elf saves you most of the time is typing
|
||||
in an address which you already had in the linker script.
|
||||
|
||||
So
|
||||
|
||||
> halt
|
||||
> load_image fastblink.elf
|
||||
216 bytes written at address 0x00000000
|
||||
downloaded 216 bytes in 0.063038s (3.346 KiB/s)
|
||||
> resume 0
|
||||
|
||||
What I tend to do is have yet another terminal open. One for openocd
|
||||
server, one for the telnet client and one to re-build the binary (.elf)
|
||||
file. I type the above three commands (with the appropriate binary
|
||||
file name and resume with the starting address). Then I can quickly
|
||||
|
||||
up, up, up, enter
|
||||
up, up, up, enter
|
||||
up, up, up, enter
|
||||
|
||||
In the telnet window to re-load and re-run a new build of the program.
|
||||
|
||||
If you ctrl-c in the openocd window it kills both openocd and the telnet
|
||||
session. If you power cycle the board without doing this the two windows
|
||||
freak out. I have had them work once the board is back up and jtag is
|
||||
available, but I prefer to stop openocd and start fresh anyway.
|
||||
|
||||
There are other .cfg files in this directory for the different jtag
|
||||
interface boards I have used (signalizer-lite, jlink, ft4232h, amontec).
|
||||
Use the same command line above but replace the appropriate config file
|
||||
|
||||
openocd -f amontec.cfg -f raspi.cfg
|
||||
|
||||
replace amontec.cfg with one of the other files or make your own.
|
||||
|
||||
|
||||
|
||||
|
||||
11
armjtag/rpi2/amontec.cfg
Normal file
11
armjtag/rpi2/amontec.cfg
Normal file
@@ -0,0 +1,11 @@
|
||||
#
|
||||
# Amontec JTAGkey
|
||||
#
|
||||
# http://www.amontec.com/jtagkey.shtml
|
||||
#
|
||||
|
||||
interface ft2232
|
||||
ft2232_device_desc "Amontec JTAGkey"
|
||||
ft2232_layout jtagkey
|
||||
ft2232_vid_pid 0x0403 0xcff8
|
||||
|
||||
BIN
armjtag/rpi2/armjtag.bin
Executable file
BIN
armjtag/rpi2/armjtag.bin
Executable file
Binary file not shown.
111
armjtag/rpi2/armjtag.c
Normal file
111
armjtag/rpi2/armjtag.c
Normal file
@@ -0,0 +1,111 @@
|
||||
|
||||
//-------------------------------------------------------------------------
|
||||
//-------------------------------------------------------------------------
|
||||
|
||||
extern void PUT32 ( unsigned int, unsigned int );
|
||||
extern unsigned int GET32 ( unsigned int );
|
||||
extern void dummy ( unsigned int );
|
||||
|
||||
#define ARM_TIMER_LOD 0x3F00B400
|
||||
#define ARM_TIMER_VAL 0x3F00B404
|
||||
#define ARM_TIMER_CTL 0x3F00B408
|
||||
#define ARM_TIMER_DIV 0x3F00B41C
|
||||
#define ARM_TIMER_CNT 0x3F00B420
|
||||
|
||||
#define SYSTIMERCLO 0x3F003004
|
||||
#define GPFSEL0 0x3F200000
|
||||
#define GPFSEL1 0x3F200004
|
||||
#define GPFSEL2 0x3F200008
|
||||
#define GPSET0 0x3F20001C
|
||||
#define GPCLR0 0x3F200028
|
||||
#define GPPUD 0x3F200094
|
||||
#define GPPUDCLK0 0x3F200098
|
||||
|
||||
#define TIMEOUT 1000000
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------
|
||||
int notmain ( void )
|
||||
{
|
||||
unsigned int ra;
|
||||
unsigned int rb;
|
||||
|
||||
//for led
|
||||
|
||||
//ra=GET32(GPFSEL1);
|
||||
//ra&=~(7<<18); //gpio16 OK LED
|
||||
//ra|=1<<18; //gpio16 output
|
||||
//PUT32(GPFSEL1,ra);
|
||||
|
||||
//for jtag
|
||||
|
||||
//alt4 = 0b011 3
|
||||
//alt5 = 0b010 2
|
||||
|
||||
|
||||
PUT32(GPPUD,0);
|
||||
for(ra=0;ra<150;ra++) dummy(ra);
|
||||
PUT32(GPPUDCLK0,(1<<4)|(1<<22)|(1<<24)|(1<<25)|(1<<27));
|
||||
for(ra=0;ra<150;ra++) dummy(ra);
|
||||
PUT32(GPPUDCLK0,0);
|
||||
|
||||
ra=GET32(GPFSEL0);
|
||||
ra&=~(7<<12); //gpio4
|
||||
ra|=2<<12; //gpio4 alt5 ARM_TDI
|
||||
PUT32(GPFSEL0,ra);
|
||||
|
||||
ra=GET32(GPFSEL2);
|
||||
ra&=~(7<<6); //gpio22
|
||||
ra|=3<<6; //alt4 ARM_TRST
|
||||
ra&=~(7<<12); //gpio24
|
||||
ra|=3<<12; //alt4 ARM_TDO
|
||||
ra&=~(7<<15); //gpio25
|
||||
ra|=3<<15; //alt4 ARM_TCK
|
||||
ra&=~(7<<21); //gpio27
|
||||
ra|=3<<21; //alt4 ARM_TMS
|
||||
PUT32(GPFSEL2,ra);
|
||||
|
||||
//ARM_TRST 22 GPIO_GEN3 P1-15 IN (22 ALT4)
|
||||
//ARM_TDO 5/24 GPIO_GEN5 P1-18 OUT (24 ALT4)
|
||||
//ARM_TCK 13/25 GPIO_GEN6 P1-22 OUT (25 ALT4)
|
||||
//ARM_TDI 4/26 GPIO_GCLK P1-7 IN ( 4 ALT5)
|
||||
//ARM_TMS 12/27 CAM_GPIO S5-11 OUT (27 ALT4)
|
||||
|
||||
PUT32(ARM_TIMER_CTL,0x00F90000);
|
||||
PUT32(ARM_TIMER_CTL,0x00F90200);
|
||||
|
||||
rb=GET32(ARM_TIMER_CNT);
|
||||
while(1)
|
||||
{
|
||||
//PUT32(GPSET0,1<<16);
|
||||
while(1)
|
||||
{
|
||||
ra=GET32(ARM_TIMER_CNT);
|
||||
if((ra-rb)>=TIMEOUT) break;
|
||||
}
|
||||
rb+=TIMEOUT;
|
||||
//PUT32(GPCLR0,1<<16);
|
||||
while(1)
|
||||
{
|
||||
ra=GET32(ARM_TIMER_CNT);
|
||||
if((ra-rb)>=TIMEOUT) break;
|
||||
}
|
||||
rb+=TIMEOUT;
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
//-------------------------------------------------------------------------
|
||||
//-------------------------------------------------------------------------
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2012 David Welch dwelch@dwelch.com
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
//
|
||||
//-------------------------------------------------------------------------
|
||||
BIN
armjtag/rpi2/armjtag.elf
Executable file
BIN
armjtag/rpi2/armjtag.elf
Executable file
Binary file not shown.
22
armjtag/rpi2/armjtag.hex
Normal file
22
armjtag/rpi2/armjtag.hex
Normal file
@@ -0,0 +1,22 @@
|
||||
:1080000002D9A0E3050000EBFEFFFFEA001080E5C7
|
||||
:108010001EFF2FE1000090E51EFF2FE11EFF2FE164
|
||||
:1080200070402DE90010A0E3E4009FE5F6FFFFEBB0
|
||||
:108030000040A0E30400A0E1014084E2F6FFFFEB72
|
||||
:10804000960054E3FAFFFF1AC8109FE5C8009FE5A9
|
||||
:10805000EDFFFFEB0040A0E30400A0E1014084E25B
|
||||
:10806000EDFFFFEB960054E3FAFFFF1A0010A0E3C8
|
||||
:10807000A4009FE5E4FFFFEBA0009FE5E4FFFFEB1A
|
||||
:10808000071AC0E3021A81E390009FE5DEFFFFEBD1
|
||||
:108090008C009FE5DEFFFFEB88309FE588109FE5B1
|
||||
:1080A000003003E0011083E174009FE5D6FFFFEB91
|
||||
:1080B000F918A0E374009FE5D3FFFFEB70109FE574
|
||||
:1080C00068009FE5D0FFFFEB68009FE5D0FFFFEB66
|
||||
:1080D0000050A0E160409FE558009FE5CCFFFFEB1A
|
||||
:1080E000000065E0040050E1FAFFFF9A3D6985E277
|
||||
:1080F000096D86E23C009FE5C5FFFFEB000066E0EE
|
||||
:10810000040050E1FAFFFF9A7A5985E2125D85E298
|
||||
:10811000F0FFFFEA9400203F1000400B9800203F42
|
||||
:108120000000203F0800203F3F0E1CFFC0B0610050
|
||||
:1081300008B4003F0002F90020B4003F3F420F00A6
|
||||
:040000030000800079
|
||||
:00000001FF
|
||||
122
armjtag/rpi2/armjtag.list
Normal file
122
armjtag/rpi2/armjtag.list
Normal file
@@ -0,0 +1,122 @@
|
||||
|
||||
armjtag.elf: file format elf32-littlearm
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00008000 <_start>:
|
||||
8000: e3a0d902 mov sp, #32768 ; 0x8000
|
||||
8004: eb000005 bl 8020 <notmain>
|
||||
|
||||
00008008 <hang>:
|
||||
8008: eafffffe b 8008 <hang>
|
||||
|
||||
0000800c <PUT32>:
|
||||
800c: e5801000 str r1, [r0]
|
||||
8010: e12fff1e bx lr
|
||||
|
||||
00008014 <GET32>:
|
||||
8014: e5900000 ldr r0, [r0]
|
||||
8018: e12fff1e bx lr
|
||||
|
||||
0000801c <dummy>:
|
||||
801c: e12fff1e bx lr
|
||||
|
||||
00008020 <notmain>:
|
||||
8020: e92d4070 push {r4, r5, r6, lr}
|
||||
8024: e3a01000 mov r1, #0
|
||||
8028: e59f00e4 ldr r0, [pc, #228] ; 8114 <notmain+0xf4>
|
||||
802c: ebfffff6 bl 800c <PUT32>
|
||||
8030: e3a04000 mov r4, #0
|
||||
8034: e1a00004 mov r0, r4
|
||||
8038: e2844001 add r4, r4, #1
|
||||
803c: ebfffff6 bl 801c <dummy>
|
||||
8040: e3540096 cmp r4, #150 ; 0x96
|
||||
8044: 1afffffa bne 8034 <notmain+0x14>
|
||||
8048: e59f10c8 ldr r1, [pc, #200] ; 8118 <notmain+0xf8>
|
||||
804c: e59f00c8 ldr r0, [pc, #200] ; 811c <notmain+0xfc>
|
||||
8050: ebffffed bl 800c <PUT32>
|
||||
8054: e3a04000 mov r4, #0
|
||||
8058: e1a00004 mov r0, r4
|
||||
805c: e2844001 add r4, r4, #1
|
||||
8060: ebffffed bl 801c <dummy>
|
||||
8064: e3540096 cmp r4, #150 ; 0x96
|
||||
8068: 1afffffa bne 8058 <notmain+0x38>
|
||||
806c: e3a01000 mov r1, #0
|
||||
8070: e59f00a4 ldr r0, [pc, #164] ; 811c <notmain+0xfc>
|
||||
8074: ebffffe4 bl 800c <PUT32>
|
||||
8078: e59f00a0 ldr r0, [pc, #160] ; 8120 <notmain+0x100>
|
||||
807c: ebffffe4 bl 8014 <GET32>
|
||||
8080: e3c01a07 bic r1, r0, #28672 ; 0x7000
|
||||
8084: e3811a02 orr r1, r1, #8192 ; 0x2000
|
||||
8088: e59f0090 ldr r0, [pc, #144] ; 8120 <notmain+0x100>
|
||||
808c: ebffffde bl 800c <PUT32>
|
||||
8090: e59f008c ldr r0, [pc, #140] ; 8124 <notmain+0x104>
|
||||
8094: ebffffde bl 8014 <GET32>
|
||||
8098: e59f3088 ldr r3, [pc, #136] ; 8128 <notmain+0x108>
|
||||
809c: e59f1088 ldr r1, [pc, #136] ; 812c <notmain+0x10c>
|
||||
80a0: e0033000 and r3, r3, r0
|
||||
80a4: e1831001 orr r1, r3, r1
|
||||
80a8: e59f0074 ldr r0, [pc, #116] ; 8124 <notmain+0x104>
|
||||
80ac: ebffffd6 bl 800c <PUT32>
|
||||
80b0: e3a018f9 mov r1, #16318464 ; 0xf90000
|
||||
80b4: e59f0074 ldr r0, [pc, #116] ; 8130 <notmain+0x110>
|
||||
80b8: ebffffd3 bl 800c <PUT32>
|
||||
80bc: e59f1070 ldr r1, [pc, #112] ; 8134 <notmain+0x114>
|
||||
80c0: e59f0068 ldr r0, [pc, #104] ; 8130 <notmain+0x110>
|
||||
80c4: ebffffd0 bl 800c <PUT32>
|
||||
80c8: e59f0068 ldr r0, [pc, #104] ; 8138 <notmain+0x118>
|
||||
80cc: ebffffd0 bl 8014 <GET32>
|
||||
80d0: e1a05000 mov r5, r0
|
||||
80d4: e59f4060 ldr r4, [pc, #96] ; 813c <notmain+0x11c>
|
||||
80d8: e59f0058 ldr r0, [pc, #88] ; 8138 <notmain+0x118>
|
||||
80dc: ebffffcc bl 8014 <GET32>
|
||||
80e0: e0650000 rsb r0, r5, r0
|
||||
80e4: e1500004 cmp r0, r4
|
||||
80e8: 9afffffa bls 80d8 <notmain+0xb8>
|
||||
80ec: e285693d add r6, r5, #999424 ; 0xf4000
|
||||
80f0: e2866d09 add r6, r6, #576 ; 0x240
|
||||
80f4: e59f003c ldr r0, [pc, #60] ; 8138 <notmain+0x118>
|
||||
80f8: ebffffc5 bl 8014 <GET32>
|
||||
80fc: e0660000 rsb r0, r6, r0
|
||||
8100: e1500004 cmp r0, r4
|
||||
8104: 9afffffa bls 80f4 <notmain+0xd4>
|
||||
8108: e285597a add r5, r5, #1998848 ; 0x1e8000
|
||||
810c: e2855d12 add r5, r5, #1152 ; 0x480
|
||||
8110: eafffff0 b 80d8 <notmain+0xb8>
|
||||
8114: 3f200094 svccc 0x00200094
|
||||
8118: 0b400010 bleq 1008160 <notmain+0x1000140>
|
||||
811c: 3f200098 svccc 0x00200098
|
||||
8120: 3f200000 svccc 0x00200000
|
||||
8124: 3f200008 svccc 0x00200008
|
||||
8128: ff1c0e3f ; <UNDEFINED> instruction: 0xff1c0e3f
|
||||
812c: 0061b0c0 rsbeq fp, r1, r0, asr #1
|
||||
8130: 3f00b408 svccc 0x0000b408
|
||||
8134: 00f90200 rscseq r0, r9, r0, lsl #4
|
||||
8138: 3f00b420 svccc 0x0000b420
|
||||
813c: 000f423f andeq r4, pc, pc, lsr r2 ; <UNPREDICTABLE>
|
||||
|
||||
Disassembly of section .ARM.attributes:
|
||||
|
||||
00000000 <.ARM.attributes>:
|
||||
0: 00002a41 andeq r2, r0, r1, asr #20
|
||||
4: 61656100 cmnvs r5, r0, lsl #2
|
||||
8: 01006962 tsteq r0, r2, ror #18
|
||||
c: 00000020 andeq r0, r0, r0, lsr #32
|
||||
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
|
||||
14: 54347620 ldrtpl r7, [r4], #-1568 ; 0xfffff9e0
|
||||
18: 08020600 stmdaeq r2, {r9, sl}
|
||||
1c: 12010901 andne r0, r1, #16384 ; 0x4000
|
||||
20: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
|
||||
24: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
|
||||
28: Address 0x0000000000000028 is out of bounds.
|
||||
|
||||
|
||||
Disassembly of section .comment:
|
||||
|
||||
00000000 <.comment>:
|
||||
0: 3a434347 bcc 10d0d24 <notmain+0x10c8d04>
|
||||
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
|
||||
8: 35202955 strcc r2, [r0, #-2389]! ; 0xfffff6ab
|
||||
c: 302e312e eorcc r3, lr, lr, lsr #2
|
||||
...
|
||||
BIN
armjtag/rpi2/armjtag.o
Normal file
BIN
armjtag/rpi2/armjtag.o
Normal file
Binary file not shown.
47
armjtag/rpi2/bcmrpi2.cfg
Normal file
47
armjtag/rpi2/bcmrpi2.cfg
Normal file
@@ -0,0 +1,47 @@
|
||||
|
||||
|
||||
telnet_port 4444
|
||||
#gdb_port 0
|
||||
#tcl_port 0
|
||||
|
||||
#jtag_khz 1000
|
||||
adapter_khz 1000
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME bcmrpi2
|
||||
}
|
||||
|
||||
# Main CPU DAP
|
||||
if { [info exists DAP_TAPID] } {
|
||||
set _DAP_TAPID $DAP_TAPID
|
||||
} else {
|
||||
set _DAP_TAPID 0x4ba00477
|
||||
}
|
||||
|
||||
jtag newtap $_CHIPNAME dap -expected-id $_DAP_TAPID -irlen 4
|
||||
|
||||
set _TARGETNAME0 $_CHIPNAME.cpu0
|
||||
set _TARGETNAME1 $_CHIPNAME.cpu1
|
||||
set _TARGETNAME2 $_CHIPNAME.cpu2
|
||||
set _TARGETNAME3 $_CHIPNAME.cpu3
|
||||
|
||||
target create $_TARGETNAME0 cortex_a -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x3fe10000
|
||||
target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap -coreid 1 -dbgbase 0x3fe12000
|
||||
target create $_TARGETNAME2 cortex_a -chain-position $_CHIPNAME.dap -coreid 2 -dbgbase 0x3fe14000
|
||||
target create $_TARGETNAME3 cortex_a -chain-position $_CHIPNAME.dap -coreid 3 -dbgbase 0x3fe16000
|
||||
target smp $_TARGETNAME0 $_TARGETNAME1 $_TARGETNAME2 $_TARGETNAME3
|
||||
|
||||
#$_TARGETNAME0 configure -event gdb-attach {
|
||||
#cortex_a dbginit
|
||||
#}
|
||||
#$_TARGETNAME1 configure -event gdb-attach {
|
||||
#cortex_a dbginit
|
||||
#}
|
||||
#$_TARGETNAME2 configure -event gdb-attach {
|
||||
#cortex_a dbginit
|
||||
#}
|
||||
#$_TARGETNAME3 configure -event gdb-attach {
|
||||
#cortex_a dbginit
|
||||
#}
|
||||
14
armjtag/rpi2/dlp-usb1232h.cfg
Normal file
14
armjtag/rpi2/dlp-usb1232h.cfg
Normal file
@@ -0,0 +1,14 @@
|
||||
#
|
||||
# DLP Design DLP-USB1232H USB-to-UART/FIFO interface module
|
||||
#
|
||||
# http://www.dlpdesign.com/usb/usb1232h.shtml
|
||||
#
|
||||
# Schematics for OpenOCD usage:
|
||||
# http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter
|
||||
#
|
||||
|
||||
interface ft2232
|
||||
ft2232_device_desc "Dual RS232-HS"
|
||||
ft2232_layout usbjtag
|
||||
ft2232_vid_pid 0x0403 0x6010
|
||||
|
||||
10
armjtag/rpi2/flyswatter.cfg
Normal file
10
armjtag/rpi2/flyswatter.cfg
Normal file
@@ -0,0 +1,10 @@
|
||||
#
|
||||
# TinCanTools Flyswatter
|
||||
#
|
||||
# http://www.tincantools.com/product.php?productid=16134
|
||||
#
|
||||
|
||||
interface ft2232
|
||||
ft2232_device_desc "Flyswatter"
|
||||
ft2232_layout "flyswatter"
|
||||
ft2232_vid_pid 0x0403 0x6010
|
||||
9
armjtag/rpi2/ft232h.cfg
Normal file
9
armjtag/rpi2/ft232h.cfg
Normal file
@@ -0,0 +1,9 @@
|
||||
#
|
||||
# FTDI FT4232H Mini Module
|
||||
#
|
||||
|
||||
interface ft2232
|
||||
#ft2232_device_desc "FT4232H MiniModule"
|
||||
ft2232_layout "flyswatter"
|
||||
ft2232_vid_pid 0x0403 0x6014
|
||||
|
||||
9
armjtag/rpi2/ft4232h.cfg
Normal file
9
armjtag/rpi2/ft4232h.cfg
Normal file
@@ -0,0 +1,9 @@
|
||||
#
|
||||
# FTDI FT4232H Mini Module
|
||||
#
|
||||
|
||||
interface ft2232
|
||||
ft2232_device_desc "FT4232H MiniModule"
|
||||
ft2232_layout "flyswatter"
|
||||
ft2232_vid_pid 0x0403 0x6011
|
||||
|
||||
40
armjtag/rpi2/hello.cfg
Normal file
40
armjtag/rpi2/hello.cfg
Normal file
@@ -0,0 +1,40 @@
|
||||
|
||||
# Broadcom 2835 on Raspberry Pi
|
||||
|
||||
telnet_port 4444
|
||||
#gdb_port 0
|
||||
#tcl_port 0
|
||||
|
||||
|
||||
|
||||
interface ft2232
|
||||
#ft2232_device_desc "Amontec JTAGkey"
|
||||
ft2232_layout flyswatter
|
||||
ft2232_vid_pid 0x0403 0x6543
|
||||
|
||||
|
||||
|
||||
#jtag_khz 1000
|
||||
adapter_khz 1000
|
||||
|
||||
#jtag_nsrst_delay 400
|
||||
#jtag_ntrst_delay 400
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME raspi
|
||||
}
|
||||
|
||||
reset_config none
|
||||
|
||||
if { [info exists CPU_TAPID ] } {
|
||||
set _CPU_TAPID $CPU_TAPID
|
||||
} else {
|
||||
set _CPU_TAPID 0x07b7617F
|
||||
}
|
||||
jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.arm
|
||||
target create $_TARGETNAME arm11 -chain-position $_TARGETNAME
|
||||
|
||||
1048578
armjtag/rpi2/hello.s
Normal file
1048578
armjtag/rpi2/hello.s
Normal file
File diff suppressed because it is too large
Load Diff
8
armjtag/rpi2/jlink.cfg
Normal file
8
armjtag/rpi2/jlink.cfg
Normal file
@@ -0,0 +1,8 @@
|
||||
#
|
||||
# Segger J-Link
|
||||
#
|
||||
# http://www.segger.com/jlink.html
|
||||
#
|
||||
|
||||
interface jlink
|
||||
|
||||
12
armjtag/rpi2/memmap
Normal file
12
armjtag/rpi2/memmap
Normal file
@@ -0,0 +1,12 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0x8000, LENGTH = 0x1000
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text : { *(.text*) } > ram
|
||||
.bss : { *(.bss*) } > ram
|
||||
}
|
||||
|
||||
79
armjtag/rpi2/openocd0.cfg
Normal file
79
armjtag/rpi2/openocd0.cfg
Normal file
@@ -0,0 +1,79 @@
|
||||
#
|
||||
# Amontec JTAGkey
|
||||
#
|
||||
# http://www.amontec.com/jtagkey.shtml
|
||||
#
|
||||
|
||||
telnet_port 4440
|
||||
gdb_port 0
|
||||
tcl_port 0
|
||||
|
||||
interface ft2232
|
||||
ft2232_device_desc "Amontec JTAGkey"
|
||||
ft2232_layout jtagkey
|
||||
ft2232_vid_pid 0x0403 0xcff8
|
||||
ft2232_serial T1RWU3KU
|
||||
|
||||
|
||||
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
|
||||
adapter_khz 6000
|
||||
|
||||
#jtag_nsrst_delay 400
|
||||
#jtag_ntrst_delay 400
|
||||
|
||||
# Texas Instruments OMAP 2420
|
||||
# http://www.ti.com/omap
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME nfp3200
|
||||
}
|
||||
|
||||
# NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK
|
||||
#reset_config trst_and_srst
|
||||
reset_config none
|
||||
|
||||
|
||||
# Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6).
|
||||
#jtag newtap $_CHIPNAME iva -irlen 4 -disable
|
||||
|
||||
# Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2).
|
||||
#jtag newtap $_CHIPNAME dsp -irlen 38 -disable
|
||||
|
||||
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
|
||||
#if { [info exists ETB_TAPID ] } {
|
||||
# set _ETB_TAPID $ETB_TAPID
|
||||
#} else {
|
||||
# set _ETB_TAPID 0x2b900f0f
|
||||
#}
|
||||
#jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETB_TAPID
|
||||
|
||||
# Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
|
||||
if { [info exists CPU_TAPID ] } {
|
||||
set _CPU_TAPID $CPU_TAPID
|
||||
} else {
|
||||
set _CPU_TAPID 0x07b37477
|
||||
}
|
||||
jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
|
||||
|
||||
# Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
|
||||
#if { [info exists JRC_TAPID ] } {
|
||||
# set _JRC_TAPID $JRC_TAPID
|
||||
#} else {
|
||||
# set _JRC_TAPID 0x01ce4801
|
||||
#}
|
||||
#jtag newtap $_CHIPNAME jrc -irlen 2 -expected-id $_JRC_TAPID
|
||||
|
||||
# GDB target: the ARM.
|
||||
set _TARGETNAME $_CHIPNAME.arm
|
||||
target create $_TARGETNAME arm11 -chain-position $_TARGETNAME
|
||||
|
||||
# scratch: framebuffer, may be initially unavailable in some chips
|
||||
#$_TARGETNAME configure -work-area-phys 0x40210000
|
||||
#$_TARGETNAME configure -work-area-size 0x00081000
|
||||
#$_TARGETNAME configure -work-area-backup 0
|
||||
|
||||
# trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
|
||||
#etm config $_TARGETNAME 16 normal full etb
|
||||
#etb config $_TARGETNAME $_CHIPNAME.etb
|
||||
31
armjtag/rpi2/raspi.cfg
Normal file
31
armjtag/rpi2/raspi.cfg
Normal file
@@ -0,0 +1,31 @@
|
||||
|
||||
# Broadcom 2835 on Raspberry Pi
|
||||
|
||||
telnet_port 4444
|
||||
#gdb_port 0
|
||||
#tcl_port 0
|
||||
|
||||
#jtag_khz 1000
|
||||
adapter_khz 1000
|
||||
|
||||
#jtag_nsrst_delay 400
|
||||
#jtag_ntrst_delay 400
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME raspi
|
||||
}
|
||||
|
||||
reset_config none
|
||||
|
||||
if { [info exists CPU_TAPID ] } {
|
||||
set _CPU_TAPID $CPU_TAPID
|
||||
} else {
|
||||
set _CPU_TAPID 0x4ba00477
|
||||
}
|
||||
jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.arm
|
||||
target create $_TARGETNAME arm11 -chain-position $_TARGETNAME
|
||||
|
||||
11
armjtag/rpi2/signalyzer-lite.cfg
Normal file
11
armjtag/rpi2/signalyzer-lite.cfg
Normal file
@@ -0,0 +1,11 @@
|
||||
#
|
||||
# Xverve Signalyzer LITE (DT-USB-SLITE)
|
||||
#
|
||||
# http://www.signalyzer.com
|
||||
#
|
||||
|
||||
interface ft2232
|
||||
ft2232_device_desc "Signalyzer LITE"
|
||||
ft2232_layout signalyzer
|
||||
ft2232_vid_pid 0x0403 0xbca1
|
||||
|
||||
BIN
armjtag/rpi2/vectors.o
Normal file
BIN
armjtag/rpi2/vectors.o
Normal file
Binary file not shown.
39
armjtag/rpi2/vectors.s
Normal file
39
armjtag/rpi2/vectors.s
Normal file
@@ -0,0 +1,39 @@
|
||||
|
||||
;@-------------------------------------------------------------------------
|
||||
;@-------------------------------------------------------------------------
|
||||
|
||||
.globl _start
|
||||
_start:
|
||||
mov sp,#0x8000
|
||||
bl notmain
|
||||
hang: b hang
|
||||
|
||||
.globl PUT32
|
||||
PUT32:
|
||||
str r1,[r0]
|
||||
bx lr
|
||||
|
||||
.globl GET32
|
||||
GET32:
|
||||
ldr r0,[r0]
|
||||
bx lr
|
||||
|
||||
.globl dummy
|
||||
dummy:
|
||||
bx lr
|
||||
|
||||
;@-------------------------------------------------------------------------
|
||||
;@-------------------------------------------------------------------------
|
||||
|
||||
|
||||
;@-------------------------------------------------------------------------
|
||||
;@
|
||||
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
|
||||
;@
|
||||
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
;@
|
||||
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
;@
|
||||
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
;@
|
||||
;@-------------------------------------------------------------------------
|
||||
Reference in New Issue
Block a user