The 32MX Board with 16MB SDRAM

This commit is contained in:
igor-m
2014-04-10 23:21:27 +02:00
parent 018eec580d
commit a87a95f6ad
4 changed files with 389 additions and 0 deletions

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#
# 32MXSDRAM board PCB v1.0 with UART console
# ===========================================
#
# Console on UART3
core pic32mx7
linker bootloader-sdram
mapping generic
device kernel cpu_khz=80000 bus_khz=80000 led=A15
device console led=A14 device=tty2
device uart3 baud=115200
device rdisk led=C13 swap=C14
option nproc=20
option hz=1000
# sdcard's definition for the SPI port, sdcard's chipselect and high-side power switch
# because of a mod on the board we use power=B13, otherwise it shall be D12
device sd0 port=4 cs=F3 power=B13 mhz=13
# device sd1 port=4 cs=F8 power=D13
device adc
device oc
device gpio
# use SDRAM driver for the external ramdisk
device sdramp
# This defines the swap size and a fs partition size on the external ramdisk.
# When the sa@XXXX is larger than the SWAP_KBYTES, the system will use
# the swap located on the external ramdisk automatically.
# (sd@xxxx + fs@xxxx) <= ramdisk_size
option PARTITION=sdramp0:sa@2048,fs@14000
option nmount=3
# set=pin means the pin will be set high during bootloading
device bootloader button=C1 user=0x1d005000 led=C13 led2=C14
option crystal=12
option pllidiv=3
option pllmul=20
option upllidiv=3

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BUILDPATH = /home/pito/RETROCURRENT/retrobsd/tools/configsys/../../sys/pic32
H = /home/pito/RETROCURRENT/retrobsd/tools/configsys/../../sys/include
M = /home/pito/RETROCURRENT/retrobsd/tools/configsys/../../sys/pic32
S = /home/pito/RETROCURRENT/retrobsd/tools/configsys/../../sys/kernel
vpath %.c $(M):$(S)
vpath %.S $(M):$(S)
KERNOBJ += _startup.o adc.o clock.o cons.o devsw.o exception.o gpio.o init_main.o init_sysent.o kern_clock.o kern_descrip.o kern_exec.o kern_exit.o kern_fork.o kern_mman.o kern_proc.o kern_prot.o kern_prot2.o kern_resource.o kern_sig.o kern_sig2.o kern_subr.o kern_synch.o kern_sysctl.o kern_time.o machdep.o mem.o oc.o rd_sd.o rd_sdramp.o rdisk.o sdram.o signal.o spi_bus.o subr_prf.o subr_rmap.o swap.o sys_generic.o sys_inode.o sys_pipe.o sys_process.o syscalls.o sysctl.o tty.o tty_subr.o tty_tty.o uart.o ufs_alloc.o ufs_bio.o ufs_bmap.o ufs_dsort.o ufs_fio.o ufs_inode.o ufs_mount.o ufs_namei.o ufs_subr.o ufs_syscalls.o ufs_syscalls2.o vers.o vfs_vnops.o vm_sched.o vm_swap.o vm_swp.o
EXTRA_TARGETS = bootloader
DEFS += -DADC_ENABLED=YES
DEFS += -DBL_BUTTON_PIN=1
DEFS += -DBL_BUTTON_PORT=TRISC
DEFS += -DBL_LED2_PIN=14
DEFS += -DBL_LED2_PORT=TRISC
DEFS += -DBL_LED_PIN=13
DEFS += -DBL_LED_PORT=TRISC
DEFS += -DBUS_DIV=1
DEFS += -DBUS_KHZ=80000
DEFS += -DCONSOLE_DEVICE=tty2
DEFS += -DCPU_IDIV=3
DEFS += -DCPU_KHZ=80000
DEFS += -DCPU_MUL=20
DEFS += -DCPU_ODIV=1
DEFS += -DCRYSTAL=12
DEFS += -DDC0_DEBUG=DEVCFG0_DEBUG_DISABLED
DEFS += -DDC0_ICE=0
DEFS += -DDC1_CKM=0
DEFS += -DDC1_CKS=0
DEFS += -DDC1_FNOSC=DEVCFG1_FNOSC_PRIPLL
DEFS += -DDC1_IESO=DEVCFG1_IESO
DEFS += -DDC1_OSCIOFNC=0
DEFS += -DDC1_PBDIV=DEVCFG1_FPBDIV_1
DEFS += -DDC1_POSCMOD=DEVCFG1_POSCMOD_HS
DEFS += -DDC1_SOSC=0
DEFS += -DDC1_WDTEN=0
DEFS += -DDC1_WDTPS=DEVCFG1_WDTPS_1
DEFS += -DDC2_PLLIDIV=DEVCFG2_FPLLIDIV_3
DEFS += -DDC2_PLLMUL=DEVCFG2_FPLLMUL_20
DEFS += -DDC2_PLLODIV=DEVCFG2_FPLLODIV_1
DEFS += -DDC2_UPLL=0
DEFS += -DDC2_UPLLIDIV=DEVCFG2_UPLLIDIV_3
DEFS += -DDC3_CAN=DEVCFG3_FCANIO
DEFS += -DDC3_ETH=DEVCFG3_FETHIO
DEFS += -DDC3_MII=DEVCFG3_FMIIEN
DEFS += -DDC3_SRS=DEVCFG3_FSRSSEL_7
DEFS += -DDC3_USBID=DEVCFG3_FUSBIDIO
DEFS += -DDC3_USERID=0xffff
DEFS += -DDC3_VBUSON=DEVCFG3_FVBUSONIO
DEFS += -DFLASH_USER=0x1d005000
DEFS += -DGPIO_ENABLED=YES
DEFS += -DHID_FEATURE_REPORT_BYTES=2
DEFS += -DHID_INPUT_REPORT_BYTES=2
DEFS += -DHID_INT_IN_EP_SIZE=64
DEFS += -DHID_INT_OUT_EP_SIZE=64
DEFS += -DHID_OUTPUT_REPORT_BYTES=2
DEFS += -DHID_RPT01_SIZE=29
DEFS += -DHZ=1000
DEFS += -DKERNEL
DEFS += -DKERNEL_EXECUTABLE_RAM
DEFS += -DLED_DISK_PIN=13
DEFS += -DLED_DISK_PORT=TRISC
DEFS += -DLED_KERNEL_PIN=15
DEFS += -DLED_KERNEL_PORT=TRISA
DEFS += -DLED_SWAP_PIN=14
DEFS += -DLED_SWAP_PORT=TRISC
DEFS += -DLED_TTY_PIN=14
DEFS += -DLED_TTY_PORT=TRISA
DEFS += -DNMOUNT=3
DEFS += -DNPROC=20
DEFS += -DOC_ENABLED=YES
DEFS += -DPARTITION="sdramp0:sa@2048,fs@14000"
DEFS += -DPIC32MX7
DEFS += -DSD0_CS_PIN=3
DEFS += -DSD0_CS_PORT=TRISF
DEFS += -DSD0_ENA_PIN=13
DEFS += -DSD0_ENA_PORT=TRISB
DEFS += -DSD0_MHZ=13
DEFS += -DSD0_PORT=4
DEFS += -DSDRAMP_ENABLED=YES
DEFS += -DUART3_BAUD=115200
DEFS += -DUART3_ENABLED=YES
DEFS += -DUCB_METER
DEFS += -DUSB_EP0_BUFF_SIZE=8
DEFS += -DUSB_MAX_EP_NUMBER=1
DEFS += -DUSB_NUM_STRING_DESCRIPTORS=3
LDSCRIPT = /home/pito/RETROCURRENT/retrobsd/tools/configsys/../../sys/pic32/cfg/bootloader-sdram.ld
CONFIG = 32MXSDRAM-UART
CONFIGPATH = /home/pito/RETROCURRENT/retrobsd/tools/configsys
include /home/pito/RETROCURRENT/retrobsd/tools/configsys/../../sys/pic32/kernel-post.mk

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/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 0x62C0
u0area (rw!x): ORIGIN = 0x800062C0, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80006EC0, LENGTH = 3K
keram (rwx) : ORIGIN = 0x80007AC0, LENGTH = 0x540
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
_keram_start = ORIGIN(keram);
_keram_end = ORIGIN(keram) + LENGTH(keram);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss .sbss.*)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/*
* RAM functions go at the end of our stack and heap allocation.
* Alignment of 2K required by the boundary register (BMXDKPBA).
*/
.ramfunc : AT (LOADADDR (.data) + SIZEOF (.data))
{
_ramfunc_begin = . ;
*(.ramfunc .ramfunc.*)
. = ALIGN(4) ;
_ramfunc_end = . ;
} >keram
_ramfunc_image_begin = LOADADDR(.ramfunc) ;
_ramfunc_length = SIZEOF(.ramfunc) ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}

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/*
* Linker script for PIC32 firmware using HID bootloader.
*/
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_reset_vector_)
MEMORY
{
flash (rx) : ORIGIN = 0x9d005000, LENGTH = 492K
ram (rw!x): ORIGIN = 0x80000000, LENGTH = 26K
u0area (rw!x): ORIGIN = 0x80006800, LENGTH = 3K
uarea (rw!x): ORIGIN = 0x80007400, LENGTH = 3K
/* Required by Microchip C32 linker */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x80000
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000
kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0x490
kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
}
/* higher address of the user mode stack */
u0 = ORIGIN(u0area);
u = ORIGIN(uarea);
u_end = ORIGIN(uarea) + LENGTH(uarea);
SECTIONS
{
.text ORIGIN(flash) :
{
/* Exception handlers. */
*(.exception)
. = 0x1000;
/* Execution starts here. */
*(.startup)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7)
__rodata_start = . ;
*(.rodata .rodata.* .gnu.linkonce.r.* .rel.dyn)
*(.dinit)
/* Align here to ensure that the .text section ends on word boundary. */
. = ALIGN (32 / 8);
_etext = .;
} > flash
/* Start data (internal SRAM). */
.data : AT (ADDR (.text) + SIZEOF (.text))
{
__data_start = . ;
_gp = .; /* We use only 32k RAM for kernel, so no need for 0x8000 offset. */
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata .sdata.* .gnu.linkonce.s.*)
*(.data .data.* .gnu.linkonce.d.*)
*(.eh_frame)
_edata = .;
} > ram
.bss ADDR (.data) + SIZEOF (.data) (NOLOAD) :
{
__bss_start = .;
*(.dynbss)
*(.sbss)
*(.scommon)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN (32 / 8);
} > ram
__bss_end = . ;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
}