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STM8: Remove unused code from STM8S peripheral library. Reduces footprint for the benefit of the Cosmic STM8 compiler which does not perform linker dead-stripping.

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This commit is contained in:
Kelvin Lawson
2010-05-18 00:07:20 +01:00
parent 18ffc47807
commit 538a535fe9
3 changed files with 6 additions and 3485 deletions
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701
ports/stm8/stm8s-periphs/stm8s_clk.c
View File

@@ -49,549 +49,6 @@ uc8 CLKPrescTable[8] = {1, 2, 4, 8, 10, 16, 20, 40}; /*!< Holds the different CL
* @{
*/
/**
* @brief Deinitializes the CLK peripheral registers to their default reset
* values.
* @par Parameters:
* None
* @retval None
* @par Warning:
* Resetting the CCOR register: \n
* When the CCOEN bit is set, the reset of the CCOR register require
* two consecutive write instructions in order to reset first the CCOEN bit
* and the second one is to reset the CCOSEL bits.
*/
void CLK_DeInit(void)
{
CLK->ICKR = CLK_ICKR_RESET_VALUE;
CLK->ECKR = CLK_ECKR_RESET_VALUE;
CLK->SWR = CLK_SWR_RESET_VALUE;
CLK->SWCR = CLK_SWCR_RESET_VALUE;
CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
CLK->CSSR = CLK_CSSR_RESET_VALUE;
CLK->CCOR = CLK_CCOR_RESET_VALUE;
while (CLK->CCOR & CLK_CCOR_CCOEN)
{}
CLK->CCOR = CLK_CCOR_RESET_VALUE;
CLK->CANCCR = CLK_CANCCR_RESET_VALUE;
CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
CLK->SWIMCCR = CLK_SWIMCCR_RESET_VALUE;
}
/**
* @brief Configures the High Speed Internal oscillator (HSI).
* @par Full description:
* If CLK_FastHaltWakeup is enabled, HSI oscillator is automatically
* switched-on (HSIEN=1) and selected as next clock master
* (CKM=SWI=HSI) when resuming from HALT/ActiveHalt modes.\n
* @param[in] NewState this parameter is the Wake-up Mode state.
* @retval None
*/
void CLK_FastHaltWakeUpCmd(FunctionalState NewState)
{
/* check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Set FHWU bit (HSI oscillator is automatically switched-on) */
CLK->ICKR |= CLK_ICKR_FHWU;
}
else /* FastHaltWakeup = DISABLE */
{
/* Reset FHWU bit */
CLK->ICKR &= (u8)(~CLK_ICKR_FHWU);
}
}
/**
* @brief Enable or Disable the External High Speed oscillator (HSE).
* @param[in] NewState new state of HSEEN, value accepted ENABLE, DISABLE.
* @retval None
*/
void CLK_HSECmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Set HSEEN bit */
CLK->ECKR |= CLK_ECKR_HSEEN;
}
else
{
/* Reset HSEEN bit */
CLK->ECKR &= (u8)(~CLK_ECKR_HSEEN);
}
}
/**
* @brief Enables or disables the Internal High Speed oscillator (HSI).
* @param[in] NewState new state of HSIEN, value accepted ENABLE, DISABLE.
* @retval None
*/
void CLK_HSICmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Set HSIEN bit */
CLK->ICKR |= CLK_ICKR_HSIEN;
}
else
{
/* Reset HSIEN bit */
CLK->ICKR &= (u8)(~CLK_ICKR_HSIEN);
}
}
/**
* @brief Enables or disables the Internal Low Speed oscillator (LSI).
* @param[in] NewState new state of LSIEN, value accepted ENABLE, DISABLE.
* @retval None
*/
void CLK_LSICmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Set LSIEN bit */
CLK->ICKR |= CLK_ICKR_LSIEN;
}
else
{
/* Reset LSIEN bit */
CLK->ICKR &= (u8)(~CLK_ICKR_LSIEN);
}
}
/**
* @brief Enables or disablle the Configurable Clock Output (CCO).
* @param[in] NewState : New state of CCEN bit (CCO register).
* This parameter can be any of the @ref FunctionalState enumeration.
* @retval None
*/
void CLK_CCOCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Set CCOEN bit */
CLK->CCOR |= CLK_CCOR_CCOEN;
}
else
{
/* Reset CCOEN bit */
CLK->CCOR &= (u8)(~CLK_CCOR_CCOEN);
}
}
/**
* @brief Starts or Stops manually the clock switch execution.
* @par Full description:
* NewState parameter set the SWEN.
* @param[in] NewState new state of SWEN, value accepted ENABLE, DISABLE.
* @retval None
*/
void CLK_ClockSwitchCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE )
{
/* Enable the Clock Switch */
CLK->SWCR |= CLK_SWCR_SWEN;
}
else
{
/* Disable the Clock Switch */
CLK->SWCR &= (u8)(~CLK_SWCR_SWEN);
}
}
/**
* @brief Configures the slow active halt wake up
* @param[in] NewState: specifies the Slow Active Halt wake up state.
* can be set of the following values:
* - DISABLE: Slow Active Halt mode disabled;
* - ENABLE: Slow Active Halt mode enabled.
* @retval None
*/
void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState)
{
/* check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Set S_ACTHALT bit */
CLK->ICKR |= CLK_ICKR_SWUAH;
}
else
{
/* Reset S_ACTHALT bit */
CLK->ICKR &= (u8)(~CLK_ICKR_SWUAH);
}
}
/**
* @brief Enables or disables the specified peripheral CLK.
* @param[in] CLK_Peripheral : This parameter specifies the peripheral clock to gate.
* This parameter can be any of the @ref CLK_Peripheral_TypeDef enumeration.
* @param[in] NewState : New state of specified peripheral clock.
* This parameter can be any of the @ref FunctionalState enumeration.
* @retval None
*/
void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
assert_param(IS_CLK_PERIPHERAL_OK(CLK_Peripheral));
if (((u8)CLK_Peripheral & (u8)0x10) == 0x00)
{
if (NewState != DISABLE)
{
/* Enable the peripheral Clock */
CLK->PCKENR1 |= (u8)((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F));
}
else
{
/* Disable the peripheral Clock */
CLK->PCKENR1 &= (u8)(~(u8)(((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F))));
}
}
else
{
if (NewState != DISABLE)
{
/* Enable the peripheral Clock */
CLK->PCKENR2 |= (u8)((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F));
}
else
{
/* Disable the peripheral Clock */
CLK->PCKENR2 &= (u8)(~(u8)(((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F))));
}
}
}
/**
* @brief configures the Switch from one clock to another
* @param[in] CLK_SwitchMode select the clock switch mode.
* It can be set of the values of @ref CLK_SwitchMode_TypeDef
* @param[in] CLK_NewClock choice of the future clock.
* It can be set of the values of @ref CLK_Source_TypeDef
* @param[in] NewState Enable or Disable the Clock Switch interrupt.
* @param[in] CLK_CurrentClockState current clock to switch OFF or to keep ON.
* It can be set of the values of @ref CLK_CurrentClockState_TypeDef
* @retval ErrorStatus this shows the clock switch status (ERROR/SUCCESS).
*/
ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState)
{
CLK_Source_TypeDef clock_master;
u16 DownCounter = CLK_TIMEOUT;
ErrorStatus Swif = ERROR;
/* Check the parameters */
assert_param(IS_CLK_SOURCE_OK(CLK_NewClock));
assert_param(IS_CLK_SWITCHMODE_OK(CLK_SwitchMode));
assert_param(IS_FUNCTIONALSTATE_OK(ITState));
assert_param(IS_CLK_CURRENTCLOCKSTATE_OK(CLK_CurrentClockState));
/* Current clock master saving */
clock_master = (CLK_Source_TypeDef)CLK->CMSR;
/* Automatic switch mode management */
if (CLK_SwitchMode == CLK_SWITCHMODE_AUTO)
{
/* Enables Clock switch */
CLK->SWCR |= CLK_SWCR_SWEN;
/* Enables or Disables Switch interrupt */
if (ITState != DISABLE)
{
CLK->SWCR |= CLK_SWCR_SWIEN;
}
else
{
CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN);
}
/* Selection of the target clock source */
CLK->SWR = (u8)CLK_NewClock;
while (((CLK->SWCR & CLK_SWCR_SWBSY) && (DownCounter != 0)))
{
DownCounter--;
}
if (DownCounter != 0)
{
Swif = SUCCESS;
}
else
{
Swif = ERROR;
}
}
else /* CLK_SwitchMode == CLK_SWITCHMODE_MANUAL */
{
/* Enables or Disables Switch interrupt if required */
if (ITState != DISABLE)
{
CLK->SWCR |= CLK_SWCR_SWIEN;
}
else
{
CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN);
}
/* Selection of the target clock source */
CLK->SWR = (u8)CLK_NewClock;
/* In manual mode, there is no risk to be stucked in a loop, value returned
is then always SUCCESS */
Swif = SUCCESS;
}
/* Switch OFF current clock if required */
if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_HSI))
{
CLK->ICKR &= (u8)(~CLK_ICKR_HSIEN);
}
else if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_LSI))
{
CLK->ICKR &= (u8)(~CLK_ICKR_LSIEN);
}
else if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_HSE))
{
CLK->ECKR &= (u8)(~CLK_ECKR_HSEEN);
}
return(Swif);
}
/**
* @brief Configures the HSI clock dividers.
* @param[in] HSIPrescaler : Specifies the HSI clock divider to apply.
* This parameter can be any of the @ref CLK_Prescaler_TypeDef enumeration.
* @retval None
*/
void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler)
{
/* check the parameters */
assert_param(IS_CLK_HSIPRESCALER_OK(HSIPrescaler));
/* Clear High speed internal clock prescaler */
CLK->CKDIVR &= (u8)(~CLK_CKDIVR_HSIDIV);
/* Set High speed internal clock prescaler */
CLK->CKDIVR |= (u8)HSIPrescaler;
}
/**
* @brief Output the selected clock on a dedicated I/O pin.
* @param[in] CLK_CCO : Specifies the clock source.
* This parameter can be any of the @ref CLK_Output_TypeDef enumeration.
* @retval None
* @par Required preconditions:
* The dedicated I/O pin must be set at 1 in the corresponding Px_CR1 register \n
* to be set as input with pull-up or push-pull output.
*/
void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO)
{
/* check the parameters */
assert_param(IS_CLK_OUTPUT_OK(CLK_CCO));
/* Clears of the CCO type bits part */
CLK->CCOR &= (u8)(~CLK_CCOR_CCOSEL);
/* Selects the source provided on cco_ck output */
CLK->CCOR |= (u8)CLK_CCO;
/* Enable the clock output */
CLK->CCOR |= CLK_CCOR_CCOEN;
}
/**
* @brief Enables or disables the specified CLK interrupts.
* @param[in] CLK_IT This parameter specifies the interrupt sources.
* It can be one of the values of @ref CLK_IT_TypeDef.
* @param[in] NewState New state of the Interrupt.
* Value accepted ENABLE, DISABLE.
* @retval None
*/
void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
{
/* check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
assert_param(IS_CLK_IT_OK(CLK_IT));
if (NewState != DISABLE)
{
switch (CLK_IT)
{
case CLK_IT_SWIF: /* Enable the clock switch interrupt */
CLK->SWCR |= CLK_SWCR_SWIEN;
break;
case CLK_IT_CSSD: /* Enable the clock security system detection interrupt */
CLK->CSSR |= CLK_CSSR_CSSDIE;
break;
default:
break;
}
}
else /*(NewState == DISABLE)*/
{
switch (CLK_IT)
{
case CLK_IT_SWIF: /* Disable the clock switch interrupt */
CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN);
break;
case CLK_IT_CSSD: /* Disable the clock security system detection interrupt */
CLK->CSSR &= (u8)(~CLK_CSSR_CSSDIE);
break;
default:
break;
}
}
}
/**
* @brief Configures the HSI and CPU clock dividers.
* @param[in] ClockPrescaler Specifies the HSI or CPU clock divider to apply.
* @retval None
*/
void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef ClockPrescaler)
{
/* check the parameters */
assert_param(IS_CLK_PRESCALER_OK(ClockPrescaler));
if (((u8)ClockPrescaler & (u8)0x80) == 0x00) /* Bit7 = 0 means HSI divider */
{
CLK->CKDIVR &= (u8)(~CLK_CKDIVR_HSIDIV);
CLK->CKDIVR |= (u8)((u8)ClockPrescaler & (u8)CLK_CKDIVR_HSIDIV);
}
else /* Bit7 = 1 means CPU divider */
{
CLK->CKDIVR &= (u8)(~CLK_CKDIVR_CPUDIV);
CLK->CKDIVR |= (u8)((u8)ClockPrescaler & (u8)CLK_CKDIVR_CPUDIV);
}
}
/**
* @brief Configures the SWIM clock frequency on the fly.
* @param[in] CLK_SWIMDivider Specifies the SWIM clock divider to apply.
* can be one of the value of @ref CLK_SWIMDivider_TypeDef
* @retval None
*/
void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider)
{
/* check the parameters */
assert_param(IS_CLK_SWIMDIVIDER_OK(CLK_SWIMDivider));
if (CLK_SWIMDivider != CLK_SWIMDIVIDER_2)
{
/* SWIM clock is not divided by 2 */
CLK->SWIMCCR |= CLK_SWIMCCR_SWIMDIV;
}
else /* CLK_SWIMDivider == CLK_SWIMDIVIDER_2 */
{
/* SWIM clock is divided by 2 */
CLK->SWIMCCR &= (u8)(~CLK_SWIMCCR_SWIMDIV);
}
}
/**
* @brief Configure the divider for the external CAN clock.
* @param[in] CLK_CANDivider Specifies the CAN clock divider to apply.
* can be one of the value of @ref CLK_CANDivider_TypeDef
* @retval None
*/
void CLK_CANConfig(CLK_CANDivider_TypeDef CLK_CANDivider)
{
/* check the parameters */
assert_param(IS_CLK_CANDIVIDER_OK(CLK_CANDivider));
/* Clear the CANDIV bits */
CLK->CANCCR &= (u8)(~CLK_CANCCR_CANDIV);
/* Select divider */
CLK->CANCCR |= (u8)CLK_CANDivider;
}
/**
* @brief Enables the Clock Security System.
* @par Full description:
* once CSS is enabled it cannot be disabled until the next reset.
* @par Parameters:
* None
* @retval None
*/
void CLK_ClockSecuritySystemEnable(void)
{
/* Set CSSEN bit */
CLK->CSSR |= CLK_CSSR_CSSEN;
}
/**
* @brief Returns the clock source used as system clock.
* @par Parameters:
* None
* @retval Clock source used.
* can be one of the values of @ref CLK_Source_TypeDef
*/
CLK_Source_TypeDef CLK_GetSYSCLKSource(void)
{
return((CLK_Source_TypeDef)CLK->CMSR);
}
/**
* @brief This function returns the frequencies of different on chip clocks.
@@ -628,164 +85,8 @@ u32 CLK_GetClockFreq(void)
return((u32)clockfrequency);
}
/**
* @brief Adjusts the Internal High Speed oscillator (HSI) calibration value.
* @par Full description:
* @param[in] CLK_HSICalibrationValue calibration trimming value.
* can be one of the values of @ref CLK_HSITrimValue_TypeDef
* @retval None
*/
void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue)
{
/* check the parameters */
assert_param(IS_CLK_HSITRIMVALUE_OK(CLK_HSICalibrationValue));
/* Store the new value */
CLK->HSITRIMR = (u8)((CLK->HSITRIMR & (u8)(~CLK_HSITRIMR_HSITRIM))|((u8)CLK_HSICalibrationValue));
}
/**
* @brief Reset the SWBSY flag (SWICR Reister)
* @par Full description:
* This function reset SWBSY flag in order to reset clock switch operations (target
* oscillator is broken, stabilization is longing too much, etc.). If at the same time \n
* software attempts to set SWEN and clear SWBSY, SWBSY action takes precedence.
* @par Parameters:
* None
* @retval None
*/
void CLK_SYSCLKEmergencyClear(void)
{
CLK->SWCR &= (u8)(~CLK_SWCR_SWBSY);
}
/**
* @brief Checks whether the specified CLK flag is set or not.
* @par Full description:
* @param[in] CLK_FLAG Flag to check.
* can be one of the values of @ref CLK_Flag_TypeDef
* @retval FlagStatus, status of the checked flag
*/
FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG)
{
u16 statusreg = 0;
u8 tmpreg = 0;
FlagStatus bitstatus = RESET;
/* check the parameters */
assert_param(IS_CLK_FLAG_OK(CLK_FLAG));
/* Get the CLK register index */
statusreg = (u16)((u16)CLK_FLAG & (u16)0xFF00);
if (statusreg == 0x0100) /* The flag to check is in ICKRregister */
{
tmpreg = CLK->ICKR;
}
else if (statusreg == 0x0200) /* The flag to check is in ECKRregister */
{
tmpreg = CLK->ECKR;
}
else if (statusreg == 0x0300) /* The flag to check is in SWIC register */
{
tmpreg = CLK->SWCR;
}
else if (statusreg == 0x0400) /* The flag to check is in CSS register */
{
tmpreg = CLK->CSSR;
}
else /* The flag to check is in CCO register */
{
tmpreg = CLK->CCOR;
}
if ((tmpreg & (u8)CLK_FLAG) != (u8)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return((FlagStatus)bitstatus);
}
/**
* @brief Checks whether the specified CLK interrupt has is enabled or not.
* @param[in] CLK_IT specifies the CLK interrupt.
* can be one of the values of @ref CLK_IT_TypeDef
* @retval ITStatus, new state of CLK_IT (SET or RESET).
*/
ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
{
ITStatus bitstatus = RESET;
/* check the parameters */
assert_param(IS_CLK_IT_OK(CLK_IT));
if (CLK_IT == CLK_IT_SWIF)
{
/* Check the status of the clock switch interrupt */
if ((CLK->SWCR & (u8)CLK_IT) == (u8)0x0C)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
else /* CLK_IT == CLK_IT_CSSDIE */
{
/* Check the status of the security system detection interrupt */
if ((CLK->CSSR & (u8)CLK_IT) == (u8)0x0C)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
/* Return the CLK_IT status */
return bitstatus;
}
/**
* @brief Clears the CLK’s interrupt pending bits.
* @param[in] CLK_IT specifies the interrupt pending bits.
* can be one of the values of @ref CLK_IT_TypeDef
* @retval None
*/
void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
{
/* check the parameters */
assert_param(IS_CLK_IT_OK(CLK_IT));
if (CLK_IT == (u8)CLK_IT_CSSD)
{
/* Clear the status of the security system detection interrupt */
CLK->CSSR &= (u8)(~CLK_CSSR_CSSD);
}
else /* CLK_PendingBit == (u8)CLK_IT_SWIF */
{
/* Clear the status of the clock switch interrupt */
CLK->SWCR &= (u8)(~CLK_SWCR_SWIF);
}
}
/**
* @}
*/

2148
ports/stm8/stm8s-periphs/stm8s_tim1.c
View File

File diff suppressed because it is too large Load Diff

642
ports/stm8/stm8s-periphs/stm8s_uart2.c
View File

@@ -149,336 +149,7 @@ void UART2_Init(u32 BaudRate, UART2_WordLength_TypeDef WordLength, UART2_StopBit
UART2->CR3 |= (u8)((u8)SyncMode & UART2_CR3_CKEN);
}
}
/**
* @brief Enable the UART2 peripheral.
* @par Full description:
* Enable the UART2 peripheral.
* @param[in] NewState new state of the UART2 Communication.
* This parameter can be:
* - ENABLE
* - DISABLE
* @retval None
*/
void UART2_Cmd(FunctionalState NewState)
{
if (NewState != DISABLE)
{
UART2->CR1 &= (u8)(~UART2_CR1_UARTD); /**< UART2 Enable */
}
else
{
UART2->CR1 |= UART2_CR1_UARTD; /**< UART2 Disable (for low power consumption) */
}
}
/**
* @brief Enables or disables the specified UART2 interrupts.
* @par Full description:
* Enables or disables the specified UART2 interrupts.
* @param[in] UART2_IT specifies the UART2 interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* - UART2_IT_LBDF: LIN Break detection interrupt
* - UART2_IT_LHDF: LIN Break detection interrupt
* - UART2_IT_TXE: Tansmit Data Register empty interrupt
* - UART2_IT_TC: Transmission complete interrupt
* - UART2_IT_RXNE_OR: Receive Data register not empty/Over run error interrupt
* - UART2_IT_IDLE: Idle line detection interrupt
* - UART2_IT_PE: Parity Error interrupt
* @param[in] NewState new state of the specified UART2 interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void UART2_ITConfig(UART2_IT_TypeDef UART2_IT, FunctionalState NewState)
{
u8 uartreg, itpos = 0x00;
assert_param(IS_UART2_CONFIG_IT_OK(UART2_IT));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Get the UART2 register index */
uartreg = (u8)(UART2_IT >> 0x08);
/* Get the UART2 IT index */
itpos = (u8)((u8)1 << (u8)((u8)UART2_IT & (u8)0x0F));
if (NewState != DISABLE)
{
/**< Enable the Interrupt bits according to UART2_IT mask */
if (uartreg == 0x01)
{
UART2->CR1 |= itpos;
}
else if (uartreg == 0x02)
{
UART2->CR2 |= itpos;
}
else if (uartreg == 0x03)
{
UART2->CR4 |= itpos;
}
else
{
UART2->CR6 |= itpos;
}
}
else
{
/**< Disable the interrupt bits according to UART2_IT mask */
if (uartreg == 0x01)
{
UART2->CR1 &= (u8)(~itpos);
}
else if (uartreg == 0x02)
{
UART2->CR2 &= (u8)(~itpos);
}
else if (uartreg == 0x03)
{
UART2->CR4 &= (u8)(~itpos);
}
else
{
UART2->CR6 &= (u8)(~itpos);
}
}
}
/**
* @brief Configures the UART2’s IrDA interface.
* @par Full description:
* Configures the UART2’s IrDA interface.
* @par This function is valid only for UART2.
* @param[in] UART2_IrDAMode specifies the IrDA mode.
* This parameter can be any of the @ref UART2_IrDAMode_TypeDef values.
* @retval None
*/
void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode)
{
assert_param(IS_UART2_IRDAMODE_OK(UART2_IrDAMode));
if (UART2_IrDAMode != UART2_IRDAMODE_NORMAL)
{
UART2->CR5 |= UART2_CR5_IRLP;
}
else
{
UART2->CR5 &= ((u8)~UART2_CR5_IRLP);
}
}
/**
* @brief Enables or disables the UART2’s IrDA interface.
* @par Full description:
* Enables or disables the UART2’s IrDA interface.
* @par This function is related to IrDA mode.
* @param[in] NewState new state of the IrDA mode.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void UART2_IrDACmd(FunctionalState NewState)
{
/* Check parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Enable the IrDA mode by setting the IREN bit in the CR3 register */
UART2->CR5 |= UART2_CR5_IREN;
}
else
{
/* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
UART2->CR5 &= ((u8)~UART2_CR5_IREN);
}
}
/**
* @brief Sets the UART2 LIN Break detection length.
* @par Full description:
* Sets the UART2 LIN Break detection length.
* @param[in] UART2_LINBreakDetectionLength specifies the LIN break detection length.
* This parameter can be any of the @ref UART2_LINBreakDetectionLength_TypeDef values.
* @retval None
*/
void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength)
{
assert_param(IS_UART2_LINBREAKDETECTIONLENGTH_OK(UART2_LINBreakDetectionLength));
if (UART2_LINBreakDetectionLength != UART2_LINBREAKDETECTIONLENGTH_10BITS)
{
UART2->CR4 |= UART2_CR4_LBDL;
}
else
{
UART2->CR4 &= ((u8)~UART2_CR4_LBDL);
}
}
/**
* @brief Configue the UART2 peripheral.
* @par Full description:
* Configue the UART2 peripheral.
* @param[in] UART2_Mode specifies the LIN mode.
* This parameter can be any of the @ref UART2_LinMode_TypeDef values.
* @param[in] UART2_Autosync specifies the LIN automatic resynchronization mode.
* This parameter can be any of the @ref UART2_LinAutosync_TypeDef values.
* @param[in] UART2_DivUp specifies the LIN divider update method.
* This parameter can be any of the @ref UART2_LinDivUp_TypeDef values.
* @retval None
*/
void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode, UART2_LinAutosync_TypeDef UART2_Autosync, UART2_LinDivUp_TypeDef UART2_DivUp)
{
assert_param(IS_UART2_SLAVE_OK(UART2_Mode));
assert_param(IS_UART2_AUTOSYNC_OK(UART2_Autosync));
assert_param(IS_UART2_DIVUP_OK(UART2_DivUp));
if (UART2_Mode != UART2_LIN_MODE_MASTER)
{
UART2->CR6 |= UART2_CR6_LSLV;
}
else
{
UART2->CR6 &= ((u8)~UART2_CR6_LSLV);
}
if (UART2_Autosync != UART2_LIN_AUTOSYNC_DISABLE)
{
UART2->CR6 |= UART2_CR6_LASE ;
}
else
{
UART2->CR6 &= ((u8)~ UART2_CR6_LASE );
}
if (UART2_DivUp != UART2_LIN_DIVUP_LBRR1)
{
UART2->CR6 |= UART2_CR6_LDUM;
}
else
{
UART2->CR6 &= ((u8)~ UART2_CR6_LDUM);
}
}
/**
* @brief Enables or disables the UART2 LIN mode.
* @par Full description:
* Enables or disables the UART2’s LIN mode.
* @param[in] NewState is new state of the UART2 LIN mode.
* This parameter can be:
* - ENABLE
* - DISABLE
* @retval None
*/
void UART2_LINCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Enable the LIN mode by setting the LINE bit in the CR2 register */
UART2->CR3 |= UART2_CR3_LINEN;
}
else
{
/* Disable the LIN mode by clearing the LINE bit in the CR2 register */
UART2->CR3 &= ((u8)~UART2_CR3_LINEN);
}
}
/**
* @brief Enables or disables the UART2 Smart Card mode.
* @par Full description:
* Enables or disables the UART2 Smart Card mode.
* @par This function is related to SmartCard mode.
* @param[in] NewState: new state of the Smart Card mode.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void UART2_SmartCardCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Enable the SC mode by setting the SCEN bit in the CR5 register */
UART2->CR5 |= UART2_CR5_SCEN;
}
else
{
/* Disable the SC mode by clearing the SCEN bit in the CR5 register */
UART2->CR5 &= ((u8)(~UART2_CR5_SCEN));
}
}
/**
* @brief Enables or disables NACK transmission.
* @par Full description:
* Enables or disables NACK transmission.
* @par This function is valid only for UART2 because is related to SmartCard mode.
* @param[in] NewState: new state of the Smart Card mode.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void UART2_SmartCardNACKCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Enable the NACK transmission by setting the NACK bit in the CR5 register */
UART2->CR5 |= UART2_CR5_NACK;
}
else
{
/* Disable the NACK transmission by clearing the NACK bit in the CR5 register */
UART2->CR5 &= ((u8)~(UART2_CR5_NACK));
}
}
/**
* @brief Selects the UART2 WakeUp method.
* @par Full description:
* Selects the UART2 WakeUp method.
* @param[in] UART2_WakeUp: specifies the UART2 wakeup method.
* This parameter can be any of the @ref UART2_WakeUp_TypeDef values.
* @retval None
*/
void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp)
{
assert_param(IS_UART2_WAKEUP_OK(UART2_WakeUp));
UART2->CR1 &= ((u8)~UART2_CR1_WAKE);
UART2->CR1 |= (u8)UART2_WakeUp;
}
/**
* @brief Determines if the UART2 is in mute mode or not.
* @par Full description:
* Determines if the UART2 is in mute mode or not.
* @param[in] NewState: new state of the UART2 mode.
* This parameter can be:
* - ENABLE
* - DISABLE
* @retval None
*/
void UART2_ReceiverWakeUpCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Enable the mute mode UART2 by setting the RWU bit in the CR2 register */
UART2->CR2 |= UART2_CR2_RWU;
}
else
{
/* Disable the mute mode UART2 by clearing the RWU bit in the CR1 register */
UART2->CR2 &= ((u8)~UART2_CR2_RWU);
}
}
/**
* @brief Returns the most recent received data by the UART2 peripheral.
@@ -493,20 +164,6 @@ u8 UART2_ReceiveData8(void)
return ((u8)UART2->DR);
}
/**
* @brief Returns the most recent received data by the UART2 peripheral.
* @par Full description:
* Returns the most recent received data by the UART2 peripheral.
* @retval u16 Received Data
* @par Required preconditions:
* UART2_Cmd(ENABLE);
*/
u16 UART2_ReceiveData9(void)
{
return (u16)((((u16)UART2->DR) | ((u16)(((u16)((u16)UART2->CR1 & (u16)UART2_CR1_R8)) << 1))) & ((u16)0x01FF));
}
/**
* @brief Transmits 8 bit data through the UART2 peripheral.
@@ -522,96 +179,7 @@ void UART2_SendData8(u8 Data)
/* Transmit Data */
UART2->DR = Data;
}
/**
* @brief Transmits 9 bit data through the UART2 peripheral.
* @par Full description:
* Transmits 9 bit data through the UART2 peripheral.
* @param[in] Data: the data to transmit.
* @retval None
* @par Required preconditions:
* UART2_Cmd(ENABLE);
*/
void UART2_SendData9(u16 Data)
{
UART2->CR1 &= ((u8)~UART2_CR1_T8); /* Clear the transmit data bit 8 */
UART2->CR1 |= (u8)(((u8)(Data >> 2)) & UART2_CR1_T8); /* Write the transmit data bit [8] */
UART2->DR = (u8)(Data); /* Write the transmit data bit [0:7] */
}
/**
* @brief Transmits break characters.
* @par Full description:
* Transmits break characters on the UART2 peripheral.
* @retval None
*/
void UART2_SendBreak(void)
{
UART2->CR2 |= UART2_CR2_SBK;
}
/**
* @brief Sets the address of the UART2 node.
* @par Full description:
* Sets the address of the UART2 node.
* @param[in] UART2_Address: Indicates the address of the UART2 node.
* @retval None
*/
void UART2_SetAddress(u8 UART2_Address)
{
/*assert_param for x UART2_Address*/
assert_param(IS_UART2_ADDRESS_OK(UART2_Address));
/* Clear the UART2 address */
UART2->CR4 &= ((u8)~UART2_CR4_ADD);
/* Set the UART2 address node */
UART2->CR4 |= UART2_Address;
}
/**
* @brief Sets the specified UART2 guard time.
* @par Full description:
* Sets the address of the UART2 node.
* @par This function is related to SmartCard mode.
* @param[in] UART2_GuardTime: specifies the guard time.
* @retval None
* @par Required preconditions:
* SmartCard Mode Enabled
*/
void UART2_SetGuardTime(u8 UART2_GuardTime)
{
/* Set the UART2 guard time */
UART2->GTR = UART2_GuardTime;
}
/**
* @brief Sets the system clock prescaler.
* @par Full description:
* Sets the system clock prescaler.
* @par This function is related to SmartCard and IrDa mode.
* @param[in] UART2_Prescaler: specifies the prescaler clock.
* This parameter can be one of the following values:
* @par IrDA Low Power Mode
* The clock source is diveded by the value given in the register (8 bits)
* - 0000 0000 Reserved
* - 0000 0001 divides the clock source by 1
* - 0000 0010 divides the clock source by 2
* - ...........................................................
* @par Smart Card Mode
* The clock source is diveded by the value given in the register (5 significant bits) multipied by 2
* - 0 0000 Reserved
* - 0 0001 divides the clock source by 2
* - 0 0010 divides the clock source by 4
* - 0 0011 divides the clock source by 6
* - ...........................................................
* @retval None
* @par Required preconditions:
* IrDA Low Power mode or smartcard mode enabled
*/
void UART2_SetPrescaler(u8 UART2_Prescaler)
{
/* Load the UART2 prescaler value*/
UART2->PSCR = UART2_Prescaler;
}
/**
* @brief Checks whether the specified UART2 flag is set or not.
@@ -685,211 +253,9 @@ FlagStatus UART2_GetFlagStatus(UART2_Flag_TypeDef UART2_FLAG)
/* Return the UART2_FLAG status*/
return status;
}
/**
* @brief Clears the UART2 flags.
* @par Full description:
* Clears the UART2 flags.
* @param[in] UART2_FLAG specifies the flag to clear
* This parameter can be any combination of the following values:
* - UART2_FLAG_LBDF: LIN Break detection flag.
* - UART2_FLAG_LHDF: LIN Header detection flag.
* - UART2_FLAG_LSF: LIN synchrone field flag.
* - UART2_FLAG_RXNE: Receive data register not empty flag.
* @par Notes:
* - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error)
* and IDLE (Idle line detected) flags are cleared by software sequence: a read
* operation to UART2_SR register (UART2_GetFlagStatus())followed by a read operation
* to UART2_DR register(UART2_ReceiveData8() or UART2_ReceiveData9()).
* - RXNE flag can be also cleared by a read to the UART2_DR register
* (UART2_ReceiveData8()or UART2_ReceiveData9()).
* - TC flag can be also cleared by software sequence: a read operation to UART2_SR
* register (UART2_GetFlagStatus()) followed by a write operation to UART2_DR register
* (UART2_SendData8() or UART2_SendData9()).
* - TXE flag is cleared only by a write to the UART2_DR register (UART2_SendData8() or
* UART2_SendData9()).
* - SBK flag is cleared during the stop bit of break.
* @retval None
*/
}
void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG)
{
assert_param(IS_UART2_CLEAR_FLAG_OK(UART2_FLAG));
/*< Clear the Receive Register Not Empty flag */
if (UART2_FLAG == UART2_FLAG_RXNE)
{
UART2->SR = (u8)~(UART2_SR_RXNE);
}
/*< Clear the LIN Break Detection flag */
else if (UART2_FLAG == UART2_FLAG_LBDF)
{
UART2->CR4 &= (u8)(~UART2_CR4_LBDF);
}
/*< Clear the LIN Header Detection Flag */
else if (UART2_FLAG == UART2_FLAG_LHDF)
{
UART2->CR6 &= (u8)(~UART2_CR6_LHDF);
}
/*< Clear the LIN Synch Field flag */
else
{
UART2->CR6 &= (u8)(~UART2_CR6_LSF);
}
}
/**
* @brief Checks whether the specified UART2 interrupt has occurred or not.
* @par Full description:
* Checks whether the specified UART2 interrupt has occurred or not.
* @param[in] UART2_IT: Specifies the UART2 interrupt pending bit to check.
* This parameter can be one of the following values:
* - UART2_IT_LBDF: LIN Break detection interrupt
* - UART2_IT_TXE: Tansmit Data Register empty interrupt
* - UART2_IT_TC: Transmission complete interrupt
* - UART2_IT_RXNE: Receive Data register not empty interrupt
* - UART2_IT_IDLE: Idle line detection interrupt
* - UART2_IT_OR: OverRun Error interrupt
* - UART2_IT_PE: Parity Error interrupt
* @retval
* ITStatus The new state of UART2_IT (SET or RESET).
*/
ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT)
{
ITStatus pendingbitstatus = RESET;
u8 itpos = 0;
u8 itmask1 = 0;
u8 itmask2 = 0;
u8 enablestatus = 0;
/* Check parameters */
assert_param(IS_UART2_GET_IT_OK(UART2_IT));
/* Get the UART2 IT index*/
itpos = (u8)((u8)1 << (u8)((u8)UART2_IT & (u8)0x0F));
/* Get the UART2 IT index*/
itmask1 = (u8)((u8)UART2_IT >> (u8)4);
/* Set the IT mask*/
itmask2 = (u8)((u8)1 << itmask1);
/* Check the status of the specified UART2 pending bit*/
if (UART2_IT == UART2_IT_PE)
{
/* Get the UART2_ITPENDINGBIT enable bit status*/
enablestatus = (u8)((u8)UART2->CR1 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART2_IT == UART2_IT_LBDF)
{
/* Get the UART2_IT enable bit status*/
enablestatus = (u8)((u8)UART2->CR4 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->CR4 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART2_IT == UART2_IT_LHDF)
{
/* Get the UART2_IT enable bit status*/
enablestatus = (u8)((u8)UART2->CR6 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->CR6 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else
{
/* Get the UART2_IT enable bit status*/
enablestatus = (u8)((u8)UART2->CR2 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
/* Return the UART2_IT status*/
return pendingbitstatus;
}
/**
* @brief Clears the UART2 pending flags.
* @par Full description:
* Clears the UART2 pending bit.
* @param[in] UART2_IT specifies the pending bit to clear
* This parameter can be one of the following values:
* - UART2_IT_LBDF: LIN Break detection interrupt
* - UART2_IT_LHDF: LIN Header detection interrupt
* - UART2_IT_RXNE: Receive Data register not empty interrupt.
*
* @par Notes:
* - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error) and
* IDLE (Idle line detected) pending bits are cleared by software sequence: a read
* operation to UART2_SR register (UART2_GetITStatus()) followed by a read operation
* to UART2_DR register (UART2_ReceiveData8() or UART2_ReceiveData9() ).
* - RXNE pending bit can be also cleared by a read to the UART2_DR register
* (UART2_ReceiveData8() or UART2_ReceiveData9() ).
* - TC (Transmit complet) pending bit can be cleared by software sequence: a read
* operation to UART2_SR register (UART2_GetITStatus()) followed by a write operation
* to UART2_DR register (UART2_SendData8()or UART2_SendData9()).
* - TXE pending bit is cleared only by a write to the UART2_DR register
* (UART2_SendData8() or UART2_SendData9()).
* @retval None
*/
void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT)
{
assert_param(IS_UART2_CLEAR_IT_OK(UART2_IT));
/*< Clear the Receive Register Not Empty pending bit */
if (UART2_IT == UART2_IT_RXNE)
{
UART2->SR = (u8)~(UART2_SR_RXNE);
}
/*< Clear the LIN Break Detection pending bit */
else if (UART2_IT == UART2_IT_LBDF)
{
UART2->CR4 &= (u8)~(UART2_CR4_LBDF);
}
/*< Clear the LIN Header Detection pending bit */
else
{
UART2->CR6 &= (u8)(~UART2_CR6_LHDF);
}
}
/**
* @}
*/