mirror of
https://github.com/drasko/codezero.git
synced 2026-01-12 02:43:15 +01:00
PBA8 platform removed
This commit is contained in:
Amit Mahajan
@@ -22,7 +22,6 @@ arm_platform_type 'ARM Platform Type'
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PLATFORM_EB 'Realview EB Platform, Unsupported yet'
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PLATFORM_PB926 'Versatile PB926 Platform'
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PLATFORM_PB11MPCORE 'Realview PB11MPCore Platform'
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PLATFORM_PBA8 'Realview PB-A8 Platform'
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main_menu 'Codezero Microkernel Configurator'
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arm_menu 'ARM Architecture Configuration'
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@@ -57,7 +56,6 @@ choices arm_platform_type
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PLATFORM_EB
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PLATFORM_PB926
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PLATFORM_PB11MPCORE
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PLATFORM_PBA8
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default PLATFORM_PB926
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choices arm_cpu_type
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@@ -103,7 +101,6 @@ default CONTAINERS from 1
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#Platform rules:
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unless SUBARCH_V5 suppress PLATFORM_PB926
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unless SUBARCH_V6 suppress PLATFORM_PB11MPCORE
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unless SUBARCH_V7 suppress PLATFORM_PBA8
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#CPU rules:
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unless SUBARCH_V5 suppress CPU_ARM926
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@@ -122,7 +119,7 @@ unless PLATFORM_EB suppress CPU_ARM1136
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derive DRIVER_UART_PL011 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
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derive DRIVER_TIMER_SP804 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
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derive DRIVER_IRQ_PL190 from PLATFORM_PB926
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derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_PBA8 or PLATFORM_EB
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derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_EB
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# Toolchains:
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@@ -20,7 +20,7 @@
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#define TIMER1_PHYS_BASE (TIMER0_PHYS_BASE + SP804_TIMER2_OFFSET)
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#define TIMER2_PHYS_BASE 0x10012000
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#define TIMER3_PHYS_BASE (TIMER2_PHYS_BASE + SP804_TIMER2_OFFSET)
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#elif defined(PLATFORM_PB11MPCORE) || defined(PLATFORM_PBA8)
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#elif defined(PLATFORM_PB11MPCORE)
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#define TIMER0_PHYS_BASE 0x10011000
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#define TIMER1_PHYS_BASE (TIMER0_PHYS_BASE + SP804_TIMER2_OFFSET)
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#define TIMER2_PHYS_BASE 0x10012000
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@@ -26,8 +26,6 @@
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#define PL011_BASE 0x10009000
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#elif defined(PLATFORM_PB11MPCORE)
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#define PL011_BASE 0x10009000
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#elif defined(PLATFORM_PBA8)
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#define PL011_BASE 0x10009000
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#endif
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#endif
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@@ -1,25 +0,0 @@
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#ifndef __PLATFORM_IRQ_H__
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#define __PLATFORM_IRQ_H__
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/* TODO: Not sure about this, need to check */
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#define IRQ_CHIPS_MAX 4
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#define IRQS_MAX 96
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/*
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* IRQ indices, 32-63 and 72-89 index
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* available for external sources
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* 0-32: used for SI, provided by
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* distributed interrupt controller
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*/
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#define IRQ_TIMER01 36
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#define IRQ_TIMER23 37
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#define IRQ_TIMER45 73
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#define IRQ_TIMER67 74
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#define IRQ_RTC 42
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#define IRQ_UART0 44
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#define IRQ_UART1 45
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#define IRQ_UART2 46
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#define IRQ_UART3 47
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#endif /* __PLATFORM_IRQ_H__ */
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@@ -1,77 +0,0 @@
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/*
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* Describes physical memory layout of pb926 platform.
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*
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* Copyright (C) 2007 Bahadir Balban
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*/
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#ifndef __PLATFORM_PBA8_OFFSETS_H__
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#define __PLATFORM_PBA8_OFFSETS_H__
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/* Physical memory base */
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#define PHYS_MEM_START 0x00000000 /* inclusive */
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#define PHYS_MEM_END 0x10000000 /* 256 MB, exclusive */
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/*
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* These bases taken from where kernel is `physically' linked at,
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* also used to calculate virtual-to-physical translation offset.
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* See the linker script for their sources. PHYS_ADDR_BASE can't
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* use a linker variable because it's referred from assembler.
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*/
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#define PHYS_ADDR_BASE 0x100000
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/* Device memory base */
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#define PBA8_DEV_PHYS 0x10000000
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/* Device offsets in physical memory */
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#define PBA8_SYSTEM_REGISTERS 0x10000000 /* System registers */
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#define PBA8_SYSCTRL0_BASE 0x10001000 /* System controller 0 */
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#define PBA8_UART0_BASE 0x10009000 /* UART 0 */
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#define PBA8_UART1_BASE 0x1000A000 /* UART 1 */
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#define PBA8_UART2_BASE 0x1000B000 /* UART 2 */
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#define PBA8_UART3_BASE 0x1000C000 /* UART 3 */
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#define PBA8_WATCHDOG0_BASE 0x1000F000 /* WATCHDOG 0 */
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#define PBA8_WATCHDOG1_BASE 0x10010000 /* WATCHDOG 1 */
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#define PBA8_TIMER01_BASE 0x10011000 /* TIMER 0-1 */
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#define PBA8_TIMER23_BASE 0x10012000 /* TIMER 2-3 */
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#define PBA8_RTC_BASE 0x10017000 /* RTC interface */
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#define PBA8_TIMER45_BASE 0x10018000 /* TIMER 4-5 */
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#define PBA8_TIMER67_BASE 0x10019000 /* TIMER 6-7 */
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#define PBA8_SYSCTRL1_BASE 0x1001A000 /* System controller 1 */
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#define PBA8_GIC0_BASE 0x1E000000 /* GIC 0 */
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#define PBA8_GIC1_BASE 0x1E010000 /* GIC 1 */
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#define PBA8_GIC2_BASE 0x1E020000 /* GIC 2 */
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#define PBA8_GIC3_BASE 0x1E030000 /* GIC 3 */
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/*
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* Uart virtual address until a file-based console access
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* is available for userspace
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*/
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#define USERSPACE_UART_BASE 0x500000
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/*
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* Device offsets in virtual memory. They offset to some virtual
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* device base address. Each page on this virtual base is consecutively
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* allocated to devices. Nice and smooth.
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*/
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#define PBA8_SYSREGS_VOFFSET 0x00000000
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#define PBA8_SYSCTRL0_VOFFSET 0x00001000
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#define PBA8_SYSCTRL1_VOFFSET 0x00002000
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#define PBA8_UART0_VOFFSET 0x00003000
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#define PBA8_TIMER01_VOFFSET 0x00004000
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#define PBA8_GIC0_VOFFSET 0x00005000
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#define PBA8_GIC1_VOFFSET 0x00006000
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#define PBA8_GIC2_VOFFSET 0x00007000
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#define PBA8_GIC3_VOFFSET 0x00008000
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#define PBA8_SYSREGS_VBASE (IO_AREA0_VADDR + PBA8_SYSREGS_VOFFSET)
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#define PBA8_SYSCTRL0_VBASE (IO_AREA0_VADDR + PBA8_SYSCTRL0_VOFFSET)
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#define PBA8_SYSCTRL1_VBASE (IO_AREA0_VADDR + PBA8_SYSCTRL1_VOFFSET)
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#define PBA8_UART0_VBASE (IO_AREA0_VADDR + PBA8_UART0_VOFFSET)
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#define PBA8_TIMER01_VBASE (IO_AREA0_VADDR + PBA8_TIMER01_VOFFSET)
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#define PBA8_GIC0_VBASE (IO_AREA0_VADDR + PBA8_GIC0_VOFFSET)
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#define PBA8_GIC1_VBASE (IO_AREA0_VADDR + PBA8_GIC1_VOFFSET)
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#define PBA8_GIC2_VBASE (IO_AREA0_VADDR + PBA8_GIC2_VOFFSET)
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#define PBA8_GIC3_VBASE (IO_AREA0_VADDR + PBA8_GIC3_VOFFSET)
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#endif /* __PLATFORM_PBA8_OFFSETS_H__ */
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@@ -1,32 +0,0 @@
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#ifndef __PBA8_PLATFORM_H__
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#define __PBA8_PLATFORM_H__
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/*
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* Platform specific ties between drivers and generic APIs used by the kernel.
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* E.g. system timer and console.
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*
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* Copyright (C) Bahadir Balban 2007
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*/
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#include INC_PLAT(offsets.h)
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#include INC_GLUE(memlayout.h)
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#define PLATFORM_CONSOLE0_BASE PBA8_UART0_VBASE
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#define PLATFORM_TIMER0_BASE PBA8_TIMER01_VBASE
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#define PLATFORM_SP810_BASE PBA8_SYSCTRL0_VBASE
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/* Total number of timers present in this platform */
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#define TOTAL_TIMERS 8
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#define PLATFORM_TIMER0 0
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#define PLATFORM_TIMER1 1
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#define PLATFORM_TIMER2 2
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#define PLATFORM_TIMER3 3
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#define PLATFORM_TIMER4 4
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#define PLATFORM_TIMER5 5
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#define PLATFORM_TIMER6 6
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#define PLATFORM_TIMER7 7
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void platform_irq_enable(int irq);
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void platform_irq_disable(int irq);
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void timer_start(void);
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#endif /* __PBA8_PLATFORM_H__ */
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@@ -1,15 +0,0 @@
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#ifndef __PLATFORM__PBA8__PRINTASCII__H__
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#define __PLATFORM__PBA8__PRINTASCII__H__
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#define dprintk(str, val) \
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{ \
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printascii(str); \
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printascii("0x"); \
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printhex8((val)); \
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printascii("\n"); \
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}
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void printascii(char *str);
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void printhex8(unsigned int);
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#endif /* __PLATFORM__PBA8__PRINTASCII__H__ */
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@@ -1,20 +0,0 @@
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/*
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* Platform specific ties to generic uart functions that putc expects.
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*
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* Copyright (C) 2007 Bahadir Balban
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*
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*/
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#ifndef __PLATFORM_PBA8_UART_H__
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#define __PLATFORM_PBA8_UART_H__
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#include INC_PLAT(offsets.h)
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#include INC_GLUE(memlayout.h)
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#define PLATFORM_CONSOLE_BASE PBA8_UART0_VBASE
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#include <l4/drivers/uart/pl011/pl011_uart.h>
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void uart_init(void);
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void uart_putc(char c);
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#endif /* __PLATFORM_PB926_UART_H__ */
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@@ -44,7 +44,6 @@ class LinuxUpdateKernel:
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# List of ARCHIDs, to be used by linux based on codezero config
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self.archid_list = (['PB926', '0x183'],
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['PB1176', '0x5E0'],
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['PBA8', '0x769'],
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['EB', '0x33B'],
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['PB11MPCORE', '0x3D4'],)
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@@ -1,10 +0,0 @@
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# Inherit global environment
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Import('env')
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# The set of source files associated with this SConscript file.
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src_local = ['printascii.S','platform.c', 'uart.c', 'timer.c', 'irq.c']
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obj = env.Object(src_local)
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Return('obj')
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@@ -1,61 +0,0 @@
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/*
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* Support for generic irq handling using platform irq controller (PL190)
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*
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* Copyright (C) 2007 Bahadir Balban
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*/
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#include <l4/generic/platform.h>
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#include <l4/generic/irq.h>
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#include <l4/generic/time.h>
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#include INC_PLAT(irq.h)
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#include INC_PLAT(platform.h)
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#include INC_ARCH(exception.h)
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#include <l4/drivers/irq/pl190/pl190_vic.h>
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#include <l4/drivers/timer/sp804/sp804_timer.h>
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struct irq_chip irq_chip_array[IRQ_CHIPS_MAX];
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#if 0
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struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
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[0] = {
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.name = "Vectored irq controller",
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.level = 0,
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.cascade = IRQ_SIC,
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.offset = 0,
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.ops = {
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.init = pl190_vic_init,
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.read_irq = pl190_read_irq,
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.ack_and_mask = pl190_mask_irq,
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.unmask = pl190_unmask_irq,
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},
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},
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[1] = {
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.name = "Secondary irq controller",
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.level = 1,
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.cascade = IRQ_NIL,
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.offset = SIRQ_CHIP_OFFSET,
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.ops = {
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.init = pl190_sic_init,
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.read_irq = pl190_sic_read_irq,
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.ack_and_mask = pl190_sic_mask_irq,
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.unmask = pl190_sic_unmask_irq,
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},
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},
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};
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#endif
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static int platform_timer_handler(void)
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{
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sp804_irq_handler(PLATFORM_TIMER0_BASE);
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return do_timer_irq();
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}
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/* Built-in irq handlers initialised at compile time.
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* Else register with register_irq() */
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struct irq_desc irq_desc_array[IRQS_MAX] = {
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[IRQ_TIMER01] = {
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.name = "Timer01",
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.chip = &irq_chip_array[0],
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.handler = platform_timer_handler,
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},
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};
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@@ -1,67 +0,0 @@
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/*
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* PBA8 platform-specific initialisation and setup
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*
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* Copyright (C) 2007 Bahadir Balban
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*/
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#include <l4/generic/platform.h>
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#include <l4/generic/space.h>
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#include <l4/generic/irq.h>
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#include INC_ARCH(linker.h)
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#include INC_PLAT(printascii.h)
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#include INC_SUBARCH(mm.h)
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#include INC_SUBARCH(mmu_ops.h)
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#include INC_GLUE(memory.h)
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#include INC_GLUE(memlayout.h)
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#include INC_PLAT(offsets.h)
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#include INC_PLAT(platform.h)
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#include INC_PLAT(uart.h)
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#include INC_PLAT(irq.h)
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#include INC_ARCH(asm.h)
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|
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void init_platform_console(void)
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{
|
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add_boot_mapping(PBA8_UART0_BASE, PLATFORM_CONSOLE0_BASE, PAGE_SIZE,
|
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MAP_IO_DEFAULT_FLAGS);
|
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|
||||
/*
|
||||
* Map same UART IO area to userspace so that primitive uart-based
|
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* userspace printf can work. Note, this raw mapping is to be
|
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* removed in the future, when file-based io is implemented.
|
||||
*/
|
||||
add_boot_mapping(PBA8_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
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MAP_USR_IO_FLAGS);
|
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|
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uart_init();
|
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}
|
||||
|
||||
void init_platform_timer(void)
|
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{
|
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add_boot_mapping(PBA8_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
|
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MAP_IO_DEFAULT_FLAGS);
|
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add_boot_mapping(PBA8_SYSCTRL0_BASE, PBA8_SYSCTRL0_VBASE, PAGE_SIZE,
|
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MAP_IO_DEFAULT_FLAGS);
|
||||
/* TODO: May need mapping for SYSCTRL1 */
|
||||
add_boot_mapping(PBA8_SYSCTRL1_BASE, PBA8_SYSCTRL1_VBASE, PAGE_SIZE,
|
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MAP_IO_DEFAULT_FLAGS);
|
||||
timer_init();
|
||||
}
|
||||
|
||||
void init_platform_irq_controller()
|
||||
{
|
||||
#if 0
|
||||
add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
|
||||
MAP_IO_DEFAULT_FLAGS);
|
||||
add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
|
||||
MAP_IO_DEFAULT_FLAGS);
|
||||
irq_controllers_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
void platform_init(void)
|
||||
{
|
||||
init_platform_console();
|
||||
init_platform_timer();
|
||||
init_platform_irq_controller();
|
||||
}
|
||||
|
||||
@@ -1,121 +0,0 @@
|
||||
/*
|
||||
* Basic UART printing.
|
||||
*/
|
||||
#include INC_ARCH(asm.h)
|
||||
#include INC_GLUE(memlayout.h)
|
||||
#include INC_PLAT(offsets.h)
|
||||
#include INC_SUBARCH(mm.h)
|
||||
|
||||
#define UART_DATA_OFFSET 0x0
|
||||
|
||||
#define UART0_PHYS_BASE PBA8_UART0_BASE
|
||||
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
|
||||
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)
|
||||
#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF)
|
||||
|
||||
#define UART0_VIRT_BASE PBA8_UART0_VBASE
|
||||
#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000)
|
||||
#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000)
|
||||
#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF)
|
||||
|
||||
.macro uart_address rx
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #UART0_PHYS_BYTE1
|
||||
orreq \rx, #UART0_PHYS_BYTE2
|
||||
orreq \rx, #UART0_PHYS_BYTE3_4
|
||||
movne \rx, #UART0_VIRT_BYTE1
|
||||
orrne \rx, #UART0_VIRT_BYTE2
|
||||
orrne \rx, #UART0_VIRT_BYTE3_4
|
||||
.endm
|
||||
|
||||
.macro uart_send, ry, rx
|
||||
strb \ry, [\rx, #UART_DATA_OFFSET]
|
||||
.endm
|
||||
|
||||
.macro uart_wait, ry, rx
|
||||
501:
|
||||
ldr \ry, [\rx, #0x18]
|
||||
tst \ry, #1 << 5
|
||||
bne 501b
|
||||
.endm
|
||||
|
||||
.macro uart_busy, ry, rx
|
||||
501:
|
||||
ldr \ry, [\rx, #0x18]
|
||||
tst \ry, #1 << 3
|
||||
bne 501b
|
||||
.endm
|
||||
|
||||
.text
|
||||
/*
|
||||
* Useful debugging routines
|
||||
*/
|
||||
BEGIN_PROC(printhex8)
|
||||
mov r1, #8
|
||||
b printhex
|
||||
|
||||
BEGIN_PROC(printhex4)
|
||||
mov r1, #4
|
||||
b printhex
|
||||
|
||||
BEGIN_PROC(printhex2)
|
||||
mov r1, #2
|
||||
printhex: adr r2, hexbuf
|
||||
@printhex: ldr r2, =hexbuf
|
||||
add r3, r2, r1
|
||||
mov r1, #0
|
||||
strb r1, [r3]
|
||||
1: and r1, r0, #15
|
||||
mov r0, r0, lsr #4
|
||||
cmp r1, #10
|
||||
addlt r1, r1, #'0'
|
||||
addge r1, r1, #'a' - 10
|
||||
strb r1, [r3, #-1]!
|
||||
teq r3, r2
|
||||
bne 1b
|
||||
mov r0, r2
|
||||
b printascii
|
||||
|
||||
.ltorg
|
||||
|
||||
|
||||
.align
|
||||
|
||||
@ vmem-linked image has strings in vmem addresses. This replaces
|
||||
@ the reference with corresponding physical address. Note this
|
||||
@ won't work if memory offsets aren't clear cut values for
|
||||
@ orr'ing and bic'ing. rm = mmu bits rs = string address.
|
||||
.macro get_straddr rs, rm
|
||||
mrc p15, 0, \rm, c1, c0 @ Get MMU bits.
|
||||
tst \rm, #1 @ MMU enabled?
|
||||
@subeq \rs, \rs, #KERNEL_AREA_START
|
||||
biceq \rs, \rs, #KERNEL_AREA_START @ Clear Virtual mem offset.
|
||||
@orreq \rs, \rs, #PHYS_ADDR_BASE @ Add Phy mem offset.
|
||||
.endm
|
||||
|
||||
BEGIN_PROC(printascii)
|
||||
get_straddr r0, r1
|
||||
uart_address r3
|
||||
b 2f
|
||||
1: uart_wait r2, r3
|
||||
uart_send r1, r3
|
||||
uart_busy r2, r3
|
||||
teq r1, #'\n'
|
||||
moveq r1, #'\r'
|
||||
beq 1b
|
||||
2: teq r0, #0
|
||||
ldrneb r1, [r0], #1
|
||||
teqne r1, #0
|
||||
bne 1b
|
||||
mov pc, lr
|
||||
END_PROC(printascii)
|
||||
|
||||
BEGIN_PROC(printch)
|
||||
uart_address r3
|
||||
mov r1, r0
|
||||
mov r0, #0
|
||||
b 1b
|
||||
|
||||
hexbuf: .space 16
|
||||
|
||||
@@ -1,30 +0,0 @@
|
||||
/*
|
||||
* Ties up platform timer with generic timer api
|
||||
*
|
||||
* Copyright (C) 2007 Bahadir Balban
|
||||
*
|
||||
*/
|
||||
#include <l4/generic/irq.h>
|
||||
#include <l4/generic/platform.h>
|
||||
#include INC_PLAT(platform.h)
|
||||
#include <l4/drivers/timer/sp804/sp804_timer.h>
|
||||
#include <l4/drivers/misc/sp810/sp810_sysctrl.h>
|
||||
|
||||
void timer_init(void)
|
||||
{
|
||||
/* Set timer 0 to 1MHz */
|
||||
sp810_set_timclk(PLATFORM_TIMER0, 1);
|
||||
|
||||
/* Initialise timer */
|
||||
sp804_init(PLATFORM_TIMER0_BASE, SP804_TIMER_RUNMODE_PERIODIC, \
|
||||
SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
|
||||
SP804_TIMER_IRQENABLE);
|
||||
|
||||
}
|
||||
|
||||
void timer_start(void)
|
||||
{
|
||||
irq_enable(IRQ_TIMER01);
|
||||
sp804_enable(PLATFORM_TIMER0, 1); /* Enable timer0 */
|
||||
}
|
||||
|
||||
@@ -1,29 +0,0 @@
|
||||
/*
|
||||
* Ties up platform's uart driver functions with generic API
|
||||
*
|
||||
* Copyright (C) 2007 Bahadir Balban
|
||||
*/
|
||||
#include <l4/generic/platform.h>
|
||||
#include INC_PLAT(platform.h)
|
||||
|
||||
#include <l4/drivers/uart/pl011/pl011_uart.h>
|
||||
|
||||
extern struct pl011_uart uart;
|
||||
|
||||
void uart_init()
|
||||
{
|
||||
/* We are using UART0 for kernel */
|
||||
uart.base = PLATFORM_CONSOLE0_BASE;
|
||||
pl011_initialise_device(&uart);
|
||||
}
|
||||
|
||||
/* Generic uart function that lib/putchar.c expects to see implemented */
|
||||
void uart_putc(char c)
|
||||
{
|
||||
int res;
|
||||
/* Platform specific uart implementation */
|
||||
do {
|
||||
res = pl011_tx_char(uart.base, c);
|
||||
} while (res < 0);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user