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PBA8 platform removed

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This commit is contained in:
Amit Mahajan
2009-11-27 00:52:59 +05:30
parent bc4a233adb
commit 16b984510f
15 changed files with 2 additions and 495 deletions
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25
include/l4/platform/pba8/irq.h
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@@ -1,25 +0,0 @@
#ifndef __PLATFORM_IRQ_H__
#define __PLATFORM_IRQ_H__
/* TODO: Not sure about this, need to check */
#define IRQ_CHIPS_MAX 4
#define IRQS_MAX 96
/*
* IRQ indices, 32-63 and 72-89 index
* available for external sources
* 0-32: used for SI, provided by
* distributed interrupt controller
*/
#define IRQ_TIMER01 36
#define IRQ_TIMER23 37
#define IRQ_TIMER45 73
#define IRQ_TIMER67 74
#define IRQ_RTC 42
#define IRQ_UART0 44
#define IRQ_UART1 45
#define IRQ_UART2 46
#define IRQ_UART3 47
#endif /* __PLATFORM_IRQ_H__ */

77
include/l4/platform/pba8/offsets.h
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@@ -1,77 +0,0 @@
/*
* Describes physical memory layout of pb926 platform.
*
* Copyright (C) 2007 Bahadir Balban
*/
#ifndef __PLATFORM_PBA8_OFFSETS_H__
#define __PLATFORM_PBA8_OFFSETS_H__
/* Physical memory base */
#define PHYS_MEM_START 0x00000000 /* inclusive */
#define PHYS_MEM_END 0x10000000 /* 256 MB, exclusive */
/*
* These bases taken from where kernel is `physically' linked at,
* also used to calculate virtual-to-physical translation offset.
* See the linker script for their sources. PHYS_ADDR_BASE can't
* use a linker variable because it's referred from assembler.
*/
#define PHYS_ADDR_BASE 0x100000
/* Device memory base */
#define PBA8_DEV_PHYS 0x10000000
/* Device offsets in physical memory */
#define PBA8_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PBA8_SYSCTRL0_BASE 0x10001000 /* System controller 0 */
#define PBA8_UART0_BASE 0x10009000 /* UART 0 */
#define PBA8_UART1_BASE 0x1000A000 /* UART 1 */
#define PBA8_UART2_BASE 0x1000B000 /* UART 2 */
#define PBA8_UART3_BASE 0x1000C000 /* UART 3 */
#define PBA8_WATCHDOG0_BASE 0x1000F000 /* WATCHDOG 0 */
#define PBA8_WATCHDOG1_BASE 0x10010000 /* WATCHDOG 1 */
#define PBA8_TIMER01_BASE 0x10011000 /* TIMER 0-1 */
#define PBA8_TIMER23_BASE 0x10012000 /* TIMER 2-3 */
#define PBA8_RTC_BASE 0x10017000 /* RTC interface */
#define PBA8_TIMER45_BASE 0x10018000 /* TIMER 4-5 */
#define PBA8_TIMER67_BASE 0x10019000 /* TIMER 6-7 */
#define PBA8_SYSCTRL1_BASE 0x1001A000 /* System controller 1 */
#define PBA8_GIC0_BASE 0x1E000000 /* GIC 0 */
#define PBA8_GIC1_BASE 0x1E010000 /* GIC 1 */
#define PBA8_GIC2_BASE 0x1E020000 /* GIC 2 */
#define PBA8_GIC3_BASE 0x1E030000 /* GIC 3 */
/*
* Uart virtual address until a file-based console access
* is available for userspace
*/
#define USERSPACE_UART_BASE 0x500000
/*
* Device offsets in virtual memory. They offset to some virtual
* device base address. Each page on this virtual base is consecutively
* allocated to devices. Nice and smooth.
*/
#define PBA8_SYSREGS_VOFFSET 0x00000000
#define PBA8_SYSCTRL0_VOFFSET 0x00001000
#define PBA8_SYSCTRL1_VOFFSET 0x00002000
#define PBA8_UART0_VOFFSET 0x00003000
#define PBA8_TIMER01_VOFFSET 0x00004000
#define PBA8_GIC0_VOFFSET 0x00005000
#define PBA8_GIC1_VOFFSET 0x00006000
#define PBA8_GIC2_VOFFSET 0x00007000
#define PBA8_GIC3_VOFFSET 0x00008000
#define PBA8_SYSREGS_VBASE (IO_AREA0_VADDR + PBA8_SYSREGS_VOFFSET)
#define PBA8_SYSCTRL0_VBASE (IO_AREA0_VADDR + PBA8_SYSCTRL0_VOFFSET)
#define PBA8_SYSCTRL1_VBASE (IO_AREA0_VADDR + PBA8_SYSCTRL1_VOFFSET)
#define PBA8_UART0_VBASE (IO_AREA0_VADDR + PBA8_UART0_VOFFSET)
#define PBA8_TIMER01_VBASE (IO_AREA0_VADDR + PBA8_TIMER01_VOFFSET)
#define PBA8_GIC0_VBASE (IO_AREA0_VADDR + PBA8_GIC0_VOFFSET)
#define PBA8_GIC1_VBASE (IO_AREA0_VADDR + PBA8_GIC1_VOFFSET)
#define PBA8_GIC2_VBASE (IO_AREA0_VADDR + PBA8_GIC2_VOFFSET)
#define PBA8_GIC3_VBASE (IO_AREA0_VADDR + PBA8_GIC3_VOFFSET)
#endif /* __PLATFORM_PBA8_OFFSETS_H__ */

32
include/l4/platform/pba8/platform.h
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@@ -1,32 +0,0 @@
#ifndef __PBA8_PLATFORM_H__
#define __PBA8_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
*
* Copyright (C) Bahadir Balban 2007
*/
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE0_BASE PBA8_UART0_VBASE
#define PLATFORM_TIMER0_BASE PBA8_TIMER01_VBASE
#define PLATFORM_SP810_BASE PBA8_SYSCTRL0_VBASE
/* Total number of timers present in this platform */
#define TOTAL_TIMERS 8
#define PLATFORM_TIMER0 0
#define PLATFORM_TIMER1 1
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
#define PLATFORM_TIMER4 4
#define PLATFORM_TIMER5 5
#define PLATFORM_TIMER6 6
#define PLATFORM_TIMER7 7
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PBA8_PLATFORM_H__ */

15
include/l4/platform/pba8/printascii.h
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@@ -1,15 +0,0 @@
#ifndef __PLATFORM__PBA8__PRINTASCII__H__
#define __PLATFORM__PBA8__PRINTASCII__H__
#define dprintk(str, val) \
{ \
printascii(str); \
printascii("0x"); \
printhex8((val)); \
printascii("\n"); \
}
void printascii(char *str);
void printhex8(unsigned int);
#endif /* __PLATFORM__PBA8__PRINTASCII__H__ */

20
include/l4/platform/pba8/uart.h
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@@ -1,20 +0,0 @@
/*
* Platform specific ties to generic uart functions that putc expects.
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __PLATFORM_PBA8_UART_H__
#define __PLATFORM_PBA8_UART_H__
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PBA8_UART0_VBASE
#include <l4/drivers/uart/pl011/pl011_uart.h>
void uart_init(void);
void uart_putc(char c);
#endif /* __PLATFORM_PB926_UART_H__ */