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Virtualmips modified to allow access to SRSCtl register.

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When only one GPR set supported, opcodes RDPGPR and WRPGPR
behave like MOVE instruction.
This commit is contained in:
Serge Vakulenko
2014-05-15 10:48:33 -07:00
parent 459e3f09ea
commit b0705e54ab
2 changed files with 8 additions and 2 deletions
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6
tools/virtualmips/mips_codetable.c
View File

@@ -1684,7 +1684,8 @@ static int rdpgpr_op (cpu_mips_t * cpu, mips_insn_t insn)
int rt = bits (insn, 16, 20);
int rd = bits (insn, 11, 15);
printf ("%08x: unsupported RDPGPR $%u,$%u instruction.\n", cpu->pc, rd, rt);
/* Only one GPR set supported: RDPGPR works as move. */
cpu->reg_set (cpu, rd, cpu->gpr[rt]);
return (0);
}
@@ -1693,7 +1694,8 @@ static int wrpgpr_op (cpu_mips_t * cpu, mips_insn_t insn)
int rt = bits (insn, 16, 20);
int rd = bits (insn, 11, 15);
printf ("%08x: unsupported WRPGPR $%u,$%u instruction.\n", cpu->pc, rd, rt);
/* Only one GPR set supported: WRPGPR works as move. */
cpu->reg_set (cpu, rd, cpu->gpr[rt]);
return (0);
}

4
tools/virtualmips/mips_cp0.c
View File

@@ -93,6 +93,8 @@ unimpl: fprintf (stderr,
return cp0->reg[cp0_reg];
case 1: /* IntCtl */
return cp0->intctl_reg;
case 2: /* SRSCtl */
return 0;
}
goto unimpl;
@@ -172,6 +174,8 @@ void mips_cp0_set_reg (cpu_mips_t * cpu, u_int cp0_reg, u_int sel,
case 1: /* IntCtl */
cp0->intctl_reg = val;
break;
case 2: /* SRSCtl */
break;
default:
goto unimpl;
}